false - syntax, references, description

References

Location	Text
system.h:67	#define false 0
FreeRTOS.c:113	{ "pxCurrentTCB", false },
FreeRTOS.c:114	{ "pxReadyTasksLists", false },
FreeRTOS.c:115	{ "xDelayedTaskList1", false },
FreeRTOS.c:116	{ "xDelayedTaskList2", false },
FreeRTOS.c:117	{ "pxDelayedTaskList", false },
FreeRTOS.c:118	{ "pxOverflowDelayedTaskList", false },
FreeRTOS.c:119	{ "xPendingReadyList", false },
FreeRTOS.c:122	{ "uxCurrentNumberOfTasks", false },
FreeRTOS.c:124	{ "xSchedulerRunning", false },
FreeRTOS.c:125	{ NULL, false }
FreeRTOS.c:529	return false;
ThreadX.c:508	return false;
aarch64.c:440	all_halted = false;
aarch64.c:573	return aarch64_halt_smp(target, false);
aarch64.c:820	all_resumed = false;
aarch64.c:908	all_resumed = false;
aarch64.c:1567	breakpoint->is_set = false;
aarch64.c:1597	breakpoint->is_set = false;
aarch64.c:1629	breakpoint->is_set = false;
aarch64.c:1827	watchpoint->is_set = false;
aarch64.c:1958	bool srst_asserted = false;
aarch64.c:2036	retval = aarch64_enable_reset_catch(target, false);
aarch64.c:2850	aarch64->armv8_common.is_armv8r = false;
aarch64.c:3065	bool is_mcr = false;
adapter.c:57	[ADAPTER_GPIO_IDX_TDO] = { "tdo", ADAPTER_GPIO_DIRECTION_INPUT, false, true, },
adapter.c:62	[ADAPTER_GPIO_IDX_SWDIO_DIR] = { "swdio_dir", ADAPTER_GPIO_DIRECTION_OUTPUT, true, false, },
adapter.c:64	[ADAPTER_GPIO_IDX_TRST] = { "trst", ADAPTER_GPIO_DIRECTION_OUTPUT, false, true, },
adapter.c:65	[ADAPTER_GPIO_IDX_SRST] = { "srst", ADAPTER_GPIO_DIRECTION_OUTPUT, false, true, },
adapter.c:333	bool equal = false;
adapter.c:969	gpio_config->active_low = false;
adi_v5_jtag.c:531	dap->select_valid = false;
adi_v5_jtag.c:532	dap->select1_valid = false;
adi_v5_jtag.c:594	dap->select_valid = false;
adi_v5_jtag.c:629	dap->select_valid = false;
adi_v5_jtag.c:630	dap->select1_valid = false;
adi_v5_jtag.c:705	dap->do_reconnect = false;
adi_v5_jtag.c:802	dap->select_valid = false;
adi_v5_jtag.c:812	dap->select1_valid = false;
adi_v5_swd.c:70	swd->read_reg(swd_cmd(true, false, DP_RDBUFF), dap->last_read, 0);
adi_v5_swd.c:80	swd->write_reg(swd_cmd(false, false, DP_ABORT),
adi_v5_swd.c:132	swd->read_reg(swd_cmd(true, false, reg), data, 0);
adi_v5_swd.c:149	swd->write_reg(swd_cmd(false, false, reg), data, 0);
adi_v5_swd.c:167	swd->write_reg(swd_cmd(false, false, reg), data, 0);
adi_v5_swd.c:205	dap->select_valid = false;
adi_v5_swd.c:206	dap->select1_valid = false;
adi_v5_swd.c:291	dap->do_reconnect = false;
adi_v5_swd.c:305	swd_multidrop_in_swd_state = false;
adi_v5_swd.c:308	dap->do_reconnect = false;
adi_v5_swd.c:316	swd_multidrop_in_swd_state = false;
adi_v5_swd.c:349	dap->do_reconnect = false;
adi_v5_swd.c:388	dap->do_reconnect = false;
adi_v5_swd.c:406	swd_multidrop_in_swd_state = false;
adi_v5_swd.c:447	dap->do_reconnect = false;
adi_v5_swd.c:483	swd->write_reg(swd_cmd(false, false, DP_ABORT),
adi_v5_swd.c:616	swd->write_reg(swd_cmd(false, true, reg), data, ap->memaccess_tck);
adi_v5_swd.c:657	swd_multidrop_in_swd_state = false;
aducm302x.c:460	ecc_cfg_modified = false;
aducm302x.c:532	aducm302x_info->probed = false;
aducm302x.c:556	aducm302x_info->is_aducm302x = false;
aducm302x.c:559	aducm302x_info->probed = false;
ambiqmicro.c:134	ambiqmicro_info->probed = false;
ambiqmicro.c:291	false,
arc.c:110	arc->dcache_flushed = false;
arc.c:111	arc->l2cache_flushed = false;
arc.c:112	arc->icache_invalidated = false;
arc.c:113	arc->dcache_invalidated = false;
arc.c:114	arc->l2cache_invalidated = false;
arc.c:140	arc->has_l2cache = false;
arc.c:254	reg->valid = false;
arc.c:256	reg->dirty = false;
arc.c:918	reg->dirty = false;
arc.c:933	reg->dirty = false;
arc.c:1088	bool srst_asserted = false;
arc.c:1679	breakpoint->is_set = false;
arc.c:1696	breakpoint->is_set = false;
arc.c:1835	bool ap_found = false;
arc.c:1950	watchpoint->is_set = false;
arc_cmd.c:538	bool arch_num_set = false;
arm-jtag-ew.c:290	if (path[i] == tap_state_transition(tap_get_state(), false))
arm11.c:179	arm11->simulate_reset_on_next_halt = false;
arm11.c:883	return arm11_read_memory_inner(target, address, size, count, buffer, false);
arm7_9_common.c:316	breakpoint->is_set = false;
arm7_9_common.c:361	breakpoint->is_set = false;
arm7_9_common.c:550	watchpoint->is_set = false;
arm7_9_common.c:866	bool use_event = false;
arm7_9_common.c:893	bool srst_asserted = false;
arm7_9_common.c:1353	arm->spsr->dirty = false;
arm7_9_common.c:1416	valid = false;
arm7_9_common.c:1444	j).dirty = false;
arm7_9_common.c:1462	16).dirty = false;
arm7_9_common.c:1528	dirty = false;
arm7_9_common.c:1579	reg->dirty = false;
arm7_9_common.c:1622	arm->cpsr->dirty = false;
arm7_9_common.c:1630	arm->pc->dirty = false;
arm7_9_common.c:2033	r->dirty = false;
arm7_9_common.c:2090	r->dirty = false;
arm7_9_common.c:2861	arm7_9->fast_memory_access = false;
arm7_9_common.c:2862	arm7_9->dcc_downloads = false;
arm946e.c:644	bool flush = false;
arm946e.c:645	bool enable = false;
arm_adi_v5.c:121	ap->tar_valid = false;
arm_adi_v5.c:140	ap->tar_valid = false;
arm_adi_v5.c:146	ap->tar_valid = false;
arm_adi_v5.c:192	ap->tar_valid = false;
arm_adi_v5.c:379	pack = false;
arm_adi_v5.c:456	addrinc, false, this_size);
arm_adi_v5.c:737	return mem_ap_read(ap, buffer, size, count, address, false);
arm_adi_v5.c:743	return mem_ap_write(ap, buffer, size, count, address, false);
arm_adi_v5.c:759	dap->select_valid = false;
arm_adi_v5.c:760	dap->select1_valid = false;
arm_adi_v5.c:761	dap->select_dpbanksel_valid = false;
arm_adi_v5.c:768	dap->ap[i].tar_valid = false;
arm_adi_v5.c:785	dap->do_reconnect = false;
arm_adi_v5.c:870	dap->do_reconnect = false;
arm_adi_v5.c:906	ap->tar_valid = false;
arm_adi_v5.c:923	ap->packed_transfers_supported = false;
arm_adi_v5.c:924	ap->packed_transfers_probed = dap->ti_be_32_quirks ? true : false;
arm_adi_v5.c:1081	return false;
arm_adi_v5.c:1087	return false;
arm_adi_v5.c:1093	return false;
arm_adi_v5.c:1096	return false;
arm_adi_v5.c:1100	return false;
arm_adi_v5.c:1940	*is_mem_ap = false;
arm_adi_v5.c:2825	ap->tar_valid = false;
arm_adi_v5.c:2833	ap->tar_valid = false;
arm_adi_v5.h:793	ADI_CONFIGURE_DAP_COMPULSORY = false,
arm_cti.c:39	bool found = false;
arm_dap.c:48	dap->ap[i].config_ap_never_release = false;
arm_dap.c:74	bool found = false;
arm_dap.c:132	pre_connect = false;
arm_disassembler.c:2244	bool nop = false;
arm_dpm.c:200	r->dirty = false;
arm_dpm.c:268	r->dirty = false;
arm_dpm.c:304	r->dirty = false;
arm_dpm.c:353	r->dirty = false;
arm_dpm.c:444	xp->dirty = false;
arm_dpm.c:451	xp->dirty = disable = false;
arm_dpm.c:458	*set_p = false;
arm_dpm.c:540	did_write = false;
arm_dpm.c:609	arm->cpsr->dirty = false;
arm_dpm.c:627	arm->pc->dirty = false;
arm_dpm.c:634	cache->reg_list[i].dirty = false;
arm_dpm.c:788	did_read = false;
arm_tpiu_swo.c:222	int retval = adapter_config_trace(false, 0, 0, NULL, 0, NULL);
arm_tpiu_swo.c:657	obj->recheck_ap_cur_target = false;
arm_tpiu_swo.c:821	obj->en_capture = false;
arm_tpiu_swo.c:827	int retval1 = adapter_config_trace(false, 0, 0, NULL, 0, NULL);
arm_tpiu_swo.c:843	obj->enabled = false;
arm_tpiu_swo.c:848	obj->en_capture = false;
arm_tpiu_swo.c:854	int retval = adapter_config_trace(false, 0, 0, NULL, 0, NULL);
arm_tpiu_swo.c:1057	bool set_recheck_ap_cur_target = false;
armv4_5.c:188	return false;
armv4_5.c:450	arm->cpsr->dirty = false;
armv4_5.c:543	.exist = false,
armv4_5.c:560	.exist = false,
armv4_5.c:589	reg->dirty = false;
armv4_5.c:696	reg_list[i].caller_save = false;
armv4_5.c:741	reg_list[i].caller_save = false;
armv4_5.c:994	bool is_mcr = false;
armv4_5.c:1098	bool is_mcrr = false;
armv4_5.c:1457	struct reg *reg = register_get_by_name(arm->core_cache, reg_params[i].reg_name, false);
armv4_5.c:1529	false);
armv7a_mmu.c:139	priv_acc_r = priv_acc_w = false;
armv7a_mmu.c:140	unpriv_acc_r = unpriv_acc_w = false;
armv7a_mmu.c:143	unpriv_acc_r = unpriv_acc_w = false;
armv7a_mmu.c:146	unpriv_acc_w = false;
armv7m.c:304	return false;
armv7m.c:322	r->dirty = false;
armv7m.c:363	r->valid = false;
armv7m.c:446	r->dirty = false;
armv7m.c:562	register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, false);
armv7m.c:678	false);
armv7m.c:790	reg_list[i].dirty = false;
armv7m.c:791	reg_list[i].valid = false;
armv7m.c:1069	bool result = false;
armv8.c:935	arm->cpsr->dirty = false;
armv8.c:1926	armv8_free_cache(cache, false);
armv8_dpm.c:598	armv8_dpm_handle_exception(dpm, false);
armv8_dpm.c:656	r->dirty = false;
armv8_dpm.c:669	r->dirty = false;
armv8_dpm.c:700	r->dirty = false;
armv8_dpm.c:714	r->dirty = false;
armv8_dpm.c:830	xp->dirty = false;
armv8_dpm.c:837	xp->dirty = disable = false;
armv8_dpm.c:844	*set_p = false;
armv8_dpm.c:1041	did_read = false;
at91sam3.c:265	.probed = false,
at91sam3.c:281	.probed = false,
at91sam3.c:316	.probed = false,
at91sam3.c:332	.probed = false,
at91sam3.c:358	.probed = false,
at91sam3.c:375	.probed = false,
at91sam3.c:407	.probed = false,
at91sam3.c:422	.probed = false,
at91sam3.c:457	.probed = false,
at91sam3.c:473	.probed = false,
at91sam3.c:499	.probed = false,
at91sam3.c:515	.probed = false,
at91sam3.c:537	.probed = false,
at91sam3.c:553	.probed = false,
at91sam3.c:570	.probed = false,
at91sam3.c:586	.probed = false,
at91sam3.c:602	.probed = false,
at91sam3.c:618	.probed = false,
at91sam3.c:634	.probed = false,
at91sam3.c:650	.probed = false,
at91sam3.c:666	.probed = false,
at91sam3.c:682	.probed = false,
at91sam3.c:698	.probed = false,
at91sam3.c:713	.probed = false,
at91sam3.c:738	.probed = false,
at91sam3.c:753	.probed = false,
at91sam3.c:778	.probed = false,
at91sam3.c:793	.probed = false,
at91sam3.c:818	.probed = false,
at91sam3.c:834	.probed = false,
at91sam3.c:850	.probed = false,
at91sam3.c:866	.probed = false,
at91sam3.c:882	.probed = false,
at91sam3.c:898	.probed = false,
at91sam3.c:914	.probed = false,
at91sam3.c:930	.probed = false,
at91sam3.c:946	.probed = false,
at91sam3.c:962	.probed = false,
at91sam3.c:978	.probed = false,
at91sam3.c:994	.probed = false,
at91sam3.c:1010	.probed = false,
at91sam3.c:1026	.probed = false,
at91sam3.c:1060	.probed = false,
at91sam3.c:1077	.probed = false,
at91sam3.c:1109	.probed = false,
at91sam3.c:1126	.probed = false,
at91sam3.c:1158	.probed = false,
at91sam3.c:1175	.probed = false,
at91sam3.c:1207	.probed = false,
at91sam3.c:1224	.probed = false,
at91sam3.c:1256	.probed = false,
at91sam3.c:1273	.probed = false,
at91sam3.c:1305	.probed = false,
at91sam3.c:1322	.probed = false,
at91sam3.c:1354	.probed = false,
at91sam3.c:1371	.probed = false,
at91sam3.c:1403	.probed = false,
at91sam3.c:1420	.probed = false,
at91sam3.c:1452	.probed = false,
at91sam3.c:1469	.probed = false,
at91sam3.c:1486	.probed = false,
at91sam3.c:1503	.probed = false,
at91sam3.c:1520	.probed = false,
at91sam3.c:1537	.probed = false,
at91sam3.c:1554	.probed = false,
at91sam3.c:1571	.probed = false,
at91sam3.c:1588	.probed = false,
at91sam3.c:1605	.probed = false,
at91sam3.c:1639	.probed = false,
at91sam3.c:1654	.probed = false,
at91sam3.c:1680	.probed = false,
at91sam3.c:1695	.probed = false,
at91sam3.c:1739	.probed = false,
at91sam3.c:1754	.probed = false,
at91sam3.c:1781	.probed = false,
at91sam3.c:1796	.probed = false,
at91sam3.c:1822	.probed = false,
at91sam3.c:1837	.probed = false,
at91sam3.c:1863	.probed = false,
at91sam3.c:1878	.probed = false,
at91sam3.c:1904	.probed = false,
at91sam3.c:1919	.probed = false,
at91sam3.c:1945	.probed = false,
at91sam3.c:1960	.probed = false,
at91sam3.c:3010	chip->probed = false;
at91sam4.c:235	.probed = false,
at91sam4.c:250	.probed = false,
at91sam4.c:276	.probed = false,
at91sam4.c:291	.probed = false,
at91sam4.c:317	.probed = false,
at91sam4.c:332	.present = false,
at91sam4.c:333	.probed = false,
at91sam4.c:350	.probed = false,
at91sam4.c:365	.present = false,
at91sam4.c:366	.probed = false,
at91sam4.c:383	.probed = false,
at91sam4.c:398	.present = false,
at91sam4.c:399	.probed = false,
at91sam4.c:418	.probed = false,
at91sam4.c:433	.present = false,
at91sam4.c:434	.probed = false,
at91sam4.c:453	.probed = false,
at91sam4.c:468	.present = false,
at91sam4.c:469	.probed = false,
at91sam4.c:486	.probed = false,
at91sam4.c:501	.present = false,
at91sam4.c:502	.probed = false,
at91sam4.c:519	.probed = false,
at91sam4.c:534	.present = false,
at91sam4.c:535	.probed = false,
at91sam4.c:552	.probed = false,
at91sam4.c:567	.present = false,
at91sam4.c:568	.probed = false,
at91sam4.c:585	.probed = false,
at91sam4.c:600	.present = false,
at91sam4.c:601	.probed = false,
at91sam4.c:620	.probed = false,
at91sam4.c:635	.present = false,
at91sam4.c:636	.probed = false,
at91sam4.c:654	.probed = false,
at91sam4.c:669	.present = false,
at91sam4.c:670	.probed = false,
at91sam4.c:687	.probed = false,
at91sam4.c:702	.present = false,
at91sam4.c:703	.probed = false,
at91sam4.c:720	.probed = false,
at91sam4.c:735	.present = false,
at91sam4.c:736	.probed = false,
at91sam4.c:753	.probed = false,
at91sam4.c:768	.present = false,
at91sam4.c:769	.probed = false,
at91sam4.c:786	.probed = false,
at91sam4.c:801	.present = false,
at91sam4.c:802	.probed = false,
at91sam4.c:819	.probed = false,
at91sam4.c:834	.present = false,
at91sam4.c:835	.probed = false,
at91sam4.c:852	.probed = false,
at91sam4.c:867	.present = false,
at91sam4.c:868	.probed = false,
at91sam4.c:886	.probed = false,
at91sam4.c:901	.present = false,
at91sam4.c:902	.probed = false,
at91sam4.c:920	.probed = false,
at91sam4.c:935	.present = false,
at91sam4.c:936	.probed = false,
at91sam4.c:954	.probed = false,
at91sam4.c:969	.present = false,
at91sam4.c:970	.probed = false,
at91sam4.c:988	.probed = false,
at91sam4.c:1003	.present = false,
at91sam4.c:1004	.probed = false,
at91sam4.c:1022	.probed = false,
at91sam4.c:1037	.present = false,
at91sam4.c:1038	.probed = false,
at91sam4.c:1056	.probed = false,
at91sam4.c:1071	.present = false,
at91sam4.c:1072	.probed = false,
at91sam4.c:1091	.probed = false,
at91sam4.c:1107	.probed = false,
at91sam4.c:1135	.probed = false,
at91sam4.c:1151	.probed = false,
at91sam4.c:1179	.probed = false,
at91sam4.c:1195	.probed = false,
at91sam4.c:1223	.probed = false,
at91sam4.c:1239	.probed = false,
at91sam4.c:1267	.probed = false,
at91sam4.c:1282	.present = false,
at91sam4.c:1283	.probed = false,
at91sam4.c:1302	.probed = false,
at91sam4.c:1317	.present = false,
at91sam4.c:1318	.probed = false,
at91sam4.c:1336	.probed = false,
at91sam4.c:1351	.present = false,
at91sam4.c:1352	.probed = false,
at91sam4.c:1370	.probed = false,
at91sam4.c:1385	.present = false,
at91sam4.c:1386	.probed = false,
at91sam4.c:1404	.probed = false,
at91sam4.c:1419	.present = false,
at91sam4.c:1420	.probed = false,
at91sam4.c:2503	chip->probed = false;
at91sam4l.c:211	chip->probed = false;
at91sam4l.c:455	bool is_erased = false;
at91sam9.c:75	return false;
at91samd.c:860	manual_wp = false;
at91samd.c:960	chip->probed = false;
ath79.c:768	ath79_info->probed = false;
atsame5.c:507	bool changed = false;
atsame5.c:750	chip->probed = false;
avr32_ap7k.c:103	ap7k->core_cache->reg_list[num].dirty = false;
avr32_ap7k.c:122	ap7k->core_cache->reg_list[num].dirty = false;
avr32_ap7k.c:188	reg_list[i].dirty = false;
avr32_ap7k.c:189	reg_list[i].valid = false;
avrf.c:206	avrf_info->probed = false;
avrf.c:265	ext_addressing = false;
avrf.c:305	avrf_info->probed = false;
binarybuffer.c:81	return false;
binarybuffer.c:101	return false;
bluenrg-x.c:109	bluenrgx_info->probed = false;
breakpoints.c:68	(*breakpoint_p)->is_set = false;
breakpoints.c:130	(*breakpoint_p)->is_set = false;
breakpoints.c:184	(*breakpoint_p)->is_set = false;
cc3220sf.c:56	done = false;
cc3220sf.c:95	cc3220sf_bank->probed = false;
cc3220sf.c:143	done = false;
certus.c:27	return lattice_read_u32_register(tap, READ_USERCODE, usercode, out, false);
cfi.c:781	bool bus_swap = false;
cfi.c:2394	fallback = false;
cfi.c:2548	cfi_info->probed = false;
chibios.c:124	{ "ch_debug", 0, false}, /* Memory Signature containing offsets of fields in rlist */
chibios.c:125	{ NULL, 0, false}
chibios.c:507	return false;
chibios.c:514	return false;
chromium-ec.c:88	return false;
chromium-ec.c:98	return false;
chromium-ec.c:108	return false;
cmsis_dap.c:583	command[idx++] = SWD_CMD_START \| swd_cmd(false, false, DP_TARGETSEL) \| SWD_CMD_STOP \| SWD_CMD_PARK;
cmsis_dap.c:1045	if (swd_cmd(false, false, DP_TARGETSEL) == cmd) {
cmsis_dap.c:1058	block_cmd = false;
cmsis_dap.c:1099	cmsis_dap_handle->swd_cmds_differ = false;
cmsis_dap.c:1794	false, /* TMS low */
cmsis_dap.c:1816	false,
cmsis_dap.c:1828	false,
cmsis_dap.c:1850	if (path[i] == tap_state_transition(tap_get_state(), false))
cmsis_dap.c:1998	return false;
cmsis_dap.c:2004	return false;
cmsis_dap.c:2032	cmsis_dap_handle->trace_enabled = false;
cmsis_dap.c:2064	cmsis_dap_handle->trace_enabled = false;
cmsis_dap_usb_bulk.c:97	bool id_match = false;
cmsis_dap_usb_bulk.c:132	bool serial_match = false;
cmsis_dap_usb_bulk.c:159	bool cmsis_dap_in_product_str = false;
cmsis_dap_usb_bulk.c:221	bool cmsis_dap_in_interface_str = false;
cmsis_dap_usb_hid.c:94	bool found = false;
cmsis_dap_usb_hid.c:116	found = false;
command.c:270	if (false) /* too noisy with debug_level 3 */
command.c:369	if (false) /* too noisy with debug_level 3 */
command.c:489	return false;
command.c:1093	bool busy = false;
command.c:1342	*out = false;
common.c:32	return false;
core.c:410	fast_check = false;
core.c:489	iterate_protect_blocks = false;
core.c:617	addr, length, false, &flash_driver_erase);
core.c:707	return false;
core.c:718	return false;
core.c:797	retval = get_flash_bank_by_addr(target, run_address, false, &c);
core.c:1012	return flash_write_unlock_verify(target, image, written, erase, false, true, false);
core.c:150	return false;
core.c:156	return false;
core.c:173	jtag_poll_en = false;
core.c:536	tap_state_transition(cur_state, false) != path[i]) {
core.c:584	\|\| tap_state_transition(cur_state, false) == goal_state)
core.c:1125	return false;
core.c:1164	bool triggered = false;
core.c:1210	return false;
core.c:1287	tap->has_idcode = false;
core.c:1556	issue_setup = false;
core.c:1572	issue_setup = false;
core.c:217	return false;
cortex_a.c:295	retval = cortex_a_wait_instrcmpl(target, dscr_p, false);
cortex_a.c:1211	stepbreakpoint.is_set = false;
cortex_a.c:1524	brp_list[brp_i].used = false;
cortex_a.c:1543	brp_list[brp_j].used = false;
cortex_a.c:1557	breakpoint->is_set = false;
cortex_a.c:1568	brp_list[brp_i].used = false;
cortex_a.c:1581	breakpoint->is_set = false;
cortex_a.c:1611	breakpoint->is_set = false;
cortex_a.c:1818	wrp_list[wrp_i].used = false;
cortex_a.c:1831	watchpoint->is_set = false;
cortex_a.c:2528	retval = cortex_a_wait_instrcmpl(target, dscr, false);
cortex_a.c:3044	cortex_a->brp_list[i].used = false;
cortex_a.c:3062	cortex_a->wrp_list[i].used = false;
cortex_a.c:3148	cortex_a->armv7a_common.is_armv7r = false;
cortex_m.c:239	cortex_m->slow_register_read = false;
cortex_m.c:344	bool not_ready = false;
cortex_m.c:367	r->dirty = false;
cortex_m.c:477	return cortex_m_set_maskints(target, false);
cortex_m.c:481	return cortex_m_set_maskints(target, false);
cortex_m.c:500	return cortex_m_set_maskints(target, false);
cortex_m.c:504	return cortex_m_set_maskints(target, false);
cortex_m.c:512	return cortex_m_set_maskints(target, false);
cortex_m.c:526	return cortex_m_set_maskints(target, false);
cortex_m.c:1135	bool halted = false;
cortex_m.c:1157	curr->smp_halt_event_postponed = false;
cortex_m.c:1436	handle_breakpoints, false);
cortex_m.c:1440	retval = cortex_m_restart_one(curr, false);
cortex_m.c:1484	bool bkpt_inst_found = false;
cortex_m.c:1486	bool isr_timed_out = false;
cortex_m.c:1525	if (bkpt_inst_found == false) {
cortex_m.c:1857	bool srst_asserted = false;
cortex_m.c:2132	comparator_list[fp_num].used = false;
cortex_m.c:2144	breakpoint->is_set = false;
cortex_m.c:2279	comparator->used = false;
cortex_m.c:2284	watchpoint->is_set = false;
cortex_m.c:2706	return false;
cortex_m.c:2711	return false;
cortex_m.c:2802	cortex_m->maskints_erratum = false;
cortex_m.c:2803	cortex_m->incorrect_halt_erratum = false;
cortex_m.c:2863	armv7m->arm.core_cache->reg_list[idx].exist = false;
cortex_m.c:2867	armv7m->arm.core_cache->reg_list[idx].exist = false;
cortex_m.h:276	return false;
davinci.c:64	return false;
device.c:1425	return false;
discovery_tcp.c:66	return false;
discovery_tcp.c:70	return false;
discovery_tcp.c:73	return false;
discovery_tcp.c:77	return false;
discovery_tcp.c:80	return false;
discovery_tcp.c:83	return false;
discovery_tcp.c:86	return false;
discovery_tcp.c:89	return false;
discovery_tcp.c:92	return false;
discovery_tcp.c:95	return false;
discovery_tcp.c:120	return false;
discovery_usb.c:99	return false;
discovery_usb.c:113	return false;
discovery_usb.c:118	return false;
discovery_usb.c:158	found_device = false;
discovery_usb.c:215	has_serial_number = false;
driver.c:79	tap->bypass = false;
driver.c:143	scan->ir_scan = false;
driver.c:212	return jtag_add_plain_scan(num_bits, out_bits, in_bits, state, false);
dsp563xx.c:377	dsp563xx->core_cache->reg_list[num].dirty = false;
dsp563xx.c:393	dsp563xx->core_cache->reg_list[num].dirty = false;
dsp563xx.c:465	reg_list[i].dirty = false;
dsp563xx.c:466	reg_list[i].valid = false;
dsp563xx.c:738	dsp563xx->core_cache->reg_list[num].valid = false;
dsp563xx.c:877	dsp563xx->core_cache->reg_list[i].valid = false;
dsp563xx.c:878	dsp563xx->core_cache->reg_list[i].dirty = false;
dsp563xx.c:905	dsp563xx->hardware_breakpoints_cleared = false;
dsp563xx.c:1403	false);
dsp563xx.c:1445	false);
dsp563xx.c:1883	bool was_running = false;
dsp5680xx.c:606	master_tap->enabled = false;
dsp5680xx.c:618	core_tap->enabled = false;
dsp5680xx.c:680	dsp5680xx_context.debug_mode_enabled = false;
dsp5680xx.c:736	tap_cpu->enabled = false;
dsp5680xx.c:871	dsp5680xx_context.debug_mode_enabled = false;
dsp5680xx.c:1029	dsp5680xx_context.debug_mode_enabled = false;
dsp5680xx.c:1051	dsp5680xx_context.debug_mode_enabled = false;
dsp5680xx.c:2149	tap_chp->enabled = false;
dsp5680xx.c:2190	tap_chp->enabled = false;
dsp5680xx.c:2192	dsp5680xx_context.debug_mode_enabled = false;
dsp5680xx.c:2230	dsp5680xx_context.debug_mode_enabled = false;
dsp5680xx.c:2231	tap_cpu->enabled = false;
eCos.c:381	ECOSSYM("Cyg_Thread::thread_list", false, NULL),
eCos.c:382	ECOSSYM("Cyg_Scheduler_Base::current_thread", false, NULL),
eCos.c:494	bool escaped = false;
eCos.c:497	return false;
eCos.c:573	param->flush_common = false;
eCos.c:1069	bool done = false;
eCos.c:1160	return false;
ecp2_3.c:39	return lattice_read_u32_register(tap, READ_USERCODE, usercode, out, false);
ecp2_3.c:209	return lattice_verify_status_register_u32(lattice_device, out, expected, mask, false);
ecp2_3.c:251	return lattice_verify_status_register_u32(lattice_device, out, expected, mask, false);
ecp5.c:188	retval = lattice_verify_status_register_u32(lattice_device, out, expected1, mask2, false);
ecp5.c:206	return lattice_verify_status_register_u32(lattice_device, out, expected2, mask3, false);
efinix.c:70	bool end_detected = false;
efm32.c:1057	efm32x_info->probed[bank_index] = false;
em357.c:96	em357_info->probed = false;
em357.c:670	em357_info->probed = false;
embKernel.c:105	return false;
embeddedice.c:197	reg_list[i].dirty = false;
embeddedice.c:198	reg_list[i].valid = false;
embeddedice.c:479	reg->dirty = false;
emucom.c:243	ret = transport_start_write_read(devh, *length, 4, false);
eneispif.c:63	eneispif_info->probed = false;
eneispif.c:340	eneispif_info->probed = false;
esirisc.c:569	breakpoint->is_set = false;
esirisc.c:753	watchpoint->is_set = false;
esirisc.c:927	handle_breakpoints, debug_execution, false);
esirisc.c:1314	reg->dirty = false;
esirisc.c:1336	reg->dirty = false;
esirisc.c:1359	reg->dirty = false;
esirisc.c:1381	reg->dirty = false;
esirisc_trace.c:909	trace_info->flow_control = false;
esp32.c:179	xtensa->suppress_dsr_errors = false;
esp32.c:189	bool get_timeout = false;
esp32_apptrace.c:158	dest->log_progress = false;
esp32_apptrace.c:785	false /no host data/);
esp32_apptrace.c:793	bool smp_resumed = false;
esp32_apptrace.c:1001	false /no host data/);
esp32_apptrace.c:1074	false /no host data/);
esp32_apptrace.c:1167	false /no host data/);
esp32_apptrace.c:1241	res = esp32_apptrace_connect_targets(ctx, false, ctx->target_state == TARGET_RUNNING);
esp32_apptrace.c:1313	false /no ack target data/);
esp32_apptrace.c:1340	false /no host data/);
esp32_apptrace.c:1349	bool smp_resumed = false;
esp32_apptrace.c:1402	false /no host data/);
esp32_apptrace.c:1512	esp32_apptrace_connect_targets(&s_at_cmd_ctx, false, old_state == TARGET_RUNNING);
esp32s2.c:162	return esp32s2_stall_set(target, false);
esp32s2.c:263	xtensa->suppress_dsr_errors = false;
esp32s2.c:398	esp_xtensa->semihost.need_resume = false;
esp32s3.c:179	xtensa->suppress_dsr_errors = false;
esp32s3.c:189	bool get_timeout = false;
esp_algorithm.c:339	alloc_code_working_area = false;
esp_algorithm.c:472	retval = load_section_from_image(target, run, i, false);
esp_xtensa_smp.c:156	bool other_core_resume_req = false;
esp_xtensa_smp.c:195	all_examined = false;
esp_xtensa_smp.c:219	esp_xtensa->semihost.need_resume = false;
esp_xtensa_smp.c:256	*need_resume = false;
esp_xtensa_smp.c:301	esp_xtensa_smp->other_core_does_resume = false;
esp_xtensa_smp.c:304	curr_esp_xtensa->semihost.need_resume = false;
etb.c:135	reg_list[i].dirty = false;
etb.c:136	reg_list[i].valid = false;
etb.c:265	reg->dirty = false;
etm.c:556	reg->dirty = false;
etm.c:1665	etm_ctx->image->base_address_set = false;
etm.c:1666	etm_ctx->image->start_address_set = false;
etm.c:1673	etm_ctx->image->base_address_set = false;
fespi.c:149	fespi_info->probed = false;
fespi.c:735	fespi_info->probed = false;
fm3.c:124	fm3_info->probed = false;
fm3.c:648	fm3_info->probed = false;
fm4.c:609	return false;
fm4.c:670	fm4_bank->probed = false;
ftdi.c:265	false,
ftdi.c:328	mpsse_clock_tms_cs_out(mpsse_ctx, &zero, 0, this_len, false, ftdi_jtag_mode);
ftdi.c:367	false,
ftdi.c:390	if (tap_state_transition(tap_get_state(), false)
ftdi.c:414	false,
ftdi.c:588	mpsse_clock_tms_cs_out(mpsse_ctx, &tms, 0, this_len, false, ftdi_jtag_mode);
ftdi.c:683	mpsse_loopback_config(mpsse_ctx, false);
ftdi.c:747	bool invert_data = false;
ftdi.c:749	bool invert_input = false;
ftdi.c:751	bool invert_oe = false;
ftdi.c:755	invert_data = false;
ftdi.c:761	invert_input = false;
ftdi.c:767	invert_oe = false;
ftdi.c:1002	sig->invert_data = false;
ftdi.c:1004	sig->invert_oe = false;
ftdi.c:1158	ftdi_swd_swdio_en(false);
ftdi.c:1164	ftdi_swd_swdio_en(false);
gdb_server.c:272	connection->input_pending = false;
gdb_server.c:297	connection->input_pending = false;
gdb_server.c:530	gdb_con->busy = false;
gdb_server.c:741	gdb_con->busy = false;
gdb_server.c:834	gdb_connection->ctrl_c = false;
gdb_server.c:846	bool program_exited = false;
gdb_server.c:992	gdb_connection->ctrl_c = false;
gdb_server.c:995	gdb_connection->closed = false;
gdb_server.c:996	gdb_connection->busy = false;
gdb_server.c:998	gdb_connection->sync = false;
gdb_server.c:999	gdb_connection->mem_write_error = false;
gdb_server.c:1001	gdb_connection->extended_protocol = false;
gdb_server.c:1265	if (!reg_list[i] \|\| reg_list[i]->exist == false \|\| reg_list[i]->hidden)
gdb_server.c:1279	if (!reg_list[i] \|\| reg_list[i]->exist == false \|\| reg_list[i]->hidden)
gdb_server.c:1673	gdb_connection->mem_write_error = false;
gdb_server.c:1694	gdb_connection->mem_write_error = false;
gdb_server.c:2313	if (reg_list[i]->exist == false \|\| reg_list[i]->hidden)
gdb_server.c:2377	bool found = false;
gdb_server.c:2437	bool found = false;
gdb_server.c:2523	if (reg_list[i]->exist == false \|\| reg_list[i]->hidden)
gdb_server.c:2687	*supported = false;
gdb_server.c:2921	bool gdb_target_desc_supported = false;
gdb_server.c:2927	gdb_target_desc_supported = false;
gdb_server.c:2934	gdb_target_desc_supported = false;
gdb_server.c:3050	return false;
gdb_server.c:3087	bool fake_step = false;
gdb_server.c:3177	gdb_connection->sync = false;
gdb_server.c:3206	return false;
gdb_server.c:3268	return false;
gdb_server.c:3381	false, addr, length);
gdb_server.c:3449	&written, false);
gdb_server.c:3495	bool fileio_ctrl_c = false;
gdb_server.c:3656	gdb_con->mem_write_error = false;
gdb_server.c:3659	bool nostep = false;
gdb_server.c:3660	bool already_running = false;
gdb_server.c:3679	gdb_con->sync = false;
gdb_server.c:3727	gdb_con->attached = false;
gdb_server.c:3792	gdb_con->ctrl_c = false;
gowin.c:188	*is_fs = false;
gowin.c:355	bool is_fs = false;
gowin.c:384	retval = gowin_erase_sram(tap, false);
hla_interface.c:32	.connect_under_reset = false,
hla_interface.c:34	.use_stlink_tcp = false,
hla_interface.c:174	hl_if.layout->api->speed(hl_if.handle, speed, false);
hla_interface.c:285	bool use_stlink_tcp = false;
hla_target.c:340	bool srst_asserted = false;
hla_target.c:371	use_srst_fallback = false;
hla_target.c:536	bool bkpt_inst_found = false;
hwthread.c:257	if (!reg_list[i] \|\| reg_list[i]->exist == false \|\| reg_list[i]->hidden)
hwthread.c:270	if (!reg_list[i] \|\| reg_list[i]->exist == false \|\| reg_list[i]->hidden)
hwthread.c:372	return false;
image.c:130	bool end_rec = false;
image.c:316	end_rec = false;
image.c:364	bool load_to_vaddr = false;
image.c:489	bool load_to_vaddr = false;
image.c:639	elf->is_64_bit = false;
image.c:762	bool end_rec = false;
image.c:916	end_rec = false;
image.c:1055	image->base_address_set = false;
image.c:1068	image->base_address_set = false;
interface.c:217	is_stable = false;
ipdbg.c:704	conn->closed = false;
ipdbg.c:1024	bool has_virtual_ir = false;
ipdbg.c:1030	bool hub_configured = false;
jlink.c:364	return false;
jlink.c:431	handle_found = false;
jlink.c:467	return false;
jlink.c:472	return false;
jlink.c:525	bool equal = false;
jlink.c:530	return false;
jlink.c:534	return false;
jlink.c:586	*found_device = false;
jlink.c:687	use_usb_address = false;
jlink.c:907	if (path[i] == tap_state_transition(tap_get_state(), false))
jlink.c:1260	return false;
jlink.c:1266	return false;
jlink.c:1296	return false;
jlink.c:1468	enable = false;
jlink.c:1543	return false;
jlink.c:1549	return false;
jtagspi.c:44	bool has_jtagspi_instruction = false;
jtagspi.c:75	info->probed = false;
jtagspi.c:232	&bank, false);
jtagspi.c:244	info->always_4byte = false;
jtagspi.c:245	info->probed = false;
jtagspi.c:383	&bank, false);
jtagspi.c:448	info->probed = false;
kinetis.c:660	bool man_reset_requested = false;
kinetis.c:793	bool found = false;
kinetis.c:853	jtag_poll_set_enabled(false);
kinetis.c:866	jtag_poll_set_enabled(false);
kinetis.c:1883	bool fallback = false;
kinetis.c:1983	bool set_fcf = false;
kinetis.c:1984	bool fcf_in_data_valid = false;
kinetis.c:1985	bool fcf_differs = false;
kinetis.c:2031	fcf_in_data_valid = false;
kinetis.c:2049	fcf_in_data_valid = false;
kinetis.c:2070	set_fcf = false;
kinetis.c:2105	k_chip->probed = false;
kinetis.c:2278	bool use_nvm_marking = false;
kinetis.c:2282	k_chip->probed = false;
kinetis.c:2517	use_nvm_marking = false;
kinetis.c:2906	k_bank->probed = false;
kinetis.c:3095	use_block_cmd = false;
kinetis.c:3106	block_dirty = false;
kinetis.c:3284	k_chip->banks[bank_idx].probed = false; /* re-probe before next use */
kinetis.c:3285	k_chip->probed = false;
kinetis.c:3301	allow_fcf_writes = false;
kinetis_ke.c:605	bool found = false;
kinetis_ke.c:641	jtag_poll_set_enabled(false);
kinetis_ke.c:661	jtag_poll_set_enabled(false);
kinetis_ke.c:944	bool fcf_erased = false;
kitprog.c:184	kitprog_handle->supports_jtag_to_swd = false;
lakemont.c:314	x86_32->cache->reg_list[i].dirty = false;
lakemont.c:315	x86_32->cache->reg_list[i].valid = false;
lakemont.c:397	reg_list[i].dirty = false;
lakemont.c:398	reg_list[i].valid = false;
lakemont.c:660	x86_32->cache->reg_list[reg].dirty = false;
lakemont.c:701	x86_32->cache->reg_list[reg].dirty = false;
lakemont.c:702	x86_32->cache->reg_list[reg].valid = false;
lakemont.c:713	return false;
lakemont.c:752	return false;
lakemont.c:1196	x86_32->forced_halt_for_reset = false;
lakemont.c:1197	retval = lakemont_resume(t, true, 0x00, false, true);
lattice_bit.c:33	bit_file->has_id = false;
libusb_helper.c:62	return false;
libusb_helper.c:99	return false;
libusb_helper.c:105	return false;
libusb_helper.c:127	return false;
libusb_helper.c:134	return false;
libusb_helper.c:137	bool match = false;
libusb_helper.c:154	bool serial_mismatch = false;
libusb_helper.c:155	bool product_mismatch = false;
libusb_helper.c:202	serial_mismatch = false;
libusb_helper.c:203	product_mismatch = false;
linux.c:225	return false;
lpc2000.c:916	lpc2000_info->probed = false;
lpc2900.c:629	image.start_address_set = false;
lpc2900.c:923	lpc2900_info->is_probed = false;
lpc2900.c:965	has_unsecured_sector = false;
lpcspifi.c:64	lpcspifi_info->probed = false;
lpcspifi.c:841	lpcspifi_info->probed = false;
ls1_sap.c:207	ls1_sap_memory_cmd(target->tap, address, size, false);
mdr.c:71	mdr_info->probed = false;
mips32.c:356	mips32->core_cache->reg_list[num].dirty = false;
mips32.c:400	mips32->core_cache->reg_list[num].dirty = false;
mips32.c:507	reg_list[i].valid = false;
mips32.c:518	reg_list[i].dirty = false;
mips32.c:642	struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, false);
mips32.c:676	struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, false);
mips64.c:269	mips64->core_cache->reg_list[num].dirty = false;
mips64.c:288	mips64->core_cache->reg_list[num].dirty = false;
mips64.c:300	mips64->core_cache->reg_list[i].valid = false;
mips64.c:301	mips64->core_cache->reg_list[i].dirty = false;
mips64.c:447	mips64->bp_scanned = false;
mips64.c:452	mips64->mips64mode32 = false;
mips64.c:476	mips64->bp_scanned = false;
mips64.c:594	bool update = false;
mips64_pracc.c:281	first_time_call = false;
mips_m4k.c:312	bool srst_asserted = false;
mips_m4k.c:809	breakpoint->is_set = false;
mips_m4k.c:956	watchpoint->is_set = false;
mips_mips64.c:218	retval = mips64_enable_interrupts(target, false);
mips_mips64.c:513	comparator_list[bp_num].used = false;
mips_mips64.c:590	bp->is_set = false;
mips_mips64.c:750	retval = mips64_enable_interrupts(target, false);
mips_mips64.c:837	comparator_list[wp_num].used = false;
mips_mips64.c:840	watchpoint->is_set = false;
mpsse.c:88	return false;
mpsse.c:95	bool result = false;
mpsse.c:159	bool found = false;
mpsse.c:206	return false;
mpsse.c:213	return false;
mpsse.c:327	return false;
mpsse.c:760	mpsse_rtck_config(ctx, false); /* just try */
mpsse.c:762	if (frequency > 60000000 / 2 / 65536 && mpsse_divide_by_5_config(ctx, false) == ERROR_OK) {
mpsse.c:870	read_result.done = false;
mpsse.c:875	struct transfer_result write_result = { .ctx = ctx, .done = false };
mqx.c:239	return false;
mrvlqspi.c:836	mrvlqspi_info->probed = false;
mrvlqspi.c:938	mrvlqspi_info->probed = false;
msp432.c:494	all = false;
msp432.c:498	all = false;
msp432.c:511	all = false;
msp432.c:552	msp432_bank->unlock_bsl = false;
msp432.c:586	msp432_bank->probed_main = false;
msp432.c:587	msp432_bank->probed_info = false;
msp432.c:588	msp432_bank->unlock_bsl = false;
msp432.c:618	return msp432_mass_erase(bank, false);
mxc.c:158	mxc_nf_info->flags.biswap_enabled = false;
niietcm4.c:1050	niietcm4_info->probed = false;
niietcm4.c:1058	niietcm4_info->bflash_info_remap = false;
niietcm4.c:1062	niietcm4_info->extmem_boot = false;
niietcm4.c:1510	niietcm4_info->bflash_info_remap = false;
niietcm4.c:1536	niietcm4_info->extmem_boot = false;
nrf5.c:653	return false;
nrf5.c:846	chip->ficr_info_valid = false;
nrf5.c:1416	nbank->probed = false;
nuttx.c:68	{ "g_readytorun", false },
nuttx.c:69	{ "g_pidhash", false },
nuttx.c:70	{ "g_npidhash", false },
nuttx.c:71	{ "g_tcbinfo", false },
nuttx.c:72	{ NULL, false }
nuttx.c:126	return false;
nuttx.c:131	return false;
nuttx.c:148	return false;
opendous.c:425	if (path[i] == tap_state_transition(tap_get_state(), false))
openocd.c:79	target->verbose_halt_msg = false;
openocd.c:103	init_at_startup = false;
or1k.c:417	or1k->core_cache->reg_list[num].dirty = false;
or1k.c:446	or1k->core_cache->reg_list[num].dirty = false;
or1k.c:533	reg_list[i].dirty = false;
or1k.c:534	reg_list[i].valid = false;
or1k.c:775	return false;
pic32mm.c:214	pic32mm_info->probed = false;
pic32mm.c:850	pic32mm_info->probed = false;
pic32mm.c:852	retval = pic32mm_compute_device_layout(target, &pic32mm_info->layout, false);
pic32mm.c:1075	bool hasNonFICDDifferences = false;
pic32mx.c:203	pic32mx_info->probed = false;
pic32mx.c:690	pic32mx_info->probed = false;
picoprobe.c:276	if (0 == ((swd_cmd_queue[i].cmd ^ swd_cmd(false, false, DP_TARGETSEL)) &
pld.c:75	has_instruction = false; / default is using a proxy bitstream */
psoc4.c:722	psoc4_info->probed = false;
psoc4.c:743	psoc4_info->legacy_family = false;
psoc5lp.c:669	bool write_required = false, pullup_needed = false, ecc_changed = false;
psoc5lp.c:807	psoc_nvl_bank->probed = false;
psoc5lp.c:989	psoc_eeprom_bank->probed = false;
psoc5lp.c:1091	fast_check = false;
psoc5lp.c:1477	psoc_bank->probed = false;
psoc6.c:271	bool is_acquired = false;
psoc6.c:347	hr = ipc_poll_lock_stat(target, IPC_ID, false);
psoc6.c:490	if (psoc6_info->is_probed == false)
psoc6.c:521	return false;
psoc6.c:1023	psoc6_info->is_probed = false;
qn908x.c:374	qn908x_info->page_lock_loaded = false;
qn908x.c:375	qn908x_info->allow_swd_disabled = false;
qn908x.c:377	qn908x_info->calc_checksum = false;
qn908x.c:595	bool needs_update = false;
qn908x.c:815	*is_protected = false;
qn908x.c:1040	bool keep_lock = false;
register.c:100	reg->valid = false;
register.c:101	reg->dirty = false;
renesas_rpchf.c:405	RPC_HF_SIZE_16BIT, false, NULL, 0);
renesas_rpchf.c:562	fallback = false;
riot.c:89	{"sched_threads", false},
riot.c:90	{"sched_num_threads", false},
riot.c:91	{"sched_active_pid", false},
riot.c:92	{"max_threads", false},
riot.c:94	{NULL, false}
riot.c:384	return false;
riscv-011.c:652	scans_add_read32(scans, slot_offset(target, slot), false);
riscv-011.c:822	info->dram_cache[i].valid = false;
riscv-011.c:823	info->dram_cache[i].dirty = false;
riscv-011.c:834	info->dram_cache[i].valid = false;
riscv-011.c:835	info->dram_cache[i].dirty = false;
riscv-011.c:893	scans_add_read32(scans, address, false);
riscv-011.c:897	scans_add_read32(scans, address, false);
riscv-011.c:937	dram_write32(target, i, info->dram_cache[i].data, false);
riscv-011.c:938	info->dram_cache[i].dirty = false;
riscv-011.c:955	info->dram_cache[i].dirty = false;
riscv-011.c:964	if (wait_for_debugint_clear(target, false) != ERROR_OK) {
riscv-011.c:1090	info->tselect_dirty = false;
riscv-011.c:1151	dram_write32(target, 0, lw(S0, ZERO, DEBUG_RAM_START + 16), false);
riscv-011.c:1152	dram_write32(target, 1, csrw(S0, CSR_DCSR), false);
riscv-011.c:1153	dram_write32(target, 2, fence_i(), false);
riscv-011.c:1154	dram_write_jump(target, 3, false);
riscv-011.c:1462	return full_step(target, false);
riscv-011.c:1544	cache_write(target, 0, false);
riscv-011.c:1614	scans_add_write_jump(scans, 1, false);
riscv-011.c:1623	scans_add_read(scans, SLOT0, false);
riscv-011.c:1627	scans_add_write_store(scans, 1, S0, SLOT0, false);
riscv-011.c:1629	scans_add_write_jump(scans, 2, false);
riscv-011.c:1634	scans_add_read(scans, SLOT0, false);
riscv-011.c:1640	scans_add_read(scans, SLOT0, false);
riscv-011.c:1644	scans_add_read32(scans, 4, false);
riscv-011.c:1865	info->never_halted = false;
riscv-011.c:1938	r->prepped = false;
riscv-011.c:1939	return resume(target, debug_execution, false);
riscv-011.c:1966	dram_write32(target, 0, lw(S0, ZERO, DEBUG_RAM_START + 16), false);
riscv-011.c:1967	dram_write32(target, 1, csrw(S0, CSR_DCSR), false);
riscv-011.c:1969	dram_write_jump(target, 2, false);
riscv-011.c:2016	cache_write(target, CACHE_NO_READ, false);
riscv-011.c:2033	scans_add_read32(scans, 4, false);
riscv-011.c:2036	scans_add_read32(scans, info->dramsize-1, false);
riscv-011.c:2099	wait_for_debugint_clear(target, false);
riscv-011.c:2152	cache_write(target, 4, false);
riscv-011.c:2191	scans_add_read32(scans, info->dramsize-1, false);
riscv-011.c:2253	wait_for_debugint_clear(target, false);
riscv-013.c:567	*dmi_busy_encountered = false;
riscv-013.c:619	false);
riscv-013.c:663	return dmi_op(target, value, NULL, DMI_OP_READ, address, 0, false, true);
riscv-013.c:673	return dmi_op(target, NULL, NULL, DMI_OP_WRITE, address, value, false, true);
riscv-013.c:686	DM_DMSTATUS, 0, timeout_sec, false, true);
riscv-013.c:793	if (dmi_write_exec(target, DM_COMMAND, command, false) != ERROR_OK)
riscv-013.c:915	info->abstract_read_fpr_supported = false;
riscv-013.c:918	info->abstract_read_csr_supported = false;
riscv-013.c:954	info->abstract_write_fpr_supported = false;
riscv-013.c:957	info->abstract_write_csr_supported = false;
riscv-013.c:1320	bool use_scratch = false;
riscv-013.c:1423	bool use_scratch = false;
riscv-013.c:1500	if (dmstatus_read(target, &value, false) != ERROR_OK)
riscv-013.c:1615	if (dmstatus_read(target, &dmstatus, false) != ERROR_OK)
riscv-013.c:1756	riscv013_step_or_resume_current_hart(target, false, false);
riscv-013.c:1900	if (dmstatus_read(target, &dmstatus, false) == ERROR_OK)
riscv-013.c:2083	dmi_op(target, NULL, NULL, DMI_OP_WRITE, DM_SBADDRESS3, 0, false, false);
riscv-013.c:2085	dmi_op(target, NULL, NULL, DMI_OP_WRITE, DM_SBADDRESS2, 0, false, false);
riscv-013.c:2087	dmi_op(target, NULL, NULL, DMI_OP_WRITE, DM_SBADDRESS1, address >> 32, false, false);
riscv-013.c:2089	false, ensure_success);
riscv-013.c:2144	uint32_t sbcs_valid = false;
riscv-013.c:2147	bool sbaddress0_valid = false;
riscv-013.c:2149	bool sbaddress1_valid = false;
riscv-013.c:2515	result = dmi_op(target, &value, NULL, DMI_OP_READ, sbdata[i], 0, false, true);
riscv-013.c:2729	DMI_OP_READ, sbdata[j], 0, false);
riscv-013.c:2755	dmi_status_t status = dmi_scan(target, NULL, &value, DMI_OP_NOP, 0, 0, false);
riscv-013.c:2814	bool warn = false;
riscv-013.c:2828	r->mem_access_progbuf_warn = false;
riscv-013.c:2832	r->mem_access_sysbus_warn = false;
riscv-013.c:2836	r->mem_access_abstract_warn = false;
riscv-013.c:2882	return false;
riscv-013.c:2911	return false;
riscv-013.c:2940	return false;
riscv-013.c:2965	uint32_t command = access_memory_command(target, false, width, use_aampostincrement, false);
riscv-013.c:2998	command = access_memory_command(target, false, width, false, false);
riscv-013.c:3015	updateaddr = false;
riscv-013.c:3041	uint32_t command = access_memory_command(target, false, width, use_aampostincrement, true);
riscv-013.c:3081	command = access_memory_command(target, false, width, false, true);
riscv-013.c:3094	updateaddr = false;
riscv-013.c:3708	log_memory_access(address + i * size, value, size, false);
riscv-013.c:3722	DM_SBCS, 0, false, true) != ERROR_OK)
riscv-013.c:3877	log_memory_access(address + offset, value, size, false);
riscv-013.c:3910	setup_needed = false;
riscv-013.c:3932	DMI_OP_READ, DM_ABSTRACTCS, 0, false, true);
riscv-013.c:4001	if (mem_should_skip_progbuf(target, address, size, false, &progbuf_result))
riscv-013.c:4009	if (mem_should_skip_sysbus(target, address, size, 0, false, &sysbus_result))
riscv-013.c:4020	if (mem_should_skip_abstract(target, address, size, 0, false, &abstract_result))
riscv-013.c:4031	log_mem_access_result(target, ret == ERROR_OK, method, false);
riscv-013.c:4157	r->prepped = false;
riscv-013.c:4158	*use_hasel = false;
riscv-013.c:4179	r->prepped = false;
riscv-013.c:4187	*use_hasel = false;
riscv-013.c:4209	bool use_hasel = false;
riscv-013.c:4261	bool use_hasel = false;
riscv-013.c:4265	return riscv013_step_or_resume_current_hart(target, false, use_hasel);
riscv-013.c:4270	return riscv013_step_or_resume_current_hart(target, true, false);
riscv-013.c:4275	return riscv013_on_step_or_resume(target, false);
riscv-013.c:4292	return false;
riscv.c:527	trigger->read = false;
riscv.c:528	trigger->write = false;
riscv.c:969	breakpoint->is_set = false;
riscv.c:983	trigger->execute = false;
riscv.c:1012	watchpoint->is_set = false;
riscv.c:1415	if (old_or_new_riscv_step(target, true, 0, false) != ERROR_OK)
riscv.c:1522	debug_execution, false);
riscv.c:1812	reg_class, false);
riscv.c:1857	struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
riscv.c:1972	struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
riscv.c:1980	struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
riscv.c:2175	riscv_sample_buf_maybe_add_timestamp(target, false);
riscv.c:2178	r->sample_config.enabled = false;
riscv.c:2248	riscv_resume(target, true, 0, 0, 0, false);
riscv.c:2290	if (riscv_resume(target, true, 0, 0, 0, false) != ERROR_OK)
riscv.c:3203	return false;
riscv.c:3235	reg->valid = false;
riscv.c:3300	return false;
riscv.c:3328	reg->valid = false;
riscv.c:3365	reg->valid = gdb_regno_cacheable(regid, false);
riscv.c:3719	reg->valid = gdb_regno_cacheable(reg->number, false);
riscv.c:3977	r->dirty = false;
riscv.c:3978	r->valid = false;
riscv.c:4111	r->exist = false;
riscv.c:4231	r->exist = false;
riscv.c:4365	r->caller_save = false;
rlink.c:878	if (tap_state_transition(tap_get_state(), false) == cmd->path[state_count])
rp2040.c:372	int err2 = rp2040_ssel_active(target, false);
rp2040.c:515	priv->probed = false;
rsl10.c:668	nbank->probed = false;
rsl10.c:764	retval = rsl10_protect(bank, false, 0, 0);
rtkernel.c:77	{ "os_state", false },
rtkernel.c:78	{ "__off_os_state2chain", false },
rtkernel.c:79	{ "__off_os_state2current", false },
rtkernel.c:80	{ "__off_task2chain", false },
rtkernel.c:81	{ "__off_task2magic", false },
rtkernel.c:82	{ "__off_task2stack", false },
rtkernel.c:83	{ "__off_task2state", false },
rtkernel.c:84	{ "__off_task2name", false },
rtkernel.c:85	{ "__val_task_magic", false },
rtkernel.c:86	{ NULL, false }
rtkernel.c:299	bool cm4_fpu_enabled = false;
rtos.c:393	target->rtos_auto_detect = false;
rtt.c:58	rtt.started = false;
rtt.c:136	rtt.changed = false;
rtt.c:175	rtt.started = false;
rtt.c:174	return false;
rtt.c:177	return false;
rtt.c:248	*found = false;
semihosting_common.c:123	semihosting->is_active = false;
semihosting_common.c:129	semihosting->is_fileio = false;
semihosting_common.c:130	semihosting->hit_fileio = false;
semihosting_common.c:131	semihosting->is_resumable = false;
semihosting_common.c:132	semihosting->has_resumable_exit = false;
semihosting_common.c:165	return false;
semihosting_common.c:167	bool is_read_op = false;
semihosting_common.c:178	return false;
semihosting_common.c:188	return false;
semihosting_common.c:192	return false;
semihosting_common.c:253	semihosting->tcp_connection->input_pending = false;
semihosting_common.c:596	semihosting->is_resumable = false;
semihosting_common.c:659	semihosting->is_resumable = false;
semihosting_common.c:1676	semihosting->hit_fileio = false;
semihosting_common.c:1700	bool fileio_failed = false;
server.c:70	c->input_pending = false;
server.c:524	poll_ok = false;
sh_qspi.c:762	info->probed = false;
sim3x.c:144	sim3x_info->probed = false;
sim3x.c:782	sim3x_info->probed = false;
socket.c:64	if (!socket_set_blocking(sock, false))
socket.c:126	return false;
socket.c:147	return false;
socket.c:177	return false;
socket.c:210	return false;
socket.c:247	return false;
socket.c:291	return false;
socket.c:325	return false;
socket.c:345	return false;
socket.c:366	return false;
stlink_usb.c:1778	stlink_speed(h, initial_interface_speed, false);
stlink_usb.c:1783	stlink_speed(h, initial_interface_speed, false);
stlink_usb.c:1793	stlink_speed(h, initial_interface_speed, false);
stlink_usb.c:2169	h->reconnect_pending = false;
stlink_usb.c:2238	h->trace.enabled = false;
stlink_usb.c:3068	match = false;
stlink_usb.c:3070	match = false;
stlink_usb.c:3224	return stlink_speed_v3(handle, false, khz, query);
stlink_usb.c:3525	h->tcp_backend_priv.connected = false;
stlink_usb.c:3573	ret = stlink_tcp_send_cmd(h, 4, 16, false);
stlink_usb.c:3603	ret = stlink_tcp_send_cmd(h, 1, 4, false);
stlink_usb.c:3624	bool stlink_id_matched = false;
stlink_usb.c:4180	stlink_dap_handle->reconnect_pending = false;
stlink_usb.c:4211	dap->do_reconnect = false;
stlink_usb.c:4333	dap->stlink_flush_ap_write = false;
stlink_usb.c:4680	dap->stlink_flush_ap_write = false;
stlink_usb.c:4822	ap->tar_valid = false;
stlink_usb.c:4888	ap->tar_valid = false;
stlink_usb.c:4900	q->ap_w.changes_csw_default = false;
stlink_usb.c:5016	bool use_stlink_tcp = false;
stlink_usb.c:5178	stlink_speed(stlink_dap_handle, speed, false);
stm32f1x.c:138	stm32x_info->probed = false;
stm32f1x.c:139	stm32x_info->has_dual_banks = false;
stm32f1x.c:140	stm32x_info->can_load_options = false;
stm32f1x.c:815	stm32x_info->probed = false;
stm32f2x.c:224	stm32x_info->otp_unlocked = false;
stm32f2x.c:255	stm32x_info->probed = false;
stm32f2x.c:256	stm32x_info->otp_unlocked = false;
stm32f2x.c:996	stm32x_info->probed = false;
stm32f2x.c:997	stm32x_info->has_large_mem = false;
stm32f2x.c:998	stm32x_info->has_boot_addr = false;
stm32f2x.c:999	stm32x_info->has_extra_options = false;
stm32f2x.c:1000	stm32x_info->has_optcr2_pcrop = false;
stm32f2x.c:1157	stm32x_info->has_large_mem = false;
stm32f2x.c:1171	stm32x_info->has_large_mem = false;
stm32f2x.c:1661	stm32x_info->probed = false;
stm32h7x.c:204	.has_dual_bank = false,
stm32h7x.c:224	stm32x_info->probed = false;
stm32h7x.c:756	stm32x_info->probed = false;
stm32h7x.c:825	has_dual_bank = false;
stm32l4x.c:706	stm32l4_info->probed = false;
stm32l4x.c:707	stm32l4_info->otp_enabled = false;
stm32l4x.c:805	bool tzen = false;
stm32l4x.c:1050	stm32l4_info->probed = false;
stm32l4x.c:1806	stm32l4_info->probed = false;
stm32l4x.c:1931	stm32l4_info->dual_bank_mode = false;
stm32l4x.c:2582	stm32l4_otp_enable(bank, false);
stm32lx.c:165	.has_dual_banks = false,
stm32lx.c:177	.has_dual_banks = false,
stm32lx.c:189	.has_dual_banks = false,
stm32lx.c:201	.has_dual_banks = false,
stm32lx.c:213	.has_dual_banks = false,
stm32lx.c:252	.has_dual_banks = false, /* determined in runtime */
stm32lx.c:264	.has_dual_banks = false,
stm32lx.c:289	stm32lx_info->probed = false;
stm32lx.c:740	stm32lx_info->probed = false;
stm8.c:226	stm8->cc_valid = false;
stm8.c:914	use_srst_fallback = false;
stm8.c:1100	stm8->bp_scanned = false;
stm8.c:1137	stm8->core_cache->reg_list[num].dirty = false;
stm8.c:1156	stm8->core_cache->reg_list[num].dirty = false;
stm8.c:1217	reg_list[i].valid = false;
stm8.c:1229	reg_list[i].dirty = false;
stm8.c:1483	comparator_list[bp_num].used = false;
stm8.c:1509	breakpoint->is_set = false;
stm8.c:1581	comparator_list[wp_num].used = false;
stm8.c:1642	comparator_list[wp_num].used = false;
stm8.c:1643	watchpoint->is_set = false;
stm8.c:1866	reg_params[i].reg_name, false);
stm8.c:1900	reg_params[i].reg_name, false);
stmqspi.c:226	stmqspi_info->probed = false;
stmqspi.c:639	stmqspi_info->probed = false;
stmqspi.c:1604	return qspi_read_write_block(bank, buffer, offset, count, false);
stmqspi.c:2088	stmqspi_info->probed = false;
stmqspi.c:2111	stmqspi_info->octo = false;
stmqspi.c:2122	stmqspi_info->probed = false;
stmqspi.c:2148	stmqspi_info->probed = false;
stmqspi.c:2157	stmqspi_info->probed = false;
stmqspi.c:2174	stmqspi_info->probed = false;
stmsmi.c:142	stmsmi_info->probed = false;
stmsmi.c:522	stmsmi_info->probed = false;
svf.c:405	svf_noreset = false;
swd.h:63	return base_cmd != swd_cmd(false, false, DP_TARGETSEL);
target.c:493	target->halt_issued = false;
target.c:497	target->halt_issued = false;
target.c:630	target->running_alg = false;
target.c:655	target->examined = false;
target.c:796	target->running_alg = false;
target.c:881	target->running_alg = false;
target.c:1686	(*callbacks_p)->removed = false;
target.c:1884	callback_processing = false;
target.c:2059	c->free = false;
target.c:3055	if (reg->exist == false \|\| reg->hidden)
target.c:3123	reg->valid = false;
target.c:3238	once = false;
target.c:3700	image->base_address_set = false;
target.c:3702	image->start_address_set = false;
target.c:3900	image.base_address_set = false;
target.c:3904	image.start_address_set = false;
target.c:4195	bool mask_specified = false;
target.c:4439	bool with_range = false;
target.c:4535	bool is_phys = false;
target.c:4669	bool is_phys = false;
target.c:4824	bool force = false;
target.c:4864	false);
target.c:4935	struct reg *reg = register_get_by_name(target->reg_cache, reg_name, false);
target.c:4978	return false;
target.c:5112	replace = false;
target.c:5373	bool allow_defer = false;
target.c:5901	target->backup_working_area = false;
target.c:5913	target->halt_issued = false;
target.c:5925	target->dbg_msg_enabled = false;
target.c:5930	target->rtos_auto_detect = false;
target_request.c:31	got_message = false;
target_request.c:228	target->dbg_msg_enabled = false;
tcl.c:234	&s, &nand, FILEIO_READ, false, true);
tcl.c:274	&file, &nand, FILEIO_READ, false, true);
tcl.c:334	&s, &nand, FILEIO_WRITE, true, false);
tcl.c:536	c->use_raw = false;
tcl.c:63	bool show_sectors = false;
tcl.c:160	retval = CALL_COMMAND_HANDLER(flash_command_get_bank_probe_optional, 0, &p, false);
tcl.c:211	blank = false;
tcl.c:232	bool do_pad = false;
tcl.c:233	bool do_unlock = false;
tcl.c:403	bool auto_unlock = false;
tcl.c:435	image.base_address_set = false;
tcl.c:439	image.start_address_set = false;
tcl.c:446	auto_unlock, true, false);
tcl.c:497	retval = flash_write_unlock_verify(target, &image, &verified, false,
tcl.c:498	false, false, true);
tcl.c:73	return false;
tcl.c:421	tap->disabled_after_reset = false;
tcl.c:605	return false;
tcl.c:620	return false;
tcl.c:1046	use_new_table = false;
telnet_server.c:407	return false;
telnet_server.c:511	t_con->prompt_visible = false;
telnet_server.c:579	bool is_variable_auto_completion = false;
telnet_server.c:580	bool have_spaces = false;
telnet_server.c:664	bool ignore_cmd = false;
transport_tcp.c:479	return false;
transport_usb.c:73	found_interface = false;
transport_usb.c:99	found_endpoint_in = false;
transport_usb.c:100	found_endpoint_out = false;
transport_usb.c:387	return false;
uCOS-III.c:244	params->thread_offsets_updated = false;
ublast2_access_libusb.c:133	ublast2_firmware_image.base_address_set = false;
ublast2_access_libusb.c:202	bool renumeration = false;
ublast2_access_libusb.c:218	if (renumeration == false) {
ulink.c:265	found = false;
ulink.c:393	ulink_firmware_image.base_address_set = false;
ulink.c:1551	false);
ulink.c:1724	if (tap_state_transition(tap_get_state(), false) == path[state_count]) {
ulink.c:2105	bool download_firmware = false;
usb_blaster.c:124	.srst_asserted = false,
usb_blaster.c:125	.trst_asserted = false,
usb_blaster.c:480	if (tap_state_transition(tap_get_state(), false) == cmd->path[i])
usbprog.c:201	if (tap_state_transition(tap_get_state(), false) == cmd->path[state_count]) {
usbtoxxx.c:258	return false;
util.c:50	return false;
util.c:55	return false;
vsllink.c:377	if (path[i] == tap_state_transition(tap_get_state(), false))
vsllink.c:587	pending_scan_result->last = false;
w600.c:99	w600_info->probed = false;
w600.c:279	w600_info->probed = false;
windows_common.c:162	return false;
windows_common.c:464	found = false;
windows_common.c:509	bool winusb_backend_init = false;
windows_common.c:572	usbdk_available = false;
windows_common.c:601	usbdk_available = false;
windows_common.h:79	return false; \
windows_common.h:120	return false; \
windows_winusb.c:139	return false;
windows_winusb.c:228	return false;
windows_winusb.c:240	return false;
windows_winusb.c:2458	WinUSB_Set(hWinUSB, ReadIsochPipeAsap, false);
windows_winusb.c:2521	libusbK_Set(sub_api, IsoReadPipe, false);
windows_winusb.c:2526	libusbK_Set(sub_api, ResetDevice, false);
windows_winusb.c:2548	return false;
windows_winusb.c:2556	bool loaded = false;
windows_winusb.c:2704	policy = false;
windows_winusb.c:2746	bool found_filter = false;
windows_winusb.c:3197	bool size_should_be_zero = false;
windows_winusb.c:4033	priv->hid->uses_report_ids[j] = false;
windows_winusb.c:4448	available[i] = false;
windows_winusb.c:4497	available[i] = false;
windows_winusb.c:4712	available[i] = false;
x86_32_common.c:163	bool pg_disabled = false;
x86_32_common.c:267	bool pg_disabled = false;
x86_32_common.c:687	bool pg_disabled = false;
x86_32_common.c:769	bool pg_disabled = false;
x86_32_common.c:1174	bp->is_set = false;
x86_32_common.c:1255	wp->is_set = false;
xcf.c:402	return false;
xcf.c:569	priv->probed = false;
xcf.c:592	priv->probed = false;
xcf.c:713	return read_write_data(bank, NULL, buffer, false, offset, count);
xds110.c:250	.is_connected = false,
xds110.c:251	.is_cmapi_connected = false,
xds110.c:252	.is_cmapi_acquired = false,
xds110.c:253	.is_swd_mode = false,
xds110.c:254	.is_ap_dirty = false,
xds110.c:321	bool found = false;
xds110.c:323	bool match = false;
xds110.c:342	match = false;
xds110.c:435	return (result == 0) ? true : false;
xds110.c:460	return false;
xds110.c:469	return (result == 0) ? true : false;
xds110.c:479	return false;
xds110.c:495	return (result == 0 && size == bytes_written) ? true : false;
xds110.c:539	return false;
xds110.c:562	success = false;
xds110.c:584	return false;
xds110.c:609	bool done = false;
xds110.c:615	return false;
xds110.c:632	success = false;
xds110.c:650	success = false;
xds110.c:922	return false;
xds110.c:1016	return false;
xds110.c:1041	return false;
xds110.c:1065	return false;
xds110.c:1102	xds110.is_swd_mode = false;
xds110.c:1103	xds110.is_cmapi_connected = false;
xds110.c:1104	xds110.is_cmapi_acquired = false;
xds110.c:1119	xds110.is_swd_mode = false;
xds110.c:1120	xds110.is_cmapi_connected = false;
xds110.c:1121	xds110.is_cmapi_acquired = false;
xds110.c:1159	return false;
xds110.c:1182	xds110.use_rdbuff = false;
xds110.c:1218	return false;
xds110.c:1221	xds110.use_rdbuff = false;
xds110.c:1396	xds110.is_cmapi_acquired = false;
xds110.c:1400	xds110.is_cmapi_connected = false;
xds110.c:1412	xds110.is_connected = false;
xmc1xxx.c:516	xmc_bank->probed = false;
xmc4xxx.c:558	res = xmc4xxx_erase_sector(bank, tmp_addr, false);
xmc4xxx.c:776	res = xmc4xxx_write_page(bank, tmp_buf, (offset - start_pad), false);
xmc4xxx.c:913	bool otp_enabled = false;
xmc4xxx.c:1023	bool proin = false;
xmc4xxx.c:1152	ret = xmc4xxx_flash_protect(bank, 0, false, first, last);
xmc4xxx.c:1191	fb->write_prot_otp[i] = false;
xmc4xxx.c:1193	fb->read_protected = false;
xscale.c:204	xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = false;
xscale.c:616	xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = false;
xscale.c:893	arm->spsr->dirty = false;
xscale.c:905	r->dirty = false;
xscale.c:912	xscale->reg_cache->reg_list[i].valid = false;
xscale.c:1498	breakpoint->is_set = false;
xscale.c:1658	valid = false;
xscale.c:1680	r->dirty = false;
xscale.c:1691	r->dirty = false;
xscale.c:1755	r->dirty = false;
xscale.c:1763	r->dirty = false;
xscale.c:2183	breakpoint->is_set = false;
xscale.c:2197	breakpoint->is_set = false;
xscale.c:2362	watchpoint->is_set = false;
xscale.c:2416	reg->dirty = false;
xscale.c:2882	(*cache_p)->reg_list[i].dirty = false;
xscale.c:2883	(*cache_p)->reg_list[i].valid = false;
xscale.c:3186	bool icache = false;
xscale.c:3421	xscale->trace.image->base_address_set = false;
xscale.c:3422	xscale->trace.image->start_address_set = false;
xscale.c:3429	xscale->trace.image->base_address_set = false;
xsvf.c:218	bool collecting_path = false;
xsvf.c:330	collecting_path = false;
xtensa.c:411	return false;
xtensa.c:583	return false;
xtensa.c:644	return false;
xtensa.c:646	return false;
xtensa.c:668	bool scratch_reg_dirty = false, delay_cpenable = false;
xtensa.c:671	bool preserve_a3 = false;
xtensa.c:677	bool restore_ms = false;
xtensa.c:730	reg_list[i].dirty = false;
xtensa.c:744	reg_list[XT_REG_IDX_CPENABLE].dirty = false;
xtensa.c:810	reg_list[XT_REG_IDX_A0 + i].dirty = false;
xtensa.c:840	reg_list[realadr].dirty = false;
xtensa.c:858	xtensa->scratch_ars[s].intval = false;
xtensa.c:1000	return false;
xtensa.c:1147	xtensa->core_cache->reg_list[XT_REG_IDX_DEBUGCAUSE].dirty = false;
xtensa.c:1200	xtensa->reset_asserted = false;
xtensa.c:1348	reg_fetched = false;
xtensa.c:1357	reg_fetched = false;
xtensa.c:1364	reg_fetched = false;
xtensa.c:1453	reg_list[i].valid = false;
xtensa.c:1471	xtensa->scratch_ars[s].intval = false;
xtensa.c:1613	xtensa->halt_request = false;
xtensa.c:1708	return false;
xtensa.c:1719	return false;
xtensa.c:1730	bool ps_lowered = false;
xtensa.c:1956	return false;
xtensa.c:1988	return false;
xtensa.c:1990	return false;
xtensa.c:2067	bswap = false;
xtensa.c:2103	bool fill_head_tail = false;
xtensa.c:2177	bool swapped_w0 = false;
xtensa.c:2354	target->examined = false;
xtensa.c:2431	xtensa->trace_active = false;
xtensa.c:2721	bool usr_ps = false;
xtensa.c:2973	reg_list[didx].dirty = false;
xtensa.c:2974	reg_list[didx].valid = false;
xtensa.c:3405	xtensa->scratch_ars[s].intval = false;
xtensa.c:3626	return false;
xtensa.c:3736	bool is_dcache = false;
xtensa.c:3934	is_extended_reg = false;
xtensa.c:4312	.after_is_words = false
xtensa.c:4342	res = xtensa_dm_trace_stop(&xtensa->dbg_mod, false);
xtensa.c:4379	xtensa->trace_active = false;
xtensa.c:4459	is_all_zeroes = false;
xtensa.h:311	return false;
xtensa.h:324	return false;
xtensa_debug_module.h:573	return false;
xtensa_fileio.c:192	xtensa->proc_syscall = false;
xtensa_regs.h:129	{ .name = (n), .exist = false, .reg_num = (r), \
zephyr.c:375	.optional = false
zephyr.c:379	.optional = false
zephyr.c:383	.optional = false
zephyr.c:398	return false;
zephyr.c:409	return false;

false macro

Syntax

References