OpenOCD
target::reg_cache is only used within OpenOCD.
 
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CodeScopeDevelopment ToolsOpenOCDtarget::reg_cache

target::reg_cache field

Syntax

struct reg_cache *reg_cache;

References

LocationReferrerText
target.h:158
struct reg_cache *reg_cache; /* the first register cache of the target (core regs) */
arc.c:353arc_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
arc.c:440arc_build_bcr_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
arc.c:517arc_get_gdb_reg_list()
struct reg_cache *reg_cache = target->reg_cache;
arc.c:528arc_get_gdb_reg_list()
struct reg_cache *reg_cache = target->reg_cache;
arc.c:557arc_reg_get_field()
struct reg *reg = arc_reg_get_by_name(target->reg_cache, reg_name, true);
arc.c:602arc_get_register_value()
struct reg *reg = arc_reg_get_by_name(target->reg_cache, reg_name, true);
arc.c:625arc_set_register_value()
struct reg *reg = arc_reg_get_by_name(target->reg_cache, reg_name, true);
arc.c:722arc_configure()
if (arc_reg_get_by_name(target->reg_cache, "dccm_build", true) &&
arc.c:723arc_configure()
arc_reg_get_by_name(target->reg_cache, "aux_dccm", true))
arc.c:727arc_configure()
if (arc_reg_get_by_name(target->reg_cache, "iccm_build", true) &&
arc.c:728arc_configure()
arc_reg_get_by_name(target->reg_cache, "aux_iccm", true))
arc_cmd.c:680arc_set_reg_exists()
struct reg * const r = arc_reg_get_by_name(target->reg_cache, reg_name, true);
arm11.c:1224arm11_examine()
*register_get_last_cache_p(&target->reg_cache) =
arm7_9_common.c:2670arm7_9_examine()
cache_p = register_get_last_cache_p(&target->reg_cache);
arm7tdmi.c:596arm7tdmi_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
arm9tdmi.c:697arm9tdmi_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
arm_dpm.c:1113arm_dpm_setup()
*register_get_last_cache_p(&target->reg_cache) = cache;
armv7m.c:768armv7m_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
armv8.c:1793armv8_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
avr32_ap7k.c:166avr32_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
cortex_m.c:2665cortex_m_dwt_setup()
*register_get_last_cache_p(&target->reg_cache) = cache;
cortex_m.c:2688cortex_m_dwt_free()
register_unlink_cache(&target->reg_cache, cache);
dsp563xx.c:439dsp563xx_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
esirisc.c:1428esirisc_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
hwthread.c:311hwthread_get_thread_reg()
struct reg *reg = register_get_by_number(curr->reg_cache, reg_num, true);
hwthread.c:341hwthread_set_reg()
struct reg *reg = register_get_by_number(curr->reg_cache, reg_num, true);
lakemont.c:366lakemont_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&t->reg_cache);
mips32.c:483mips32_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
mips64.c:429mips64_build_reg_cache()
cache_p = register_get_last_cache_p(&target->reg_cache);
or1k.c:502or1k_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
riscv-011.c:1127execute_resume()
struct reg *mstatus_reg = &target->reg_cache->reg_list[GDB_REGNO_MSTATUS];
riscv-011.c:1168execute_resume()
register_cache_invalidate(target->reg_cache);
riscv-011.c:1207reg_cache_get()
struct reg *r = &target->reg_cache->reg_list[number];
riscv-011.c:1220reg_cache_set()
struct reg *r = &target->reg_cache->reg_list[number];
riscv-011.c:1228update_mstatus_actual()
struct reg *mstatus_reg = &target->reg_cache->reg_list[GDB_REGNO_MSTATUS];
riscv-011.c:1380get_register()
target->reg_cache->reg_list[regid].valid = true;
riscv-013.c:880access_register_command()
riscv_reg_info_t *reg_info = target->reg_cache->reg_list[number].arch_info;
riscv-013.c:1278register_size()
if (target->reg_cache)
riscv-013.c:1279register_size()
return target->reg_cache->reg_list[number].size;
riscv-013.c:1375register_write_direct()
if (exec_out == ERROR_OK && target->reg_cache) {
riscv-013.c:1376register_write_direct()
struct reg *reg = &target->reg_cache->reg_list[number];
riscv-013.c:1403register_read()
if (target->reg_cache) {
riscv-013.c:1404register_read()
struct reg *reg = &target->reg_cache->reg_list[number];
riscv.c:475riscv_free_registers()
if (target->reg_cache) {
riscv.c:476riscv_free_registers()
if (target->reg_cache->reg_list) {
riscv.c:477riscv_free_registers()
free(target->reg_cache->reg_list[0].arch_info);
riscv.c:479riscv_free_registers()
for (unsigned i = GDB_REGNO_COUNT; i < target->reg_cache->num_regs; i++)
riscv.c:480riscv_free_registers()
free(target->reg_cache->reg_list[i].arch_info);
riscv.c:481riscv_free_registers()
for (unsigned int i = 0; i < target->reg_cache->num_regs; i++)
riscv.c:482riscv_free_registers()
free(target->reg_cache->reg_list[i].value);
riscv.c:483riscv_free_registers()
free(target->reg_cache->reg_list);
riscv.c:485riscv_free_registers()
free(target->reg_cache);
riscv.c:1455resume_finish()
register_cache_invalidate(target->reg_cache);
riscv.c:1767riscv_get_gdb_reg_list_internal()
if (!target->reg_cache) {
riscv.c:1780riscv_get_gdb_reg_list_internal()
*reg_list_size = target->reg_cache->num_regs;
riscv.c:1794riscv_get_gdb_reg_list_internal()
(*reg_list)[i] = &target->reg_cache->reg_list[i];
riscv.c:1796riscv_get_gdb_reg_list_internal()
target->reg_cache->reg_list[i].exist &&
riscv.c:1797riscv_get_gdb_reg_list_internal()
!target->reg_cache->reg_list[i].valid) {
riscv.c:1798riscv_get_gdb_reg_list_internal()
if (target->reg_cache->reg_list[i].type->get(
riscv.c:1799riscv_get_gdb_reg_list_internal()
&target->reg_cache->reg_list[i]) != ERROR_OK)
riscv.c:1848riscv_run_algorithm()
struct reg *reg_pc = register_get_by_name(target->reg_cache, "pc", true);
riscv.c:1857riscv_run_algorithm()
struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
riscv.c:1890riscv_run_algorithm()
struct reg *reg_mstatus = register_get_by_name(target->reg_cache,
riscv.c:1972riscv_run_algorithm()
struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
riscv.c:1980riscv_run_algorithm()
struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
riscv.c:2321riscv_openocd_step()
register_cache_invalidate(target->reg_cache);
riscv.c:3232riscv_invalidate_register_cache()
register_cache_invalidate(target->reg_cache);
riscv.c:3233riscv_invalidate_register_cache()
for (size_t i = 0; i < target->reg_cache->num_regs; ++i) {
riscv.c:3234riscv_invalidate_register_cache()
struct reg *reg = &target->reg_cache->reg_list[i];
riscv.c:3321riscv_set_register()
struct reg *reg = &target->reg_cache->reg_list[regid];
riscv.c:3341riscv_get_register()
struct reg *reg = &target->reg_cache->reg_list[regid];
riscv.c:3796riscv_init_registers()
target->reg_cache = calloc(1, sizeof(*target->reg_cache));
riscv.c:3797riscv_init_registers()
if (!target->reg_cache)
riscv.c:3799riscv_init_registers()
target->reg_cache->name = "RISC-V Registers";
riscv.c:3800riscv_init_registers()
target->reg_cache->num_regs = GDB_REGNO_COUNT;
riscv.c:3805riscv_init_registers()
target->reg_cache->num_regs += entry->high - entry->low + 1;
riscv.c:3809riscv_init_registers()
target->reg_cache->num_regs);
riscv.c:3811riscv_init_registers()
target->reg_cache->reg_list =
riscv.c:3812riscv_init_registers()
calloc(target->reg_cache->num_regs, sizeof(struct reg));
riscv.c:3813riscv_init_registers()
if (!target->reg_cache->reg_list)
riscv.c:3819riscv_init_registers()
calloc(target->reg_cache->num_regs, max_reg_name_len);
riscv.c:3975riscv_init_registers()
for (uint32_t number = 0; number < target->reg_cache->num_regs; number++) {
riscv.c:3976riscv_init_registers()
struct reg *r = &target->reg_cache->reg_list[number];
stm8.c:1193stm8_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
target.c:2313target_profiling_default()
struct reg *reg = register_get_by_name(target->reg_cache, "pc", true);
target.c:3044handle_reg_command()
struct reg_cache *cache = target->reg_cache;
target.c:3086handle_reg_command()
struct reg_cache *cache = target->reg_cache;
target.c:3108handle_reg_command()
reg = register_get_by_name(target->reg_cache, CMD_ARGV[0], true);
target.c:4863target_jim_get_reg()
struct reg *reg = register_get_by_name(target->reg_cache, reg_name,
target.c:4935handle_set_reg_command()
struct reg *reg = register_get_by_name(target->reg_cache, reg_name, false);
target.c:5905target_create()
target->reg_cache = NULL;
xscale.c:2863xscale_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
xtensa.c:2937xtensa_build_reg_cache()
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
xtensa.c:3457xtensa_free_reg_cache()
register_unlink_cache(&target->reg_cache, cache);

Data Use

Type of target::reg_cache
target::reg_cache
all items filtered out