OpenOCD
reg::size is only used within OpenOCD.
 
Symbols
loading...
Files
loading...
CodeScopeDevelopment ToolsOpenOCDreg::size

reg::size field

Syntax

uint32_t size;

References

LocationReferrerText
register.h:132
uint32_t size;
arc.c:314arc_init_reg()
reg->size = 32; /* All register in ARC are 32-bit */
arm7_9_common.c:647arm7_9_execute_sys_speed()
buf_get_u32(dbg_stat->value, 0, dbg_stat->size));
arm7_9_common.c:1772arm7_9_resume()
buf_get_u32(dbg_ctrl->value, 0, dbg_ctrl->size));
arm7_9_common.c:1821arm7_9_resume()
embeddedice_write_reg(dbg_ctrl, buf_get_u32(dbg_ctrl->value, 0, dbg_ctrl->size));
armv4_5.c:542
.size = 96,
armv4_5.c:559
.size = 32,
armv4_5.c:630armv4_5_set_core_reg()
if (reg->size == 64) {
armv4_5.c:689arm_build_reg_cache()
reg_list[i].size = 32;
armv4_5.c:735arm_build_reg_cache()
reg_list[i].size = arm_vfp_v3_regs[j].bits;
armv4_5.c:1337arm_get_gdb_reg_list()
(*reg_list)[i]->size = 0;
armv4_5.c:1340arm_get_gdb_reg_list()
(*reg_list)[24]->size = 0;
armv4_5.c:1463armv4_5_run_algorithm_inner()
if (reg->size != reg_params[i].size) {
armv4_5.c:1536armv4_5_run_algorithm_inner()
if (reg->size != reg_params[i].size) {
armv7m.c:239armv7m_set_core_reg()
buf_cpy(buf, reg->value, reg->size);
armv7m.c:324armv7m_read_core_reg()
if (r->size <= 8) {
armv7m.c:347armv7m_read_core_reg()
buf_cpy(r32->value + offset, r->value, r->size);
armv7m.c:360armv7m_read_core_reg()
if (r->size == 64) {
armv7m.c:392armv7m_write_core_reg()
buf_cpy(value, r->value, r->size);
armv7m.c:395armv7m_write_core_reg()
if (r->size <= 8) {
armv7m.c:418armv7m_write_core_reg()
buf_cpy(value, r32->value + offset, r->size);
armv7m.c:432armv7m_write_core_reg()
if (r->size == 64) {
armv7m.c:570armv7m_start_algorithm()
if (reg->size != reg_params[i].size) {
armv7m.c:685armv7m_wait_algorithm()
if (reg->size != reg_params[i].size) {
armv7m.c:788armv7m_build_reg_cache()
reg_list[i].size = armv7m_regs[i].bits;
armv8.c:1695armv8_set_core_reg()
uint64_t value = buf_get_u64(buf, 0, reg->size);
armv8.c:1700armv8_set_core_reg()
if (reg->size <= 64) {
armv8.c:1704armv8_set_core_reg()
buf_set_u64(reg->value, 0, reg->size, value);
armv8.c:1707armv8_set_core_reg()
} else if (reg->size <= 128) {
armv8.c:1708armv8_set_core_reg()
uint64_t hvalue = buf_get_u64(buf + 8, 0, reg->size - 64);
armv8.c:1711armv8_set_core_reg()
buf_set_u64(reg->value + 8, 0, reg->size - 64, hvalue);
armv8.c:1766armv8_set_core_reg32()
if (reg->size <= 32)
armv8.c:1768armv8_set_core_reg32()
else if (reg->size <= 64) {
armv8.c:1815armv8_build_reg_cache()
reg_list[i].size = armv8_regs[i].bits;
armv8.c:1857armv8_build_reg_cache()
reg_list32[i].size = armv8_regs32[i].bits;
armv8_dpm.c:650dpmv8_read_reg()
if (r->size <= 64) {
armv8_dpm.c:657dpmv8_read_reg()
buf_set_u64(r->value, 0, r->size, value_64);
armv8_dpm.c:658dpmv8_read_reg()
if (r->size == 64)
armv8_dpm.c:663dpmv8_read_reg()
} else if (r->size <= 128) {
armv8_dpm.c:672dpmv8_read_reg()
buf_set_u64(r->value + 8, 0, r->size - 64, hvalue);
armv8_dpm.c:693dpmv8_write_reg()
if (r->size <= 64) {
armv8_dpm.c:696dpmv8_write_reg()
value_64 = buf_get_u64(r->value, 0, r->size);
armv8_dpm.c:701dpmv8_write_reg()
if (r->size == 64)
armv8_dpm.c:706dpmv8_write_reg()
} else if (r->size <= 128) {
armv8_dpm.c:710dpmv8_write_reg()
hvalue = buf_get_u64(r->value + 8, 0, r->size - 64);
avr32_ap7k.c:186avr32_build_reg_cache()
reg_list[i].size = 32;
cortex_m.c:304cortex_m_fast_read_all_regs()
if (r->size <= 8) {
cortex_m.c:318cortex_m_fast_read_all_regs()
if (r->size == 32)
cortex_m.c:379cortex_m_fast_read_all_regs()
buf_cpy(r32->value + offset, r->value, r->size);
cortex_m.c:385cortex_m_fast_read_all_regs()
if (r->size == 64) {
cortex_m.c:2541cortex_m_dwt_set_reg()
buf_get_u32(buf, 0, reg->size));
cortex_m.c:2599cortex_m_dwt_addreg()
r->size = d->size;
dsp563xx.c:423dsp563xx_set_core_reg()
buf_set_u32(reg->value, 0, reg->size, value);
dsp563xx.c:463dsp563xx_build_reg_cache()
reg_list[i].size = 32; /* dsp563xx_regs[i].bits; */
dsp563xx.c:1410dsp563xx_run_algorithm()
if (reg->size != reg_params[i].size) {
dsp563xx.c:1451dsp563xx_run_algorithm()
if (reg->size != reg_params[i].size) {
embeddedice.c:196embeddedice_build_reg_cache()
reg_list[i].size = eice_regs[i].width;
embeddedice.c:229embeddedice_build_reg_cache()
reg_list[EICE_DBG_CTRL].size = 3;
embeddedice.c:230embeddedice_build_reg_cache()
reg_list[EICE_DBG_STAT].size = 5;
embeddedice.c:234embeddedice_build_reg_cache()
reg_list[EICE_DBG_CTRL].size = 4;
embeddedice.c:235embeddedice_build_reg_cache()
reg_list[EICE_DBG_STAT].size = 5;
embeddedice.c:241embeddedice_build_reg_cache()
reg_list[EICE_DBG_CTRL].size = 6;
embeddedice.c:242embeddedice_build_reg_cache()
reg_list[EICE_DBG_STAT].size = 5;
embeddedice.c:248embeddedice_build_reg_cache()
reg_list[EICE_DBG_CTRL].size = 6;
embeddedice.c:249embeddedice_build_reg_cache()
reg_list[EICE_DBG_STAT].size = 5;
embeddedice.c:254embeddedice_build_reg_cache()
reg_list[EICE_DBG_CTRL].size = 6;
embeddedice.c:255embeddedice_build_reg_cache()
reg_list[EICE_DBG_STAT].size = 5;
embeddedice.c:261embeddedice_build_reg_cache()
reg_list[EICE_DBG_CTRL].size = 6;
embeddedice.c:262embeddedice_build_reg_cache()
reg_list[EICE_DBG_STAT].size = 10;
embeddedice.c:269embeddedice_build_reg_cache()
reg_list[EICE_DBG_CTRL].size = 6;
embeddedice.c:270embeddedice_build_reg_cache()
reg_list[EICE_DBG_STAT].size = 5;
embeddedice.c:477embeddedice_set_reg()
buf_set_u32(reg->value, 0, reg->size, value);
embeddedice.c:491embeddedice_set_reg_w_exec()
embeddedice_set_reg(reg, buf_get_u32(buf, 0, reg->size));
embeddedice.c:521embeddedice_store_reg()
embeddedice_write_reg(reg, buf_get_u32(reg->value, 0, reg->size));
esirisc.c:872esirisc_resume_or_step()
address = buf_get_u32(esirisc->epc->value, 0, esirisc->epc->size);
esirisc.c:874esirisc_resume_or_step()
buf_set_u32(esirisc->epc->value, 0, esirisc->epc->size, address);
esirisc.c:1047esirisc_debug_entry()
uint32_t eid = buf_get_u32(esirisc->eid->value, 0, esirisc->eid->size);
esirisc.c:1056esirisc_debug_entry()
buf_get_u32(esirisc->epc->value, 0, esirisc->epc->size));
esirisc.c:1239esirisc_arch_state()
uint32_t epc = buf_get_u32(esirisc->epc->value, 0, esirisc->epc->size);
esirisc.c:1240esirisc_arch_state()
uint32_t ecas = buf_get_u32(esirisc->ecas->value, 0, esirisc->ecas->size);
esirisc.c:1241esirisc_arch_state()
uint32_t eid = buf_get_u32(esirisc->eid->value, 0, esirisc->eid->size);
esirisc.c:1242esirisc_arch_state()
uint32_t ed = buf_get_u32(esirisc->ed->value, 0, esirisc->ed->size);
esirisc.c:1313esirisc_read_reg()
buf_set_u32(reg->value, 0, reg->size, data);
esirisc.c:1326esirisc_write_reg()
uint32_t data = buf_get_u32(reg->value, 0, reg->size);
esirisc.c:1358esirisc_read_csr()
buf_set_u32(reg->value, 0, reg->size, data);
esirisc.c:1371esirisc_write_csr()
uint32_t data = buf_get_u32(reg->value, 0, reg->size);
esirisc.c:1406esirisc_set_reg()
uint32_t value = buf_get_u32(buf, 0, reg->size);
esirisc.c:1413esirisc_set_reg()
buf_set_u32(reg->value, 0, reg->size, value);
esirisc.c:1453esirisc_build_reg_cache()
reg->size = esirisc->num_bits;
esirisc.c:1472esirisc_build_reg_cache()
reg->size = esirisc->num_bits;
etb.c:134etb_build_reg_cache()
reg_list[i].size = 32;
etb.c:140etb_build_reg_cache()
reg_list[i].size = 32;
etb.c:263etb_set_reg()
buf_set_u32(reg->value, 0, reg->size, value);
etb.c:274etb_set_reg_w_exec()
etb_set_reg(reg, buf_get_u32(buf, 0, reg->size));
etm.c:265etm_reg_add()
reg->size = r->size;
etm.c:414etm_store_reg()
return etm_write_reg(reg, buf_get_u32(reg->value, 0, reg->size));
etm.c:554etm_set_reg()
buf_set_u32(reg->value, 0, reg->size, value);
etm.c:565etm_set_reg_w_exec()
etm_set_reg(reg, buf_get_u32(buf, 0, reg->size));
etm.c:1594handle_etm_status_command()
unsigned s = buf_get_u32(reg->value, 0, reg->size);
feroceon.c:674feroceon_examine()
arm7_9->eice_cache->reg_list[EICE_DBG_CTRL].size = 6;
feroceon.c:675feroceon_examine()
arm7_9->eice_cache->reg_list[EICE_DBG_STAT].size = 5;
gdb_server.c:1187gdb_str_to_target()
buf_len = DIV_ROUND_UP(reg->size, 8);
gdb_server.c:1225gdb_get_reg_value_as_str()
const unsigned int len = DIV_ROUND_UP(reg->size, 8) * 2;
gdb_server.c:1267gdb_get_registers_packet()
reg_packet_size += DIV_ROUND_UP(reg_list[i]->size, 8) * 2;
gdb_server.c:1288gdb_get_registers_packet()
reg_packet_p += DIV_ROUND_UP(reg_list[i]->size, 8) * 2;
gdb_server.c:1341gdb_set_registers_packet()
int chars = (DIV_ROUND_UP(reg_list[i]->size, 8) * 2);
gdb_server.c:1346gdb_set_registers_packet()
bin_buf = malloc(DIV_ROUND_UP(reg_list[i]->size, 8));
gdb_server.c:1399gdb_get_register_packet()
reg_packet = calloc(DIV_ROUND_UP(reg_list[reg_num]->size, 8) * 2 + 1, 1); /* plus one for string termination null */
gdb_server.c:1409gdb_get_register_packet()
gdb_put_packet(connection, reg_packet, DIV_ROUND_UP(reg_list[reg_num]->size, 8) * 2);
gdb_server.c:1461gdb_set_register_packet()
if (chars != (DIV_ROUND_UP(reg_list[reg_num]->size, 8) * 2)) {
gdb_server.c:1463gdb_set_register_packet()
chars * 4, reg_list[reg_num]->size, reg_list[reg_num]->name);
gdb_server.c:2387smp_reg_list_noread()
if (a->size != b->size) {
gdb_server.c:2390smp_reg_list_noread()
a->name, a->size, b->size);
gdb_server.c:2555gdb_generate_target_description()
" bitsize=\"%" PRIu32 "\"", reg_list[i]->size);
hwthread.c:282hwthread_get_thread_reg_list()
(*rtos_reg_list)[j].size = reg_list[i]->size;
hwthread.c:284hwthread_get_thread_reg_list()
DIV_ROUND_UP(reg_list[i]->size, 8));
hwthread.c:322hwthread_get_thread_reg()
rtos_reg->size = reg->size;
hwthread.c:323hwthread_get_thread_reg()
unsigned bytes = (reg->size + 7) / 8;
lakemont.c:395lakemont_build_reg_cache()
reg_list[i].size = 32;
linux.c:214linux_os_thread_reg_list()
(*reg_list)[i].size = gdb_reg_list[i]->size;
mem_ap.c:227mem_ap_get_gdb_reg_list()
regs[i].size = REG_SIZE(i);
mips32.c:246mips32_set_core_reg()
if (reg->size == 64)
mips32.c:254mips32_set_core_reg()
if (reg->size == 64)
mips32.c:279mips32_set_all_fpr_width()
reg_list[i].size = fp64 ? 64 : 32;
mips32.c:504mips32_build_reg_cache()
reg_list[i].size = mips32_regs[i].size ? 64 : 32;
mips32.c:649mips32_run_algorithm()
if (reg->size != reg_params[i].size) {
mips32.c:682mips32_run_algorithm()
if (reg->size != reg_params[i].size) {
mips64.c:416mips64_build_reg_cache()
r->size = reg_type2size(mips64_regs[i].type);
nuttx.c:362nuttx_getreg_current_thread()
(*reg_list)[i].size = gdb_reg_list[i]->size;
or1k.c:531or1k_build_reg_cache()
reg_list[i].size = 32;
riscv-011.c:1212reg_cache_get()
uint64_t value = buf_get_u64(r->value, 0, r->size);
riscv-011.c:1223reg_cache_set()
buf_set_u64(r->value, 0, r->size, value);
riscv-013.c:1279register_size()
return target->reg_cache->reg_list[number].size;
riscv-013.c:1377register_write_direct()
buf_set_u64(reg->value, 0, reg->size, value);
riscv-013.c:1405register_read()
buf_set_u64(reg->value, 0, reg->size, *value);
riscv.c:1851riscv_run_algorithm()
uint64_t saved_pc = buf_get_u64(reg_pc->value, 0, reg_pc->size);
riscv.c:1863riscv_run_algorithm()
if (r->size != reg_params[i].size) {
riscv.c:1865riscv_run_algorithm()
reg_params[i].reg_name, r->size, reg_params[i].size);
riscv.c:1876riscv_run_algorithm()
saved_regs[r->number] = buf_get_u64(r->value, 0, r->size);
riscv.c:1898riscv_run_algorithm()
current_mstatus = buf_get_u64(reg_mstatus->value, 0, reg_mstatus->size);
riscv.c:1951riscv_run_algorithm()
uint64_t final_pc = buf_get_u64(reg_pc->value, 0, reg_pc->size);
riscv.c:3322riscv_set_register()
buf_set_u64(reg->value, 0, reg->size, value);
riscv.c:3349riscv_get_register()
*value = buf_get_u64(reg->value, 0, reg->size);
riscv.c:3717register_get()
buf_set_u64(reg->value, 0, reg->size, value);
riscv.c:3720register_get()
char *str = buf_to_hex_str(reg->value, reg->size);
riscv.c:3733register_set()
char *str = buf_to_hex_str(buf, reg->size);
riscv.c:3743register_set()
memcpy(reg->value, buf, DIV_ROUND_UP(reg->size, 8));
riscv.c:3767register_set()
uint64_t value = buf_get_u64(buf, 0, reg->size);
riscv.c:3983riscv_init_registers()
r->size = riscv_xlen(target);
riscv.c:4102riscv_init_registers()
r->size = 64;
riscv.c:4109riscv_init_registers()
r->size = 32;
riscv.c:4362riscv_init_registers()
r->size = 8;
riscv.c:4367riscv_init_registers()
r->size = info->vlenb * 8;
riscv.c:4411riscv_init_registers()
r->value = calloc(1, DIV_ROUND_UP(r->size, 8));
stm8.c:559stm8_set_core_reg()
uint32_t value = buf_get_u32(buf, 0, reg->size);
stm8.c:1214stm8_build_reg_cache()
reg_list[i].size = stm8_regs[i].bits;
target.c:3060handle_reg_command()
reg->size);
target.c:3064handle_reg_command()
reg->size, value,
target.c:3072handle_reg_command()
reg->size);
target.c:3132handle_reg_command()
char *value = buf_to_hex_str(reg->value, reg->size);
target.c:3133handle_reg_command()
command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
target.c:3140handle_reg_command()
uint8_t *buf = malloc(DIV_ROUND_UP(reg->size, 8));
target.c:3146handle_reg_command()
int retval = CALL_COMMAND_HANDLER(command_parse_str_to_buf, CMD_ARGV[1], buf, reg->size);
target.c:3156handle_reg_command()
char *value = buf_to_hex_str(reg->value, reg->size);
target.c:3157handle_reg_command()
command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
target.c:4881target_jim_get_reg()
char *reg_value = buf_to_hex_str(reg->value, reg->size);
target.c:4942handle_set_reg_command()
uint8_t *buf = malloc(DIV_ROUND_UP(reg->size, 8));
target.c:4948handle_set_reg_command()
int retval = CALL_COMMAND_HANDLER(command_parse_str_to_buf, reg_value, buf, reg->size);
xscale.c:2884xscale_build_reg_cache()
(*cache_p)->reg_list[i].size = 32;
xscale.c:3563xscale_handle_cp15()
command_print(CMD, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size),
xtensa.c:468xtensa_core_reg_set()
buf_cpy(buf, reg->value, reg->size);
xtensa.c:1421xtensa_fetch_all_regs()
buf_cpy(regvals[realadr].buf, reg_list[i].value, reg_list[i].size);
xtensa.c:1423xtensa_fetch_all_regs()
buf_cpy(regvals[rlist[ridx].reg_num].buf, reg_list[i].value, reg_list[i].size);
xtensa.c:2734xtensa_start_algorithm()
buf_cpy(reg->value, xtensa->algo_context_backup[i], reg->size);
xtensa.c:2769xtensa_start_algorithm()
if (reg->size != reg_params[i].size) {
xtensa.c:2780xtensa_start_algorithm()
xtensa_reg_set_value(reg, buf_get_u32(reg_params[i].value, 0, reg->size));
xtensa.c:2845xtensa_wait_algorithm()
if (reg->size != reg_params[i].size) {
xtensa.c:2878xtensa_wait_algorithm()
buf_cpy(xtensa->algo_context_backup[i], reg->value, reg->size);
xtensa.c:2881xtensa_wait_algorithm()
} else if (memcmp(xtensa->algo_context_backup[i], reg->value, reg->size / 8)) {
xtensa.c:2882xtensa_wait_algorithm()
if (reg->size <= 32) {
xtensa.c:2885xtensa_wait_algorithm()
buf_get_u32(reg->value, 0, reg->size),
xtensa.c:2886xtensa_wait_algorithm()
buf_get_u32(xtensa->algo_context_backup[i], 0, reg->size));
xtensa.c:2887xtensa_wait_algorithm()
} else if (reg->size <= 64) {
xtensa.c:2890xtensa_wait_algorithm()
buf_get_u64(reg->value, 0, reg->size),
xtensa.c:2891xtensa_wait_algorithm()
buf_get_u64(xtensa->algo_context_backup[i], 0, reg->size));
xtensa.c:2893xtensa_wait_algorithm()
LOG_DEBUG("restoring register %s %u-bits", xtensa->core_cache->reg_list[i].name, reg->size);
xtensa.c:2895xtensa_wait_algorithm()
buf_cpy(xtensa->algo_context_backup[i], reg->value, reg->size);
xtensa.c:2967xtensa_build_reg_cache()
reg_list[didx].size = 32;
xtensa.c:3013xtensa_build_reg_cache()
xtensa->empty_regs[i].size = 32;
xtensa.c:3061xtensa_build_reg_cache()
xtensa->algo_context_backup[i] = calloc(1, reg->size / 8);

Data Use

Functions writing reg::size
Functions reading reg::size
all items filtered out
reg::size
all items filtered out
Type of reg::size
reg::size
uint32_t
all items filtered out