riscv011_info_t::dramsize - syntax, references, description

References

Location	Referrer	Text
riscv-011.c:183		unsigned int dramsize;
riscv-011.c:244	slot_offset()	case SLOT_LAST: return info->dramsize-1;
riscv-011.c:251	slot_offset()	case SLOT_LAST: return info->dramsize-2;
riscv-011.c:821	cache_invalidate()	for (unsigned int i = 0; i < info->dramsize; i++) {
riscv-011.c:832	cache_clean()	for (unsigned int i = 0; i < info->dramsize; i++) {
riscv-011.c:844	cache_check()	for (unsigned int i = 0; i < info->dramsize; i++) {
riscv-011.c:866	cache_write()	scans_t *scans = scans_new(target, info->dramsize + 2);
riscv-011.c:870	cache_write()	unsigned int last = info->dramsize;
riscv-011.c:871	cache_write()	for (unsigned int i = 0; i < info->dramsize; i++) {
riscv-011.c:876	cache_write()	if (last == info->dramsize) {
riscv-011.c:881	cache_write()	for (unsigned int i = 0; i < info->dramsize; i++) {
riscv-011.c:933	cache_write()	for (unsigned int i = 0; i < info->dramsize; i++) {
riscv-011.c:954	cache_write()	for (unsigned int i = 0; i < info->dramsize; i++)
riscv-011.c:1048	read_remote_csr()	uint32_t exception = cache_get32(target, info->dramsize-1);
riscv-011.c:1257	register_read()	uint32_t exception = cache_get32(target, info->dramsize-1);
riscv-011.c:1328	register_write()	if (cache_write(target, info->dramsize - 1, true) != ERROR_OK)
riscv-011.c:1331	register_write()	uint32_t exception = cache_get32(target, info->dramsize-1);
riscv-011.c:1520	examine()	info->dramsize = get_field(dminfo, DMINFO_DRAMSIZE) + 1;
riscv-011.c:1541	examine()	for (unsigned i = 6; i < info->dramsize; i++)
riscv-011.c:1563	examine()	uint32_t exception = cache_get32(target, info->dramsize-1);
riscv-011.c:2036	read_memory()	scans_add_read32(scans, info->dramsize-1, false);
riscv-011.c:2191	write_memory()	scans_add_read32(scans, info->dramsize-1, false);