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log.h:126
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LOG_INFO macro
Syntax
Arguments
expr
References
| Location | Text |
|---|---|
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware watchpoint available"); | |
LOG_INFO("adapter-specific clock speed value %d", speed_var); | |
LOG_INFO("RCLK (adaptive clock speed) not supported - fallback to %d kHz" | |
LOG_INFO("clock speed %d kHz", actual_khz); | |
LOG_INFO("RCLK (adaptive clock speed)"); | |
LOG_INFO("DAP transaction stalled (WAIT) - slowing down and resending"); | |
LOG_INFO("Read DPIDR 0x%08" PRIx32 | |
LOG_INFO("Read incorrect DLPIDR 0x%08" PRIx32 | |
LOG_INFO("SWD DPIDR 0x%08" PRIx32 ", DLPIDR 0x%08" PRIx32, | |
LOG_INFO("SWD DPIDR 0x%08" PRIx32, dpidr); | |
LOG_INFO("Unknown Class. Using Apollo-64 as default."); | |
LOG_INFO("Not yet implemented"); | |
LOG_INFO("Flashing main array"); | |
LOG_INFO("Main array flashed"); | |
LOG_INFO("Target already probed"); | |
LOG_INFO("Programming OTP finished."); | |
LOG_INFO("ARM-JTAG-EW initial read failed, don't worry"); | |
LOG_INFO("ARM-JTAG-EW JTAG Interface ready"); | |
LOG_INFO( | |
LOG_INFO( | |
LOG_INFO("found %s", type); | |
LOG_INFO("no watchpoint unit available for hardware breakpoint"); | |
LOG_INFO("only breakpoints of two (Thumb) or four (ARM) bytes length supported"); | |
LOG_INFO("no working area available, falling back to memory writes"); | |
LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints", | |
LOG_INFO("SWO pin data rate adjusted by adapter to %d Hz", swo_pin_freq); | |
LOG_INFO("SWO pin data rate adjusted to %d Hz", swo_pin_freq); | |
LOG_INFO("outer cache already initialized\n"); | |
LOG_INFO("%s: MPIDR level2 %x, cluster %x, core %x, %s, %s", | |
LOG_INFO("outer: Non-Cacheable"); | |
LOG_INFO("outer: Write-Back, Write-Allocate"); | |
LOG_INFO("outer: Write-Through, No Write-Allocate"); | |
LOG_INFO("outer: Write-Back, no Write-Allocate"); | |
LOG_INFO("inner: Non-Cacheable"); | |
LOG_INFO("inner: Strongly-ordered"); | |
LOG_INFO("inner: Device"); | |
LOG_INFO("inner: Write-Back, Write-Allocate"); | |
LOG_INFO("inner: Write-Through"); | |
LOG_INFO("inner: Write-Back, no Write-Allocate"); | |
LOG_INFO("inner: %" PRIx32 " ???", INNER); | |
LOG_INFO("ARM_MODE_HANDLER not currently supported, using ARM_MODE_THREAD instead"); | |
LOG_INFO("Unknown physical address size"); | |
LOG_INFO("Cannot reach EL %i, SPSR corrupted?", target_el); | |
LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints", | |
LOG_INFO("SAM3 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows", | |
LOG_INFO("sam3 auto-erases while programming (request ignored)"); | |
LOG_INFO("SAM4 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows", | |
LOG_INFO("sam4 does not auto-erase while programming (Erasing relevant sectors)"); | |
LOG_INFO("Erasing sector: 0x%08x", i); | |
LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRIu32 "B pages, %" PRIu32 "KB RAM)", | |
LOG_INFO("Data word %d, bit %d corrected.", | |
LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")", | |
LOG_INFO("flash bank command"); | |
LOG_INFO("device id = 0x%08" PRIx32 "", device_id); | |
LOG_INFO("erasing lock region %u", i); | |
LOG_INFO("device id: %08" PRIx32, devid); | |
LOG_INFO("target is halted"); | |
LOG_INFO("device id = 0x%08" PRIx32 "", device_id); | |
LOG_INFO("device id = 0x%08" PRIx32 "", device_id); | |
LOG_INFO("Fixup %d unaligned read head bytes", align); | |
LOG_INFO("Fixup %d unaligned head bytes", align); | |
LOG_INFO("Programming at 0x%08" PRIx32 ", count 0x%08" | |
LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", | |
LOG_INFO("Successfully loaded memory map of ChibiOS/RT target " | |
LOG_INFO("Only showing current execution because of a broken " | |
LOG_INFO("It looks like the target may be running ChibiOS " | |
LOG_INFO("Chromium-EC: Buildinfo: %s", build_info_buf); | |
LOG_INFO("CMSIS-DAP: Serial# = %s", &data[1]); | |
LOG_INFO("CMSIS-DAP: FW Version = %s", &data[1]); | |
LOG_INFO("SWCLK/TCK = %d SWDIO/TMS = %d TDI = %d TDO = %d nTRST = %d nRESET = %d", | |
LOG_INFO("CMSIS-DAP: Interface Initialised (SWD)"); | |
LOG_INFO("CMSIS-DAP: Interface Initialised (JTAG)"); | |
LOG_INFO("Connecting under reset"); | |
LOG_INFO("CMSIS-DAP: Interface ready"); | |
LOG_INFO("cmsis-dap JTAG TLR_RESET"); | |
LOG_INFO("SWO-trace disabled."); | |
LOG_INFO("SWO-trace frequency autodetection not implemented."); | |
LOG_INFO("Returned data %02" PRIx8 " %02" PRIx8 " %02" PRIx8 " %02" PRIx8, | |
LOG_INFO("Using CMSIS-DAPv2 interface with VID:PID=0x%04x:0x%04x, serial=%s", | |
LOG_INFO("Programming FLASH section %d/%d (%d bytes) at 0x%08x...", section + 1, image->num_sections, sections[section]->size, sections[section]->base_address); | |
LOG_INFO("TAP %s does not have valid IDCODE (idcode=0x%" PRIx32 ")", | |
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware watchpoint available"); | |
LOG_INFO("LPC55Sx: found entry point at 0x%08x.", breakpointAddress); | |
LOG_INFO("The erratum 3092511 workaround will resume after an incorrect halt"); | |
LOG_INFO("DSP56%03" PRIu32 " device found", chip); | |
LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " " | |
LOG_INFO("detected part: %s Gecko, rev %d", | |
LOG_INFO("Device Security Bit Set"); | |
LOG_INFO("flash size = %d KiB", num_pages * page_size / 1024); | |
LOG_INFO("Embedded ICE version %d", eice_version); | |
LOG_INFO("%s: hardware has %d breakpoint/watchpoint unit%s", | |
LOG_INFO("apptrace: Trying to connect to %s:%s", cur_hostname, cur_portname); | |
LOG_INFO("apptrace: Connected!"); | |
LOG_INFO("Targets connected."); | |
LOG_INFO("Targets disconnected."); | |
LOG_INFO("Resume targets"); | |
LOG_INFO("Stop waiting for the last data due to timeout."); | |
LOG_INFO("ETM v%d.%d", bcd_vers >> 4, bcd_vers & 0xf); | |
LOG_INFO("no working area available, falling back to memory writes"); | |
LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")", | |
LOG_INFO("Fujitsu MB9[A/B]FXXX: FLASH Write ..."); | |
LOG_INFO("*** Erasing mb9bfxxx type"); | |
LOG_INFO("*** Erasing mb9afxxx type"); | |
LOG_INFO("Fujitsu MB9[A/B]xxx: Chip Erase ... (may take several seconds)"); | |
LOG_INFO("ftdi: if you experience problems at higher adapter clocks, try " | |
LOG_INFO("FTDI SWD mode enabled"); | |
LOG_INFO("Failed detecting Target Description Support, disabling"); | |
LOG_INFO("GDB set inferior command line to '%s'", cmdline); | |
LOG_INFO("GDB set inferior command line to '%s' but semihosting is unavailable", cmdline); | |
LOG_INFO("Erasing FLASH: 0x%08x-0x%08x...", (uint32_t)addr, (uint32_t)(addr + length)); | |
LOG_INFO("The target is not running when halt was requested, stopping GDB."); | |
LOG_INFO("Hardware thread awareness created"); | |
LOG_INFO("unable to check. Please specify with position 'intel set_check_pos'."); | |
LOG_INFO("received xon cmd: %d\n", xon_cmd); | |
LOG_INFO("IPDBG start_polling"); | |
LOG_INFO("IPDBG stop_polling"); | |
LOG_INFO("New IPDBG Connection"); | |
LOG_INFO("Closed IPDBG Connection"); | |
LOG_INFO("Found devices:"); | |
LOG_INFO("Device %zu serial: %" PRIu32, i, serial); | |
LOG_INFO("%s", firmware_version); | |
LOG_INFO("Hardware version: %u.%02u", hwver.major, hwver.minor); | |
LOG_INFO("VTarget = %u.%03u V", hwstatus.target_voltage / 1000, | |
LOG_INFO("Given SWO frequency too high, using %" PRIu32 " Hz instead", | |
LOG_INFO("Given SWO frequency too low, using %" PRIu32 " Hz instead", | |
LOG_INFO("Given SWO frequency is not supported by the device, " | |
LOG_INFO("Trying to auto-detect SWO frequency"); | |
LOG_INFO("flash \'%s\' id = unknown\nflash size = %" PRIu32 " kbytes", | |
LOG_INFO("flash \'%s\' id = unknown\nflash size = %" PRIu32 " bytes", | |
LOG_INFO("Found flash device \'%s\' (ID 0x%06" PRIx32 ")", | |
LOG_INFO("MDM: Press RESET button now if possible."); | |
LOG_INFO("Mass erase of a secured MCU is not possible without hardware reset."); | |
LOG_INFO("Connect SRST, use 'reset_config srst_only' and retry."); | |
LOG_INFO("MDM: Chip is unsecured. Continuing."); | |
LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%04" PRIx16 ")", wdog); | |
LOG_INFO("WDOG_STCTRLH = 0x%04" PRIx16, wdog); | |
LOG_INFO("Disabling Kinetis watchdog (initial WDOG_CS 0x%08" PRIx32 ")", wdog_cs); | |
LOG_INFO("Disabling Kinetis watchdog (initial SIM_COPC 0x%02" PRIx8 ")", sim_copc); | |
LOG_INFO("Protection bits will be written at the next FCF sector erase or write."); | |
LOG_INFO("Do not issue 'flash info' command until protection is written,"); | |
LOG_INFO("doing so would re-read protection status from MCU."); | |
LOG_INFO("Switching from VLPR to RUN mode."); | |
LOG_INFO("This device supports Program Longword execution only."); | |
LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " " | |
LOG_INFO("Setting of backdoor key is not supported in mode 'kinetis fcf_source protection'."); | |
LOG_INFO("Flash protection requested in the programmed file differs from current setting."); | |
LOG_INFO("Data flash protection requested in the programmed file differs from current setting."); | |
LOG_INFO("Device security requested in the programmed file! Write denied."); | |
LOG_INFO("Strange unsecure mode 0x%02" PRIx8 | |
LOG_INFO("FOPT requested in the programmed file differs from current setting, set 'kinetis fopt 0x%02" | |
LOG_INFO("Cannot re-program FCF. Expect verify errors at FCF (0x400-0x40f)."); | |
LOG_INFO("Trying to re-program FCF."); | |
LOG_INFO("Flash re-programming may fail on this device!"); | |
LOG_INFO("%s detected: %u flash blocks", k_chip->name, k_chip->num_pflash_blocks + k_chip->num_nvm_blocks); | |
LOG_INFO("%u FlexNVM banks: %" PRIu32 " KiB total, %" PRIu32 " KiB available as data flash, %" | |
LOG_INFO("%u FlexNVM banks: %" PRIu32 " KiB total, %" PRIu32 " KiB available as data flash, %" | |
LOG_INFO("DEPART 0x%" PRIx8 ", EEPROM size code 0x%" PRIx8, | |
LOG_INFO("Flash clock ready"); | |
LOG_INFO("Watchdog stopped"); | |
LOG_INFO("MDM: Chip is unsecured. Continuing."); | |
LOG_INFO("Kinetis KE: FLASH Write ..."); | |
LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " " | |
LOG_INFO("KE02 sub-family"); | |
LOG_INFO("KE04 sub-family"); | |
LOG_INFO("KE06 sub-family"); | |
LOG_INFO("KitProg v%u.%02u", | |
LOG_INFO("Hardware version: %u", | |
LOG_INFO("VTARG = %u.%03u V", | |
LOG_INFO("target running for unknown reason"); | |
LOG_INFO("No device matches the serial string"); | |
LOG_INFO("No device matches the product string"); | |
LOG_INFO("should no be called"); | |
LOG_INFO | |
LOG_INFO("no init symbol\n"); | |
LOG_INFO("complete time %" PRId64 ", thread mean %" PRId64 "\n", | |
LOG_INFO("no init symbol\n"); | |
LOG_INFO("update thread done %" PRId64 ", mean%" PRId64 "\n", | |
LOG_INFO("received thread request without init task address"); | |
LOG_INFO("thread not found"); | |
LOG_INFO("gdb requested status on non existing thread"); | |
LOG_INFO("no current thread identified"); | |
LOG_INFO("name of unidentified thread %s", | |
LOG_INFO("threads_needs_update = 1"); | |
LOG_INFO("linux os creation\n"); | |
LOG_INFO("allocation for %d threads line", | |
LOG_INFO("If auto-detection fails for this part, please email " | |
LOG_INFO("Bad sector range"); | |
LOG_INFO( | |
LOG_INFO("Write to flash buffer failed"); | |
LOG_INFO("JTAG security set. Good bye!"); | |
LOG_INFO("Bad sector range"); | |
LOG_INFO("no (large enough) working area, falling back to host mode"); | |
LOG_INFO("Flash bank %u: Device %s, %" PRIu32 | |
LOG_INFO("Processor not halted/not probed"); | |
LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")", | |
LOG_INFO("odd number of bytes to write, padding with 0xff"); | |
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware watchpoints available"); | |
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware watchpoints available"); | |
LOG_INFO("Found flash device \'%s\' ID 0x%08" PRIx32, | |
LOG_INFO("msp432: Mass erase of flash is complete"); | |
LOG_INFO("msp432: Mass erase of %s is complete", | |
LOG_INFO("msp432: BSL flash region is currently %slocked", | |
LOG_INFO("NAND read-only"); | |
LOG_INFO("NAND read-only"); | |
LOG_INFO("main area read with 1 (correctable) error"); | |
LOG_INFO("main area read with more than 1 (incorrectable) error"); | |
LOG_INFO("spare area read with 1 (correctable) error"); | |
LOG_INFO("main area read with more than 1 (incorrectable) error"); | |
LOG_INFO("UnCorrectable RS-ECC Error"); | |
LOG_INFO("%d Symbol Correctable RS-ECC Error", err); | |
LOG_INFO("Please wait ..."); /* it`s quite a long process */ | |
LOG_INFO("Odd number of words to write, padding with 0xFFFFFFFF"); | |
LOG_INFO("Please wait ..."); /* it`s quite a long process */ | |
LOG_INFO("unknown chipid, assuming K1921VK01T"); | |
LOG_INFO("Hint: Use '-work-area-phys 0x%" PRIx32 "' in your target configuration", | |
LOG_INFO("A reset or power cycle is required for the new protection settings to take effect."); | |
LOG_INFO("%s%s %ukB Flash, %ukB RAM", | |
LOG_INFO("Mass erase completed."); | |
LOG_INFO("A reset or power cycle is required if the flash was protected before."); | |
LOG_INFO("Nuvoton NuMicro: Flash Lock Check..."); | |
LOG_INFO("CBS=0: Boot From LPROM"); | |
LOG_INFO("CBS=1: Boot From APROM"); | |
LOG_INFO("Flash is secure locked!"); | |
LOG_INFO("TO UNLOCK FLASH,EXECUTE chip_erase COMMAND!!"); | |
LOG_INFO("Flash is not locked!"); | |
LOG_INFO("Nuvoton NuMicro: Flash Write ..."); | |
LOG_INFO("Device ID: 0x%08" PRIx32 "", part_id); | |
LOG_INFO("0x%08" PRIx32 ": 0x%08" PRIx32, address, ispdat); | |
LOG_INFO("0x%08" PRIx32 ": 0x%08" PRIx32, address, ispdat); | |
LOG_INFO("opendous JTAG Interface ready"); | |
LOG_INFO("Starting or1k profiling. Sampling npc as fast as we can..."); | |
LOG_INFO("Profiling completed. %" PRIu32 " samples.", sample_count); | |
LOG_INFO("Option %x is passed to %s debug unit" | |
LOG_INFO("adv debug unit is configured with option ADBG_USE_HISPEED"); | |
LOG_INFO("adv debug unit is configured with option ENABLE_JSP_MULTI"); | |
LOG_INFO("adv debug unit is configured with option ENABLE_JSP_SERVER"); | |
LOG_INFO("Detected %s with %d KB FLASH, %d KB boot FLASH and %d KB RAM.", | |
LOG_INFO("FLASH row size is %d words and page size is %d words", | |
LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%04x, ver 0x%02x)", | |
LOG_INFO("The following FLASH bytes do not match the expected values:"); | |
LOG_INFO(" Address | Expected | Actual"); | |
LOG_INFO("0x%08x | 0x%02X | 0x%02X ", address, expected, actual); | |
LOG_INFO("PIC32MM: ignoring different FICD value during FLASH verification"); | |
LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%04x, ver 0x%02x)", | |
LOG_INFO("flash size = %" PRIu32 " KiB", num_pages / 1024); | |
LOG_INFO("'pld init' has already been called"); | |
LOG_INFO("PSOC4_CMD_SET_IMO48 is not implemented on this device."); | |
LOG_INFO("Autoerase enabled, erase command ignored"); | |
LOG_INFO("Flash auto-erase enabled, non mass erase commands will be ignored."); | |
LOG_INFO("Flash auto-erase disabled. Use psoc mass_erase before flash programming."); | |
LOG_INFO("ignoring flash probed value, using configured bank size"); | |
LOG_INFO("flash size = %" PRIu32 " KiB%s", flash_size_in_kb, macros_txt); | |
LOG_INFO("WOUNDING detected: accessible flash size %" PRIu32 " kbytes", flash_size_in_kb); | |
LOG_INFO("Unchanged, skipping NVL write"); | |
LOG_INFO("Erase operation on Supervisory Flash is not required, skipping"); | |
LOG_INFO("psoc6.cm0: bkpt @0x%08" PRIX32 ", issuing SYSRESETREQ", reset_addr); | |
LOG_INFO("psoc6.cm4: bkpt @0x%08" PRIX32 ", issuing VECTRESET", reset_addr); | |
LOG_INFO("psoc6.cm0: bkpt @0x%08X, issuing SYSRESETREQ", addr); | |
LOG_INFO("mass_erase disabled by Flash lock and protection, forcing " | |
LOG_INFO("Fixup %d unaligned head bytes", align); | |
LOG_INFO("Programming at 0x%08" PRIx32 ", count 0x%08" | |
LOG_INFO("Got data from 0x%x but expected it from 0x%x", | |
LOG_INFO("Examined RISCV core; XLEN=%d, misa=0x%" PRIx64, | |
LOG_INFO("Disabling abstract command reads from FPRs."); | |
LOG_INFO("Disabling abstract command reads from CSRs."); | |
LOG_INFO("Disabling abstract command writes to FPRs."); | |
LOG_INFO("Disabling abstract command writes to CSRs."); | |
LOG_INFO("No program buffer present."); | |
LOG_INFO("progbuf is writable at 0x%" PRIx64, | |
LOG_INFO("progbuf is not writeable at 0x%" PRIx64, | |
LOG_INFO("Core %d could not be made part of halt group %d.", | |
LOG_INFO("Examined RISC-V core; found %d harts", | |
LOG_INFO("authdata_write resulted in successful authentication"); | |
LOG_INFO("Hart %d unexpectedly reset!", hartid); | |
LOG_INFO("OpenOCD only supports hardware and software breakpoints."); | |
LOG_INFO("OpenOCD only supports hardware and software breakpoints."); | |
LOG_INFO("Turning off memory sampling because it failed."); | |
LOG_INFO("Nested Tap based Bscan Tunnel Selected"); | |
LOG_INFO("Simple Register based Bscan Tunnel Selected"); | |
LOG_INFO("Invalid Tunnel type selected ! : selecting default Nested Tap Type"); | |
LOG_INFO("Found flash device '%s' (ID 0x%08" PRIx32 ")", | |
LOG_INFO("mem read: 0x%08" PRIx32, key); | |
LOG_INFO("rtt: No control block found"); | |
LOG_INFO("Listening on port %hu for %s connections", | |
LOG_INFO( | |
LOG_INFO("dropped '%s' connection (error %d)", | |
LOG_INFO("no SDFP found"); | |
LOG_INFO("device has to be switched to 4-byte addresses"); | |
LOG_INFO("4-byte address parameter table"); | |
LOG_INFO("valid SFDP detected"); | |
LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")", | |
LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 | |
LOG_INFO("Flash is already locked"); | |
LOG_INFO("Flash locked"); | |
LOG_INFO("Flash unlocked"); | |
LOG_INFO("Mass erase success"); | |
LOG_INFO("Target can't be unlocked by this debug interface"); | |
LOG_INFO("Target is already locked"); | |
LOG_INFO("Target is successfully locked"); | |
LOG_INFO("Maybe this isn't a SiM3x MCU"); | |
LOG_INFO("USER ACTION: " | |
LOG_INFO("STLINK %s (API v%d) VID:PID %04X:%04X", | |
LOG_INFO("Previous state query failed, trying to reconnect"); | |
LOG_INFO("Unable to match requested speed %d kHz, using %d kHz", | |
LOG_INFO("connected to stlink-server"); | |
LOG_INFO("stlink-server API v%d, version %d.%d.%d", | |
LOG_INFO("%s %#8.8" PRIx32, | |
LOG_INFO("device id = 0x%08" PRIx32 "", dbgmcu_idcode); | |
LOG_INFO("ignoring flash probed value, using configured bank size"); | |
LOG_INFO("flash size = %d KiB", flash_size_in_kb); | |
LOG_INFO("OTP memory bank #%u is disabled for write commands.", | |
LOG_INFO("OTP memory bank #%u is enabled for write commands.", | |
LOG_INFO("PCROP Engaged"); | |
LOG_INFO("Device Security Bit Set"); | |
LOG_INFO("%s Bank %" PRIu16 " kiB final sector clipped to %" PRIu16 " kiB", | |
LOG_INFO("stm32f4x errata detected - fixing incorrect MCU_IDCODE"); | |
LOG_INFO("flash size = %" PRIu16 " bytes", otp_size_in_b); | |
LOG_INFO("device id = 0x%08" PRIx32, device_id); | |
LOG_INFO("ignoring flash probed value, using configured bank size"); | |
LOG_INFO("flash size = %" PRIu16 " KiB", flash_size_in_kb); | |
LOG_INFO("Dual Bank %" PRIu16 " kiB STM32F42x/43x/469/479 found", flash_size_in_kb); | |
LOG_INFO("Single Bank %" PRIu16 " kiB STM32F42x/43x/469/479 found", flash_size_in_kb); | |
LOG_INFO("Single Bank %" PRIu16 " kiB STM32F76x/77x found", flash_size_in_kb); | |
LOG_INFO("Dual Bank %" PRIu16 " kiB STM32F76x/77x found", flash_size_in_kb); | |
LOG_INFO("Target not halted"); | |
LOG_INFO("Target not halted"); | |
LOG_INFO("odd number of bytes to write, padding with 0xff"); | |
LOG_INFO("device id = 0x%08" PRIx32 "", device_id); | |
LOG_INFO("ignoring flash probed value, using configured bank size"); | |
LOG_INFO("flash size = %dkbytes", flash_size_in_kb); | |
LOG_INFO("flash size = %dkbytes", flash_size_in_kb); | |
LOG_INFO("ignoring flash probed value, using configured bank size: %d kbytes", flash_size_in_kb); | |
LOG_INFO("assuming %" PRIu16 "k flash", flash_size_in_kb); | |
LOG_INFO("flash size probed value %" PRIu16 "k", flash_size_in_kb); | |
LOG_INFO("STM32H7 flash has dual banks"); | |
LOG_INFO("STM32H7 flash has a single bank"); | |
LOG_INFO("ignoring flash probed value, using configured bank size"); | |
LOG_INFO("the requested RDP value is already programmed"); | |
LOG_INFO("OTP memory (bank #%d) is %s%s for write commands", | |
LOG_INFO("device idcode = 0x%08" PRIx32 " (%s - Rev %s : 0x%04x)", | |
LOG_INFO("TZEN = %d : TrustZone %s by option bytes", | |
LOG_INFO("RDP level %s (0x%02X)", | |
LOG_INFO("flash size = %d KiB", flash_size_kb); | |
LOG_INFO("gap detected from 0x%08x to 0x%08x", | |
LOG_INFO("The requested TZEN is already programmed"); | |
LOG_INFO("device id = 0x%08" PRIx32 "", device_id); | |
LOG_INFO("flash size = %dkbytes", flash_size_in_kb); | |
LOG_INFO("STM32L flash has dual banks. Bank (%u) size is %dkb, base address is 0x%" PRIx32, | |
LOG_INFO("STM32L flash size is %dkb, base address is 0x%" PRIx32, flash_size_in_kb, base_address); | |
LOG_INFO("ignoring flash probed value, using configured bank size: %dkbytes", flash_size_in_kb); | |
LOG_INFO("no hardware breakpoint available"); | |
LOG_INFO("no hardware watchpoints available"); | |
LOG_INFO("trying to reconnect"); | |
LOG_INFO("flash \'%s\' id = unknown\nchip size = %" PRIu32 " KiB," | |
LOG_INFO("flash \'%s\' id = unknown\nchip size = %" PRIu32 " B," | |
LOG_INFO("No id from flash1"); | |
LOG_INFO("No id from flash2"); | |
LOG_INFO("No id - set flash parameters manually"); | |
LOG_INFO("flash1 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32 | |
LOG_INFO("flash1 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32 | |
LOG_INFO("flash1 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32 | |
LOG_INFO("flash2 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32 | |
LOG_INFO("flash2 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32 | |
LOG_INFO("flash2 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32 | |
LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")", | |
LOG_INFO("Device Security Bit Set"); | |
LOG_INFO("Halt timed out, wake up GDB."); | |
LOG_INFO("'target init' has already been called"); | |
LOG_INFO("Starting profiling. Halting and resuming the" | |
LOG_INFO("Target not halted or running"); | |
LOG_INFO("Profiling completed. %" PRIu32 " samples.", sample_count); | |
LOG_INFO("srst asserted detected, running srst_asserted proc."); | |
LOG_INFO("Power dropout detected, running power_dropout proc."); | |
LOG_INFO("Use arp_examine command to examine it manually!"); | |
LOG_INFO("The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD"); | |
LOG_INFO("failed"); | |
LOG_INFO("'nand init' has already been called"); | |
LOG_INFO("Flash protection check is not implemented."); | |
LOG_INFO("Nothing to write to flash bank"); | |
LOG_INFO("File content exceeds flash bank size. Only writing the " | |
LOG_INFO("Nothing to compare with flash bank"); | |
LOG_INFO("File content exceeds flash bank size. Only comparing the " | |
LOG_INFO("'flash init' has already been called"); | |
LOG_INFO("'jtag init' has already been called"); | |
LOG_INFO("tcl server disabled"); | |
LOG_INFO("unable to get user home directory, telnet history will be disabled"); | |
LOG_INFO("unable to get user home directory, telnet history will be disabled"); | |
LOG_INFO("telnet server disabled"); | |
LOG_INFO("ICDI Firmware version: %s", version); | |
LOG_INFO("device_ident_reg = 0x%08" PRIx32 "", device_ident_reg); | |
LOG_INFO("Identified %s, ver=%d, core=%s, nvmem=%s.", | |
LOG_INFO("tms470 fmbbusy = 0x%08" PRIx32 " -> %s", | |
LOG_INFO("tms470 flash is unlocked"); | |
LOG_INFO("sector erased successfully."); | |
LOG_INFO("writing 0x%04x at 0x%08" PRIx32 "", word, addr); | |
LOG_INFO("skipping 0xffff at 0x%08" PRIx32 "", addr); | |
LOG_INFO("sector erased"); | |
LOG_INFO("auto-selecting first available session transport \"%s\". " | |
LOG_INFO("Altera USB-Blaster II (uninitialized) found"); | |
LOG_INFO("Loading firmware..."); | |
LOG_INFO("Waiting for reenumerate..."); | |
LOG_INFO("Altera USB-Blaster II found (Firm. rev. = %s)", buffer); | |
LOG_INFO("ULINK signal states: TDI: %i, TDO: %i, TMS: %i, TCK: %i, TRST: %i," | |
LOG_INFO( | |
LOG_INFO("Loading OpenULINK firmware. This is reversible by power-cycling" | |
LOG_INFO("ULINK device is already running OpenULINK firmware"); | |
LOG_INFO("USB JTAG Interface ready!"); | |
LOG_INFO("USB_TO_XXX abilities: 0x%08X:0x%08X:0x%08X", | |
LOG_INFO("VSLLink SWD mode enabled"); | |
LOG_INFO("flash_id id = 0x%08" PRIx32 "", flash_id); | |
LOG_INFO("ignoring flash probed value, using configured bank size"); | |
LOG_INFO("flash size = %" PRIu32 " KiB", flash_size / 1024); | |
LOG_INFO("flash size = %d configuration bits", | |
LOG_INFO("current CCB = 0x%X", old_ccb); | |
LOG_INFO("XDS110: connected"); | |
LOG_INFO("XDS110: disconnected"); | |
LOG_INFO("XDS110: firmware version = %" PRIu32 ".%" PRIu32 ".%" PRIu32 ".%" PRIu32, | |
LOG_INFO("XDS110: connected to target via SWD"); | |
LOG_INFO("XDS110: connected to target via JTAG"); | |
LOG_INFO("XDS110: RTCK not supported"); | |
LOG_INFO("XDS110: increase speed request: %d kHz to %d kHz minimum", | |
LOG_INFO( | |
LOG_INFO( | |
LOG_INFO("Clearing flash status"); | |
LOG_INFO("Write does not start on a 256 byte boundary. " | |
LOG_INFO("Flash is temporarily unprotected"); | |
LOG_INFO("Unable to disable flash protection"); | |
LOG_INFO("%s: hardware has 2 breakpoints and 2 watchpoints", | |
LOG_INFO("Detected end of trace."); | |
LOG_INFO("File-I/O: syscall unknown (%d), pc=0x%08X", | |
LOG_INFO("Zephyr: no symbols while detecting RTOS"); | |
LOG_INFO("Zephyr: does it have symbol %d (%s)?", symbol, | |
LOG_INFO("Zephyr: all mandatory symbols found"); | |
LOG_INFO("Zephyr: looking for target: %s", name); | |
LOG_INFO("Zephyr: target known, params at %p", p); | |