TARGET_PRIxADDR - syntax, references, description

References

Location	Text
types.h:340	#define TARGET_PRIxADDR PRIx64
aarch64.c:1295	LOG_DEBUG("brp %i control 0x%0" PRIx32 " value 0x%" TARGET_PRIxADDR, brp_i,
aarch64.c:1407	LOG_DEBUG("brp %i control 0x%0" PRIx32 " value 0x%" TARGET_PRIxADDR, brp_i,
aarch64.c:1521	LOG_DEBUG("rbp %i control 0x%0" PRIx32 " value 0x%" TARGET_PRIxADDR, brp_i,
aarch64.c:1771	LOG_DEBUG("wp %i control 0x%0" PRIx32 " value 0x%" TARGET_PRIxADDR, wp_i,
arc.c:1282	LOG_DEBUG("current:%i, address:0x%08" TARGET_PRIxADDR ", handle_breakpoints:%i,"
arc.c:1307	LOG_DEBUG("Changing the value of current PC to 0x%08" TARGET_PRIxADDR, address);
arc.c:1332	LOG_DEBUG("skipping past breakpoint at 0x%08" TARGET_PRIxADDR,
arc.c:1569	LOG_ERROR("Unable to set 32bit breakpoint at address @0x%" TARGET_PRIxADDR
arc.c:1582	LOG_ERROR("Unable to set 16bit breakpoint at address @0x%" TARGET_PRIxADDR
arc.c:1654	LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR
arc.c:1670	LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR
arc_mem.c:161	LOG_DEBUG("address: 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: %" PRIu32,
arc_mem.c:223	LOG_DEBUG("Read memory: addr=0x%08" TARGET_PRIxADDR ", size=%" PRIu32
arc_mem.c:246	LOG_DEBUG("Read memory: addr=0x%08" TARGET_PRIxADDR ", size=%" PRIu32
arm11.c:458	LOG_DEBUG("RESUME PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");
arm11.c:472	LOG_DEBUG("must step over %08" TARGET_PRIxADDR "", bp->address);
arm11.c:498	LOG_DEBUG("Add BP %d at %08" TARGET_PRIxADDR, brp_num,
arm11.c:562	LOG_DEBUG("STEP PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");
arm11.c:574	LOG_DEBUG("Skipping BKPT %08" TARGET_PRIxADDR, address);
arm11.c:580	LOG_DEBUG("Skipping WFI %08" TARGET_PRIxADDR, address);
arm7_9_common.c:95	LOG_DEBUG("BPID: %" PRIu32 " (0x%08" TARGET_PRIxADDR ") using hw wp: %u",
arm7_9_common.c:181	LOG_DEBUG("BPID: %" PRIu32 ", Address: 0x%08" TARGET_PRIxADDR ", Type: %d",
arm7_9_common.c:238	LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" TARGET_PRIxADDR
arm7_9_common.c:258	LOG_ERROR("Unable to set thumb software breakpoint at address %08" TARGET_PRIxADDR
arm7_9_common.c:293	LOG_DEBUG("BPID: %" PRIu32 ", Address: 0x%08" TARGET_PRIxADDR,
arm7_9_common.c:1733	LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRIu32,
arm7_9_common.c:1792	LOG_DEBUG("set breakpoint at 0x%8.8" TARGET_PRIxADDR "", breakpoint->address);
arm7_9_common.c:2118	LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
arm7_9_common.c:2257	"(address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
arm7_9_common.c:2471	"(address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
arm7_9_common.c:2643	"DCC write failed, expected end address 0x%08" TARGET_PRIxADDR " got 0x%0" PRIx32 "",
armv7a_mmu.c:70	LOG_INFO("%" PRIx32 " : %" TARGET_PRIxADDR " %s outer shareable %s secured %s super section",
armv7a_mmu.c:234	LOG_USER("Page Directory at (phys): %8.8" TARGET_PRIxADDR, ttb);
armv7m.c:656	LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" TARGET_PRIxADDR,
avr32_ap7k.c:340	LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR "", breakpoint->address);
avr32_ap7k.c:428	LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
avr32_ap7k.c:468	LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
dsp563xx.c:1701	"memtype: %d address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
esirisc.c:391	LOG_ERROR("%s: failed to read address: 0x%" TARGET_PRIxADDR, target_name(target),
esirisc.c:439	LOG_ERROR("%s: failed to write address: 0x%" TARGET_PRIxADDR, target_name(target),
esirisc.c:1168	LOG_ERROR("%s: failed to read address: 0x%" TARGET_PRIxADDR, target_name(target),
esirisc_trace.c:691	command_print(CMD, "trace FIFO address: 0x%" TARGET_PRIxADDR,
esirisc_trace.c:694	command_print(CMD, "trace buffer start: 0x%" TARGET_PRIxADDR,
esirisc_trace.c:696	command_print(CMD, "trace buffer end: 0x%" TARGET_PRIxADDR,
feroceon.c:557	" expected end address 0x%08" TARGET_PRIxADDR
fespi.c:591	LOG_DEBUG("write(ctrl_base=0x%" TARGET_PRIxADDR ", page_size=0x%x, "
fespi.c:592	"address=0x%" TARGET_PRIxADDR ", offset=0x%" PRIx32
gdb_server.c:810	"watch:%08" TARGET_PRIxADDR ";", hit_wp_address);
gdb_server.c:814	"rwatch:%08" TARGET_PRIxADDR ";", hit_wp_address);
gdb_server.c:818	"awatch:%08" TARGET_PRIxADDR ";", hit_wp_address);
image.c:667	LOG_DEBUG("load segment %d at 0x%" TARGET_PRIxADDR " (sz = 0x%" PRIx32 ")", section, offset, size);
image.c:673	LOG_DEBUG("read elf: size = 0x%zx at 0x%" TARGET_PRIxADDR "", read_size,
image.c:710	LOG_DEBUG("load segment %d at 0x%" TARGET_PRIxADDR " (sz = 0x%" PRIx32 ")", section, offset, size);
image.c:716	LOG_DEBUG("read elf: size = 0x%zx at 0x%" TARGET_PRIxADDR "", read_size,
image.c:1091	"read past end of section: 0x%8.8" TARGET_PRIxADDR " + 0x%8.8" PRIx32 " > 0x%8.8" PRIx32 "",
ls1_sap.c:175	LOG_DEBUG("Reading memory at physical address 0x%" TARGET_PRIxADDR
ls1_sap.c:197	LOG_DEBUG("Writing memory at physical address 0x%" TARGET_PRIxADDR
mips32_pracc.c:1276	LOG_DEBUG("%s using 0x%.8" TARGET_PRIxADDR " for write handler", __func__, source->address);
mips_m4k.c:693	LOG_ERROR("Unable to set 32bit breakpoint at address %08" TARGET_PRIxADDR
mips_m4k.c:714	LOG_ERROR("Unable to set 16bit breakpoint at address %08" TARGET_PRIxADDR
or1k.c:853	LOG_DEBUG("Unset breakpoint at 0x%08" TARGET_PRIxADDR, breakpoint->address);
or1k.c:915	LOG_DEBUG("Adding breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, id: %" PRIu32,
or1k.c:930	LOG_ERROR("Error while reading the instruction at 0x%08" TARGET_PRIxADDR,
or1k.c:950	LOG_ERROR("Error while writing OR1K_TRAP_INSTR at 0x%08" TARGET_PRIxADDR,
or1k.c:973	LOG_DEBUG("Removing breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, id: %" PRIu32,
or1k.c:989	LOG_ERROR("Error while writing back the instruction at 0x%08" TARGET_PRIxADDR,
or1k.c:1026	LOG_DEBUG("Read memory at 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: 0x%08" PRIx32, address, size, count);
or1k.c:1053	LOG_DEBUG("Write memory at 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: 0x%08" PRIx32, address, size, count);
riscv-011.c:2102	LOG_INFO("Retrying memory read starting from 0x%" TARGET_PRIxADDR
riscv-011.c:2111	TARGET_PRIxADDR, result_value, address + size * (count-1));
riscv-011.c:2113	LOG_USER("(It may have failed between 0x%" TARGET_PRIxADDR
riscv-011.c:2114	" and 0x%" TARGET_PRIxADDR " as well, but we "
riscv-011.c:2258	LOG_INFO("Retrying memory write starting from 0x%" TARGET_PRIxADDR
riscv-011.c:2275	TARGET_PRIxADDR, result_value, address + size * (count-1));
riscv-011.c:2277	LOG_ERROR("(It may have failed between 0x%" TARGET_PRIxADDR
riscv-011.c:2278	" and 0x%" TARGET_PRIxADDR " as well, but we "
riscv-013.c:2485	sprintf(fmt, "M[0x%" TARGET_PRIxADDR "] %ss 0x%%0%d" PRIx64,
riscv-013.c:2597	TARGET_PRIxADDR, size, count, address);
riscv-013.c:2956	LOG_DEBUG("reading %d words of %d bytes from 0x%" TARGET_PRIxADDR, count,
riscv-013.c:3034	LOG_DEBUG("writing %d words of %d bytes from 0x%" TARGET_PRIxADDR, count,
riscv-013.c:3427	LOG_DEBUG("reading %d words of %d bytes from 0x%" TARGET_PRIxADDR, count,
riscv-013.c:3510	LOG_DEBUG("error reading single word of %d bytes from 0x%" TARGET_PRIxADDR,
riscv-013.c:3601	TARGET_PRIxADDR, size, count, address);
riscv-013.c:3664	LOG_DEBUG("transferring burst starting at address 0x%" TARGET_PRIxADDR,
riscv-013.c:3755	LOG_DEBUG("unexpected sbaddress=0x%" TARGET_PRIxADDR
riscv-013.c:3771	LOG_DEBUG("System bus access failed with sberror=%u (sbaddress=0x%" TARGET_PRIxADDR ")",
riscv-013.c:3776	LOG_DEBUG("unexpected sbaddress=0x%" TARGET_PRIxADDR
riscv.c:867	LOG_DEBUG("[%d] @0x%" TARGET_PRIxADDR, target->coreid, breakpoint->address);
riscv.c:877	LOG_ERROR("Invalid breakpoint alignment for address 0x%" TARGET_PRIxADDR, breakpoint->address);
riscv.c:884	LOG_ERROR("Failed to read original instruction at 0x%" TARGET_PRIxADDR,
riscv.c:894	TARGET_PRIxADDR, breakpoint->length, breakpoint->address);
riscv.c:953	"0x%" TARGET_PRIxADDR, breakpoint->length, breakpoint->address);
riscv.c:1004	LOG_DEBUG("[%d] @0x%" TARGET_PRIxADDR, target->coreid, watchpoint->address);
riscv.c:1085	LOG_DEBUG("Hit address=%" TARGET_PRIxADDR, wp->address);
riscv.c:1607	LOG_DEBUG("virtual=0x%" TARGET_PRIxADDR "; mode=%s", virtual, info->name);
riscv.c:1614	LOG_ERROR("Virtual address 0x%" TARGET_PRIxADDR " is not sign-extended "
riscv.c:1639	LOG_DEBUG("i=%d; PTE @0x%" TARGET_PRIxADDR " = 0x%" PRIx64, i,
riscv.c:1671	LOG_DEBUG("0x%" TARGET_PRIxADDR " -> 0x%" TARGET_PRIxADDR, virtual,
riscv.c:1704	LOG_WARNING("0-length read from 0x%" TARGET_PRIxADDR, address);
riscv.c:1732	LOG_WARNING("0-length write to 0x%" TARGET_PRIxADDR, address);
riscv.c:1906	LOG_DEBUG("resume at 0x%" TARGET_PRIxADDR, entry_point);
riscv.c:1954	TARGET_PRIxADDR, final_pc, exit_point);
riscv.c:1999	LOG_DEBUG("address=0x%" TARGET_PRIxADDR "; count=0x%" PRIx32, address, count);
rtt.c:139	LOG_INFO("rtt: Control block found at 0x%" TARGET_PRIxADDR,
stm32f1x.c:616	LOG_ERROR("Failed to execute algorithm at 0x%" TARGET_PRIxADDR ": %d",
stm8.c:742	LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR
stm8.c:773	LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR
types.h:342	#define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR

TARGET_PRIxADDR macro

Syntax

References