LOG_ERROR - syntax, references, description

References

Location	Text
log.h:132	#define LOG_ERROR(expr ...) \
FLASHPlugin.c:175	LOG_ERROR("Failed to read FLASH plugin contents\n");
FLASHPlugin.c:215	LOG_ERROR("FLASH plugin did not call FLASHPlugin_InitDone(). Ensure it is declared as non-inline and try increasing load timeout setting inside the plugin timeout table.");
FLASHPlugin.c:235	LOG_ERROR("Plugin's Unload() function returned error %d\n", result);
FLASHPlugin.c:274	LOG_ERROR("Inconsistent work area address: expected 0x%x, got 0x%x\n", (uint32_t)plugin->work_area_backup.base_address, start);
FLASHPlugin.c:301	LOG_ERROR("%s: invalid FLASH plugin. No '%s' symbol found.", URL, symbol);
FLASHPlugin.c:358	LOG_ERROR("%s: invalid FLASH plugin. Neither 'FLASHPlugin_ProgramSync' nor 'FLASHPlugin_ProgramAsync' is defined.", URL);
FLASHPlugin.c:417	LOG_ERROR("Computed worka area size (0x%x) is smaller then the available size (0x%x)", workAreaSize, plugin_info->WorkArea.Size);
FLASHPlugin.c:472	LOG_ERROR("FLASHPlugin_ProgramAsync returned %d\n", result);
FLASHPlugin.c:517	LOG_ERROR("Neither FLASHPlugin_ProgramAsync() or FLASHPlugin_ProgramSync() are properly defined in the FLASH plugin. Cannot program FLASH memory.");
FLASHPlugin.c:647	LOG_ERROR("FLASH plugin returned invalid WriteBlockSize. Writing external FLASH will not be possible.");
FLASHPlugin.c:698	LOG_ERROR("FLASHPlugin_EraseSectors() returned %d", result);
FLASHPlugin.c:733	LOG_ERROR("FLASHPlugin_ProtectSectors() returned %d", result);
FLASHPlugin.c:772	LOG_ERROR("FLASHPlugin_ProtectSectors() returned %d", result);
FreeRTOS.c:145	LOG_ERROR("No symbols for FreeRTOS");
FreeRTOS.c:150	LOG_ERROR("Don't have the number of threads in FreeRTOS");
FreeRTOS.c:163	LOG_ERROR("Could not read FreeRTOS thread count from target");
FreeRTOS.c:176	LOG_ERROR("Error reading current thread in FreeRTOS thread list");
FreeRTOS.c:190	LOG_ERROR("Error reading FreeRTOS scheduler state");
FreeRTOS.c:207	LOG_ERROR("Error allocating memory for %d threads", thread_list_size);
FreeRTOS.c:226	LOG_ERROR("Error allocating memory for %d threads", thread_list_size);
FreeRTOS.c:233	LOG_ERROR("FreeRTOS: uxTopUsedPriority is not defined, consult the OpenOCD manual for a work-around");
FreeRTOS.c:246	LOG_ERROR("FreeRTOS top used priority is unreasonably big, not proceeding: %" PRIu32,
FreeRTOS.c:261	LOG_ERROR("Error allocating memory for %u priorities", config_max_priorities);
FreeRTOS.c:286	LOG_ERROR("Error reading number of threads in FreeRTOS thread list");
FreeRTOS.c:303	LOG_ERROR("Error reading first thread item location in FreeRTOS thread list");
FreeRTOS.c:318	LOG_ERROR("Error reading thread list item object in FreeRTOS thread list");
FreeRTOS.c:338	LOG_ERROR("Error reading first thread item location in FreeRTOS thread list");
FreeRTOS.c:374	LOG_ERROR("Error reading next thread item location in FreeRTOS thread list");
FreeRTOS.c:412	LOG_ERROR("Error reading stack frame from FreeRTOS thread");
FreeRTOS.c:431	LOG_ERROR("Could not read CPACR register to check FPU state");
FreeRTOS.c:540	LOG_ERROR("Could not find target in FreeRTOS compatibility list");
ThreadX.c:239	LOG_ERROR("Error reading stack data from ThreadX thread: stack_ptr=0x%" PRIx64, stack_ptr);
ThreadX.c:273	LOG_ERROR("No symbols for ThreadX");
ThreadX.c:278	LOG_ERROR("Don't have the number of threads in ThreadX");
ThreadX.c:289	LOG_ERROR("Could not read ThreadX thread count from target");
ThreadX.c:303	LOG_ERROR("Could not read ThreadX current thread from target");
ThreadX.c:345	LOG_ERROR("Could not read ThreadX thread location from target");
ThreadX.c:367	LOG_ERROR("Could not read ThreadX thread name pointer from target");
ThreadX.c:382	LOG_ERROR("Error reading thread name from ThreadX target");
ThreadX.c:402	LOG_ERROR("Error reading thread state from ThreadX target");
ThreadX.c:433	LOG_ERROR("Error reading next thread pointer in ThreadX thread list");
ThreadX.c:467	LOG_ERROR("Error reading stack frame from ThreadX thread");
ThreadX.c:474	LOG_ERROR("null stack pointer in thread");
ThreadX.c:482	LOG_ERROR("Unknown stacking info for thread id=0x%" PRIx64, (uint64_t)thread_id);
ThreadX.c:617	LOG_ERROR("Could not find target in ThreadX compatibility list");
aarch64.c:101	LOG_ERROR("cannot read system control register in this mode: (%s : 0x%x)",
aarch64.c:137	LOG_ERROR("trying to enable mmu on target stopped with mmu disable");
aarch64.c:397	LOG_ERROR("Timeout waiting for target %s halt", target_name(target));
aarch64.c:616	LOG_ERROR("How do I resume into Jazelle state??");
aarch64.c:653	LOG_ERROR("DSCR.ITE must be set before leaving debug!");
aarch64.c:655	LOG_ERROR("DSCR.ERR must be cleared before leaving debug!");
aarch64.c:711	LOG_ERROR("%s: Timeout waiting for resume"PRIx32, target_name(target));
aarch64.c:766	LOG_ERROR("failed to restore target %s", target_name(curr));
aarch64.c:835	LOG_ERROR("%s: timeout waiting for target resume", __func__);
aarch64.c:923	LOG_ERROR("%s: timeout waiting for target %s to resume", __func__, target_name(curr));
aarch64.c:1065	LOG_ERROR("cannot read system control register in this mode: (%s : 0x%x)",
aarch64.c:1147	LOG_ERROR("Failed to restart non-stepping targets in SMP group");
aarch64.c:1176	LOG_ERROR("timeout waiting for target %s halt after step",
aarch64.c:1264	LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
aarch64.c:1307	LOG_ERROR("bug: breakpoint length should be 4 in AArch64 mode");
aarch64.c:1385	LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
aarch64.c:1439	LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
aarch64.c:1449	LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
aarch64.c:1722	LOG_ERROR("ERROR Can not find free Watchpoint Register Pair");
aarch64.c:1993	LOG_ERROR("%s: how to reset?", target_name(target));
aarch64.c:2066	LOG_ERROR("memory write sizes greater than 4 bytes is only supported for AArch64 state");
aarch64.c:2245	LOG_ERROR("abort occurred - dscr = 0x%08" PRIx32, dscr);
aarch64.c:2263	LOG_ERROR("memory read sizes greater than 4 bytes is only supported for AArch64 state");
aarch64.c:2504	LOG_ERROR("abort occurred - dscr = 0x%08" PRIx32, dscr);
aarch64.c:2639	LOG_ERROR("Could not find APB-AP for debug access");
aarch64.c:2645	LOG_ERROR("Cannot get AP");
aarch64.c:2653	LOG_ERROR("Could not initialize the APB-AP");
aarch64.c:2703	LOG_ERROR("%s: examination failed\n", target_name(target));
aarch64.c:2827	LOG_ERROR("Out of memory");
aarch64.c:2846	LOG_ERROR("Out of memory");
aarch64.c:2995	LOG_ERROR("target not examined yet");
aarch64.c:3007	LOG_ERROR("No target selected");
aarch64.c:3050	LOG_ERROR("Unknown parameter: %s - should be off or on", CMD_ARGV[0]);
adapter.c:127	LOG_ERROR("Debug Adapter has to be specified, "
adapter.c:191	LOG_ERROR("failed: %d", result);
adapter.c:220	LOG_ERROR("Translation from khz to adapter speed not implemented");
adapter.c:277	LOG_ERROR("BUG: unknown adapter clock mode");
adapter.c:292	LOG_ERROR("Translation from adapter speed to khz not implemented");
adapter.c:457	LOG_ERROR("The specified debug interface was not found (%s)",
adapter.c:488	LOG_ERROR("extra reset_config %s spec (%s)",
adapter.c:508	LOG_ERROR("extra reset_config %s spec (%s)",
adapter.c:528	LOG_ERROR("extra reset_config %s spec (%s)",
adapter.c:544	LOG_ERROR("extra reset_config %s spec (%s)",
adapter.c:560	LOG_ERROR("extra reset_config %s spec (%s)",
adapter.c:576	LOG_ERROR("extra reset_config %s spec (%s)",
adapter.c:584	LOG_ERROR("unknown reset_config flag (%s)", *CMD_ARGV);
adapter.c:821	LOG_ERROR("transport has no trst signal");
adapter.c:826	LOG_ERROR("adapter has no srst signal");
adapter.c:937	LOG_ERROR("adapter has no gpio named %s", CMD_ARGV[0]);
adapter.c:958	LOG_ERROR("-chip option requires a parameter");
adapter.c:1032	LOG_ERROR("illegal option for adapter %s %s: %s",
adi_v5_jtag.c:454	LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
adi_v5_jtag.c:519	LOG_ERROR("Invalid ACK (%1x) in DAP response", tmp->ack);
adi_v5_jtag.c:530	LOG_ERROR("Timeout during WAIT recovery");
adi_v5_jtag.c:612	LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
adi_v5_jtag.c:628	LOG_ERROR("Timeout during WAIT recovery");
adi_v5_jtag.c:677	LOG_ERROR("Debug regions are unpowered, an unexpected reset might have happened");
adi_v5_jtag.c:682	LOG_ERROR("JTAG-DP STICKY ERROR");
adi_v5_jtag.c:731	LOG_ERROR("Sequence %d not supported", seq);
adi_v5_swd.c:282	LOG_ERROR("Failed to select multidrop %s", adiv5_dap_name(dap));
adi_v5_swd.c:323	LOG_ERROR("Failed to connect multidrop %s", adiv5_dap_name(dap));
adi_v5_swd.c:381	LOG_ERROR("Error connecting DP: cannot read IDR");
aduc702x.c:84	LOG_ERROR("mass erase failed");
aduc702x.c:102	LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
aduc702x.c:136	LOG_ERROR("write block must be multiple of two bytes in offset & length");
aduc702x.c:232	LOG_ERROR("error executing aduc702x flash write algorithm");
aduc702x.c:238	LOG_ERROR("aduc702x detected error writing flash");
aduc702x.c:290	LOG_ERROR("single write failed for address 0x%08lX",
aduc702x.c:318	LOG_ERROR("slow write failed");
aducm302x.c:146	LOG_ERROR("failed to allocate block array");
aducm302x.c:154	LOG_ERROR("failed to allocate block array");
aducm302x.c:197	LOG_ERROR("command time out");
aducm302x.c:205	LOG_ERROR("command ignored for attempted access of a protected or out of memory location)");
aducm302x.c:207	LOG_ERROR("verify error occurred for failed erase or failed signature check");
aducm302x.c:209	LOG_ERROR("command aborted by either user code or a system interrupt");
aducm302x.c:243	LOG_ERROR("Target not halted");
aducm302x.c:282	LOG_ERROR("Target not halted");
aducm302x.c:287	LOG_ERROR("Hardware doesn't support page-level unprotect");
aducm302x.c:295	LOG_ERROR("Can't protect out-of-range pages.");
aducm302x.c:321	LOG_ERROR("Target not halted");
aducm302x.c:417	LOG_ERROR("error %d executing ADuCM302x flash write algorithm", retval);
aducm302x.c:447	LOG_ERROR("Target not halted");
aducm302x.c:478	LOG_ERROR("flash writing failed");
aducm302x.c:522	LOG_ERROR("calloc failed");
aducm302x.c:549	LOG_ERROR("calloc failed");
aducm360.c:114	LOG_ERROR("mass erase failed.");
aducm360.c:146	LOG_ERROR("page erase failed at 0x%08" PRIx32, padd);
aducm360.c:212	LOG_ERROR("write block must be multiple of four bytes in offset & length");
aducm360.c:271	LOG_ERROR("error executing aducm360 flash write algorithm");
aducm360.c:277	LOG_ERROR("aducm360 fast sync algorithm reports an error (%02" PRIX32 ")", res);
aducm360.c:334	LOG_ERROR("write block must be multiple of four bytes in offset & length");
aducm360.c:389	LOG_ERROR("error executing aducm360 flash write algorithm");
aducm360.c:393	LOG_ERROR("aducm360 fast async algorithm reports an error (%02" PRIX32 ")", res);
aducm360.c:429	LOG_ERROR("aducm360_write_block was cancelled (no writing method was chosen)!");
aducm360.c:485	LOG_ERROR("slow write failed");
advanced_elf_image.c:101	LOG_ERROR("invalid ELF file, bad magic number");
advanced_elf_image.c:105	LOG_ERROR("invalid ELF file, only 32bits files are supported");
advanced_elf_image.c:124	LOG_ERROR("Unexpected symtab entry size in %s: %d.", URL, elf->sections[i].sh_entsize);
advanced_elf_image.c:143	LOG_ERROR("Invalid strtab link from symtab section");
advanced_elf_image.c:166	LOG_ERROR("The FLASH plugin file does not contain a symbol table and cannot be loaded.");
ambiqmicro.c:33	LOG_ERROR("status(%d):%s\n", rc, msg); } }
ambiqmicro.c:145	LOG_ERROR("Target not probed");
ambiqmicro.c:181	LOG_ERROR("status(0x%x):Could not read part_num.\n", retval);
ambiqmicro.c:254	LOG_ERROR("Target not probed");
ambiqmicro.c:277	LOG_ERROR("Flash not happy: status(0x%" PRIx32 ")", retflash);
ambiqmicro.c:314	LOG_ERROR("Target not halted or running %d", target->state);
ambiqmicro.c:340	LOG_ERROR("Target not halted");
ambiqmicro.c:345	LOG_ERROR("Target not probed");
ambiqmicro.c:408	LOG_ERROR("Target not halted");
ambiqmicro.c:413	LOG_ERROR("Target not probed");
ambiqmicro.c:513	LOG_ERROR("Target not halted");
ambiqmicro.c:532	LOG_ERROR("write block must be multiple of 4 bytes in offset & length");
ambiqmicro.c:619	LOG_ERROR("write failed");
ambiqmicro.c:677	LOG_ERROR("Target not halted");
ambiqmicro.c:682	LOG_ERROR("Target not probed");
ambiqmicro.c:687	LOG_ERROR("Count must be < 256");
ambiqmicro.c:810	LOG_ERROR("error check log");
arc.c:130	LOG_ERROR("ARC jtag instruction length should be equal to 4");
arc.c:149	LOG_ERROR("Unable to allocate memory");
arc.c:238	LOG_ERROR("It is forbidden to read core registers 61 and 62.");
arc.c:279	LOG_ERROR("It is forbidden to write core registers 61 and 62.");
arc.c:358	LOG_ERROR("Not enough memory");
arc.c:371	LOG_ERROR("No core registers were defined");
arc.c:386	LOG_ERROR("No aux registers were defined");
arc.c:400	LOG_ERROR("Double definition of PC in configuration");
arc.c:406	LOG_ERROR("Double definition of DEBUG in configuration");
arc.c:416	LOG_ERROR("`pc' and `debug' registers must be present in target description.");
arc.c:449	LOG_ERROR("Unable to allocate memory");
arc.c:462	LOG_ERROR("No BCR registers are defined");
arc.c:504	LOG_ERROR("Unable to allocate memory");
arc.c:560	LOG_ERROR("Requested register `%s' doesn't exist.", reg_name);
arc.c:621	LOG_ERROR("Arguments cannot be NULL.");
arc.c:798	LOG_ERROR("can't request a halt while in reset if nSRST pulls nTRST");
arc.c:868	LOG_ERROR("Unable to allocate memory");
arc.c:896	LOG_ERROR("Attempt to read core registers failed.");
arc.c:904	LOG_ERROR("Attempt to read aux registers failed.");
arc.c:1190	LOG_ERROR("Unable to allocate memory");
arc.c:1227	LOG_ERROR("Attempt to write to core registers failed.");
arc.c:1236	LOG_ERROR("Attempt to write to aux registers failed.");
arc.c:1434	LOG_ERROR("Unable to allocate memory");
arc.c:1455	LOG_ERROR("Target not examined yet");
arc.c:1483	LOG_ERROR("Target not examined yet");
arc.c:1516	LOG_ERROR("No free actionpoints, maximum amount is %u",
arc.c:1569	LOG_ERROR("Unable to set 32bit breakpoint at address @0x%" TARGET_PRIxADDR
arc.c:1582	LOG_ERROR("Unable to set 16bit breakpoint at address @0x%" TARGET_PRIxADDR
arc.c:1587	LOG_ERROR("Invalid breakpoint length: target supports only 2 or 4");
arc.c:1603	LOG_ERROR("No free actionpoints, maximum amount is %u",
arc.c:1676	LOG_ERROR("Invalid breakpoint length: target supports only 2 or 4");
arc.c:1793	LOG_ERROR("Unable to allocate memory");
arc.c:1816	LOG_ERROR("No actionpoint free, maximum amount is %u",
arc.c:1861	LOG_ERROR("Register actionpoint not found");
arc.c:1885	LOG_ERROR("No free actionpoints, maximum amount is %u",
arc.c:1891	LOG_ERROR("Only watchpoints of length 4 are supported");
arc.c:1907	LOG_ERROR("BUG: watchpoint->rw neither read, write nor access");
arc_cmd.c:159	LOG_ERROR("Out of memory");
arc_cmd.c:472	LOG_ERROR("Out of memory");
arc_cmd.c:559	LOG_ERROR("Out of memory");
arc_cmd.c:592	LOG_ERROR("Out of memory");
arc_cmd.c:650	LOG_ERROR("Out of memory");
arc_jtag.c:250	LOG_ERROR("Trying to write 0 registers");
arc_jtag.c:290	LOG_ERROR("Trying to read 0 registers");
arc_jtag.c:307	LOG_ERROR("Failed to execute jtag queue: %d", retval);
arc_jtag.c:528	LOG_ERROR("Failed to execute jtag queue: %d", retval);
arc_mem.c:185	LOG_ERROR("Unable to allocate memory");
arc_mem.c:271	LOG_ERROR("Unable to allocate memory");
arm-jtag-ew.c:158	LOG_ERROR("BUG: unknown JTAG command type encountered");
arm-jtag-ew.c:180	LOG_ERROR("ARM-JTAG-EW setting speed failed (%d)", result);
arm-jtag-ew.c:188	LOG_ERROR("ARM-JTAG-EW getting speed failed (%d)", result);
arm-jtag-ew.c:217	LOG_ERROR(
arm-jtag-ew.c:261	LOG_ERROR("BUG: %i is not a valid end state", state);
arm-jtag-ew.c:295	LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
arm-jtag-ew.c:396	LOG_ERROR("ARM-JTAG-EW TRST/SRST pin set failed failed (%d)", result);
arm-jtag-ew.c:419	LOG_ERROR("Vref too low. Check Target Power");
arm-jtag-ew.c:421	LOG_ERROR("ARM-JTAG-EW command CMD_GET_TAPHW_STATE failed (%d)", result);
arm-jtag-ew.c:437	LOG_ERROR("ARM-JTAG-EW command CMD_GET_VERSION failed (%d)", result);
arm-jtag-ew.c:562	LOG_ERROR("armjtagew_tap_append_step, overflow");
arm-jtag-ew.c:621	LOG_ERROR(
arm-jtag-ew.c:655	LOG_ERROR("armjtagew_tap_execute, wrong result %d, expected %d",
arm-jtag-ew.c:715	LOG_ERROR("jtag_libusb_bulk_read failed (requested=%d, result=%d)",
arm-jtag-ew.c:721	LOG_ERROR("jtag_libusb_bulk_write failed (requested=%d, result=%d)", out_length, result);
arm-jtag-ew.c:734	LOG_ERROR("armjtagew_write illegal out_length=%d (max=%d)",
arm11.c:158	LOG_ERROR("DPM REG READ -- fail");
arm11.c:244	LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08x)",
arm11.c:728	LOG_ERROR("%s: how to reset?", target_name(target));
arm11.c:1015	LOG_ERROR("Data transfer failed. Expected end "
arm11.c:1021	LOG_ERROR(
arm11.c:1092	LOG_ERROR("'target arm11' expects IR LENGTH = 5");
arm11.c:1184	LOG_ERROR("unexpected ARM11 ID code");
arm11.c:1195	LOG_ERROR("Only ARM v6 and v6.1 debug supported.");
arm11_dbgtap.c:151	LOG_ERROR("'arm11 target' JTAG error SCREG OUT 0x%02x", v);
arm11_dbgtap.c:579	LOG_ERROR("Out of memory allocating %u bytes", bytes);
arm11_dbgtap.c:607	LOG_ERROR("%u words out of %u not transferred",
arm11_dbgtap.c:684	LOG_ERROR("last word not transferred");
arm720t.c:334	LOG_ERROR("Failed to halt CPU after 1 sec");
arm720t.c:429	LOG_ERROR("Only cp15 is supported");
arm720t.c:446	LOG_ERROR("Only cp15 is supported");
arm7_9_common.c:92	LOG_ERROR("BUG: no hardware comparator available");
arm7_9_common.c:126	LOG_ERROR("BUG: both watchpoints used, but wp_available >= 1");
arm7_9_common.c:143	LOG_ERROR("BUG: both watchpoints used, but wp_available >= 1");
arm7_9_common.c:212	LOG_ERROR("BUG: no hardware comparator available");
arm7_9_common.c:238	LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" TARGET_PRIxADDR
arm7_9_common.c:258	LOG_ERROR("Unable to set thumb software breakpoint at address %08" TARGET_PRIxADDR
arm7_9_common.c:507	LOG_ERROR("BUG: no hardware comparator available");
arm7_9_common.c:646	LOG_ERROR("timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: %" PRIx32 "",
arm7_9_common.c:880	LOG_ERROR("%s: how to reset?", target_name(target));
arm7_9_common.c:1097	LOG_ERROR("Failed to halt CPU after 1 sec");
arm7_9_common.c:1170	LOG_ERROR(
arm7_9_common.c:1285	LOG_ERROR("Jazelle debug entry -- BROKEN!");
arm7_9_common.c:1310	LOG_ERROR("cpsr contains invalid mode value - communication failure");
arm7_9_common.c:1399	LOG_ERROR("not a valid arm core mode - communication failure?");
arm7_9_common.c:1518	LOG_ERROR("not a valid arm core mode - communication failure?");
arm7_9_common.c:1550	LOG_ERROR("BUG: dirty register '%s', but no valid data",
arm7_9_common.c:1746	LOG_ERROR(
arm7_9_common.c:1766	LOG_ERROR("unhandled core state");
arm7_9_common.c:1812	LOG_ERROR("unhandled core state");
arm7_9_common.c:1938	LOG_ERROR(
arm7_9_common.c:1955	LOG_ERROR("unhandled core state");
arm7_9_common.c:2250	LOG_ERROR("JTAG error while reading cpsr");
arm7_9_common.c:2464	LOG_ERROR("JTAG error while reading cpsr");
arm7_9_common.c:2642	LOG_ERROR(
arm920t.c:226	LOG_ERROR("failed executing JTAG queue");
arm920t.c:271	LOG_ERROR("not a valid arm core mode - communication failure?");
arm920t.c:315	LOG_ERROR("not a valid arm core mode - communication failure?");
arm920t.c:520	LOG_ERROR("BUG: %s", arm920_not);
arm920t.c:760	LOG_ERROR("Failed to halt CPU after 1 sec");
arm920t.c:1111	LOG_ERROR("not a valid arm core mode - communication failure?");
arm920t.c:1423	LOG_ERROR("not a valid arm core mode - communication failure?");
arm920t.c:1524	LOG_ERROR("Only cp15 is supported");
arm920t.c:1540	LOG_ERROR("Only cp15 is supported");
arm926ejs.c:98	LOG_ERROR("cp15 read operation timed out");
arm926ejs.c:118	LOG_ERROR("Only cp15 is supported");
arm926ejs.c:181	LOG_ERROR("cp15 write operation timed out");
arm926ejs.c:201	LOG_ERROR("Only cp15 is supported");
arm926ejs.c:278	LOG_ERROR("unexpected -- debug re-entry");
arm926ejs.c:513	LOG_ERROR("BUG: %s", arm926_not);
arm926ejs.c:555	LOG_ERROR("Failed to halt CPU after 1 sec");
arm9tdmi.c:796	LOG_ERROR("Target not examined yet");
arm_adi_v5.c:372	LOG_ERROR("Size %u not supported", size);
arm_adi_v5.c:416	LOG_ERROR("Size %u not supported", size);
arm_adi_v5.c:507	LOG_ERROR("Write more than 32 bits not supported with ti_be_32_quirks");
arm_adi_v5.c:583	LOG_ERROR("Failed to write memory at " TARGET_ADDR_FMT, tar);
arm_adi_v5.c:585	LOG_ERROR("Failed to write memory and, additionally, failed to find out where");
arm_adi_v5.c:620	LOG_ERROR("Read more than 32 bits not supported with ti_be_32_quirks");
arm_adi_v5.c:635	LOG_ERROR("Failed to allocate read buffer");
arm_adi_v5.c:681	LOG_ERROR("Failed to read memory at " TARGET_ADDR_FMT, tar);
arm_adi_v5.c:685	LOG_ERROR("Failed to read memory and, additionally, failed to find out where");
arm_adi_v5.c:1158	LOG_ERROR("Invalid AP#0x%" PRIx64, ap_num);
arm_adi_v5.c:1177	LOG_ERROR("No more AP available!");
arm_adi_v5.c:1212	LOG_ERROR("BUG: refcount AP#0x%" PRIx64 " put underflow", ap->ap_num);
arm_adi_v5.c:2448	LOG_ERROR("Out of memory");
arm_adi_v5.c:2697	LOG_ERROR("CSW value cannot include 'Size' and 'AddrInc' bit-fields");
arm_adi_v5.c:2711	LOG_ERROR("CSW mask cannot include 'Size' and 'AddrInc' bit-fields");
arm_adi_v5.h:596	LOG_ERROR("BUG: refcount AP#0x%" PRIx64 " used without get", ap->ap_num);
arm_adi_v5.h:616	LOG_ERROR("BUG: refcount AP#0x%" PRIx64 " used without get", ap->ap_num);
arm_cti.c:97	LOG_ERROR("timeout waiting for target");
arm_cti.c:202	LOG_ERROR("unknown CTI register %s", name);
arm_dap.c:145	LOG_ERROR("DAP read of DPIDR1 failed...");
arm_dap.c:150	LOG_ERROR("DAP read of DPIDR1 failed...");
arm_dap.c:169	LOG_ERROR("BUG: refcount AP#%u still %u at exit", i, dap->ap[i].refcount);
arm_dap.c:310	LOG_ERROR("%s and %s have the same multidrop selectors -dp-id 0x%08"
arm_dap.c:325	LOG_ERROR("Two or more SWD non multidrop DAPs are not supported");
arm_dap.c:329	LOG_ERROR("Mixing of SWD multidrop DAPs and non multidrop DAPs is not supported");
arm_dap.c:456	LOG_ERROR("DAP instance not available. Probably a HLA target...");
arm_disassembler.c:406	LOG_ERROR("Unknown instruction");
arm_disassembler.c:2049	LOG_ERROR("ARM: should never reach this point (opcode=%08x)",
arm_disassembler.c:2992	LOG_ERROR("Thumb: should never reach this point (opcode=%04x)", opcode);
arm_disassembler.c:3017	LOG_ERROR("BUG: instruction type %i isn't a load/store instruction",
arm_dpm.c:468	LOG_ERROR("%s: can't %s HW %spoint %d",
arm_dpm.c:890	LOG_ERROR("unsupported {break,watch}point length/alignment");
arm_io.c:172	LOG_ERROR("error executing hosted NAND write");
arm_io.c:278	LOG_ERROR("error executing hosted NAND read");
arm_semihosting.c:55	LOG_ERROR("Failed to resume target");
arm_semihosting.c:63	LOG_ERROR("Failed to resume target");
arm_semihosting.c:224	LOG_ERROR("SPSR not valid!");
arm_semihosting.c:337	LOG_ERROR("Unsupported semi-hosting Target");
arm_semihosting.c:364	LOG_ERROR("Failed semihosting operation (0x%02X)",
arm_simulator.c:123	LOG_ERROR("BUG: shifter_operand.variant not 0, 1 or 2");
arm_simulator.c:215	LOG_ERROR("BUG: should never get here");
arm_simulator.c:447	LOG_ERROR("BUG: offset_mode neither 0 (offset) nor 1 (scaled register)");
arm_simulator.c:623	LOG_ERROR("Unimplemented instruction, could not simulate it.");
arm_tpiu_swo.c:150	LOG_ERROR("Error writing to the SWO trace destination file");
arm_tpiu_swo.c:158	LOG_ERROR("Error writing to connection"); /* FIXME: which connection? */
arm_tpiu_swo.c:224	LOG_ERROR("Failed to stop adapter's trace");
arm_tpiu_swo.c:255	LOG_ERROR("Out of memory");
arm_tpiu_swo.c:272	LOG_ERROR("error during read: %s", strerror(errno));
arm_tpiu_swo.c:291	LOG_ERROR("Failed to find connection to close!");
arm_tpiu_swo.c:481	LOG_ERROR("Out of memory");
arm_tpiu_swo.c:528	LOG_ERROR("Out of memory");
arm_tpiu_swo.c:649	LOG_ERROR(MSG "Current target is not a Cortex-M nor a HLA");
arm_tpiu_swo.c:653	LOG_ERROR(MSG "Current target not examined yet");
arm_tpiu_swo.c:725	LOG_ERROR("Out of memory");
arm_tpiu_swo.c:958	LOG_ERROR("Out of memory");
arm_tpiu_swo.c:967	LOG_ERROR("Out of memory");
arm_tpiu_swo.c:975	LOG_ERROR("Out of memory");
arm_tpiu_swo.c:1045	LOG_ERROR(MSG "Current target is not a Cortex-M nor a HLA");
armv4_5.c:177	LOG_ERROR("unrecognized psr mode: %#02x", psr_mode);
armv4_5.c:217	LOG_ERROR("invalid mode value encountered %d", mode);
armv4_5.c:245	LOG_ERROR("mode index out of bounds %d", number);
armv4_5.c:478	LOG_ERROR("Jazelle state handling is BROKEN!");
armv4_5.c:510	LOG_ERROR("Register map is not available yet, the target is not fully initialised");
armv4_5.c:519	LOG_ERROR("Invalid CPSR mode");
armv4_5.c:787	LOG_ERROR("BUG: called for a non-ARM target");
armv4_5.c:831	LOG_ERROR("not a valid arm core mode - communication failure?");
armv4_5.c:1280	LOG_ERROR("not a valid arm core mode - communication failure?");
armv4_5.c:1351	LOG_ERROR("not a valid register class type in query.");
armv4_5.c:1409	LOG_ERROR("current target isn't an ARMV4/5 target");
armv4_5.c:1419	LOG_ERROR("not a valid arm core mode - communication failure?");
armv4_5.c:1425	LOG_ERROR("ARMv4 target needs HW breakpoint location");
armv4_5.c:1459	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
armv4_5.c:1464	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
armv4_5.c:1480	LOG_ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
armv4_5.c:1498	LOG_ERROR("can't add HW breakpoint to terminate algorithm");
armv4_5.c:1531	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
armv4_5.c:1537	LOG_ERROR(
armv4_5.c:1656	LOG_ERROR("error executing ARM crc algorithm");
armv4_5.c:1691	LOG_ERROR("Erase value 0x%02" PRIx8 " not yet supported for ARMv4/v5 targets",
armv4_5.c:1770	LOG_ERROR("%s doesn't implement MRC", target_type_name(target));
armv4_5.c:1778	LOG_ERROR("%s doesn't implement MRRC", target_type_name(target));
armv4_5.c:1787	LOG_ERROR("%s doesn't implement MCR", target_type_name(target));
armv4_5.c:1795	LOG_ERROR("%s doesn't implement MCRR", target_type_name(target));
armv4_5_mmu.c:37	LOG_ERROR("Address translation failure");
armv4_5_mmu.c:42	LOG_ERROR("Address translation failure");
armv4_5_mmu.c:74	LOG_ERROR("Address translation failure");
armv4_5_mmu.c:100	LOG_ERROR("Address translation failure");
armv7a.c:204	LOG_ERROR("smp target : outer cache already initialized\n");
armv7a.c:315	LOG_ERROR("MPIDR not in multiprocessor format");
armv7a.c:497	LOG_ERROR("Failed to read VCR register\n");
armv7a.c:510	LOG_ERROR("Failed to write VCR register\n");
armv7a.c:541	LOG_ERROR("BUG: called for a non-ARMv7A target");
armv7a_cache.c:115	LOG_ERROR("clean invalidate failed");
armv7a_cache.c:203	LOG_ERROR("d-cache invalidate failed");
armv7a_cache.c:247	LOG_ERROR("d-cache invalidate failed");
armv7a_cache.c:291	LOG_ERROR("d-cache invalidate failed");
armv7a_cache.c:329	LOG_ERROR("i-cache invalidate failed");
armv7a_cache.c:377	LOG_ERROR("i-cache invalidate failed");
armv7a_cache_l2x.c:28	LOG_ERROR("%s: target not halted", __func__);
armv7a_cache_l2x.c:91	LOG_ERROR("d-cache invalidate failed");
armv7a_cache_l2x.c:126	LOG_ERROR("d-cache invalidate failed");
armv7a_cache_l2x.c:161	LOG_ERROR("d-cache invalidate failed");
armv7a_cache_l2x.c:191	LOG_ERROR("L2 cache was already initialised\n");
armv7a_cache_l2x.c:207	LOG_ERROR("smp target : cache l2 already initialized\n");
armv7a_mmu.c:218	LOG_ERROR("TTB not cached!");
armv7a_mmu.c:248	LOG_ERROR("Failed to read first-level page table!");
armv7a_mmu.c:302	LOG_ERROR("Failed to read second-level page table!");
armv7m.c:279	LOG_ERROR("Bad register ID %u", arm_reg_id);
armv7m.c:452	LOG_ERROR("Error setting register %s", r->name);
armv7m.c:523	LOG_ERROR("current target isn't an ARMV7M target");
armv7m.c:566	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
armv7m.c:571	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
armv7m.c:636	LOG_ERROR("current target isn't an ARMV7M target");
armv7m.c:681	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
armv7m.c:686	LOG_ERROR(
armv7m.c:810	LOG_ERROR("unable to allocate feature list");
armv7m.c:816	LOG_ERROR("unable to allocate reg type list");
armv7m.c:921	LOG_ERROR("error executing cortex_m crc algorithm");
armv7m_trace.c:50	LOG_ERROR("timeout waiting for ITM_TCR_BUSY_BIT");
armv8.c:114	LOG_ERROR("unrecognized psr mode: %#02x", psr_mode);
armv8.c:248	LOG_ERROR("unknown core state");
armv8.c:911	LOG_ERROR("mpidr not in multiprocessor format");
armv8.c:951	LOG_ERROR("Jazelle state handling is BROKEN!");
armv8.c:1175	LOG_ERROR("Address translation failed at stage %i, FST=%x, PTW=%i",
armv8.c:1244	LOG_ERROR("Unknown option: %s", CMD_ARGV[argp]);
armv8.c:1312	LOG_ERROR("BUG: called for a non-ARM target");
armv8.c:1339	LOG_ERROR("BUG: called for a non-Armv8 target");
armv8.c:1830	LOG_ERROR("unable to allocate feature list");
armv8.c:1839	LOG_ERROR("unable to allocate reg type list");
armv8.c:1871	LOG_ERROR("unable to allocate feature list");
armv8.c:1877	LOG_ERROR("unable to allocate reg type list");
armv8.c:1988	LOG_ERROR("not a valid register class type in query.");
armv8.c:2014	LOG_ERROR("not a valid register class type in query.");
armv8_cache.c:98	LOG_ERROR("clean invalidate failed");
armv8_cache.c:137	LOG_ERROR("d-cache invalidate failed");
armv8_cache.c:175	LOG_ERROR("d-cache invalidate failed");
armv8_cache.c:235	LOG_ERROR("trying to flush un-identified cache");
armv8_dpm.c:92	LOG_ERROR("Timeout waiting for read dcc");
armv8_dpm.c:128	LOG_ERROR("Timeout waiting for DTR_TX_FULL, dscr = 0x%08" PRIx32, dscr);
armv8_dpm.c:170	LOG_ERROR("Timeout waiting for dpm prepare");
armv8_dpm.c:180	LOG_ERROR("DSCR_DTR_RX_FULL, dscr 0x%08" PRIx32, dscr);
armv8_dpm.c:213	LOG_ERROR("Could not read DSCR register, opcode = 0x%08" PRIx32, opcode);
armv8_dpm.c:217	LOG_ERROR("Timeout waiting for aarch64_exec_opcode");
armv8_dpm.c:235	LOG_ERROR("Could not read DSCR register");
armv8_dpm.c:239	LOG_ERROR("Timeout waiting for aarch64_exec_opcode");
armv8_dpm.c:251	LOG_ERROR("Opcode 0x%08" PRIx32 ", DSCR.ERR=1, DSCR.EL=%i", opcode, dpm->last_el);
armv8_dpm.c:585	LOG_ERROR("%s: Invalid target exception level %i", __func__, target_el);
armv8_dpm.c:854	LOG_ERROR("%s: can't %s HW %spoint %d",
armv8_dpm.c:1143	LOG_ERROR("unsupported {break,watch}point length/alignment");
armv8_dpm.c:1315	LOG_ERROR("%s: EL %i is invalid, DSCR corrupted?", __func__, el);
at91sam3.c:2054	LOG_ERROR("BUG: Embedded flash has only %u pages", (unsigned)(n));
at91sam3.c:2060	LOG_ERROR("BUG: Embedded flash has only %d GPNVMs",
at91sam3.c:2072	LOG_ERROR("Argument is meaningless for cmd: %d", command);
at91sam3.c:2075	LOG_ERROR("Unknown command %d", command);
at91sam3.c:2094	LOG_ERROR("flash controller(%d) is not ready! Error",
at91sam3.c:2099	LOG_ERROR("Flash controller(%d) is not ready, attempting reset",
at91sam3.c:2153	LOG_ERROR("Command timeout");
at91sam3.c:2230	LOG_ERROR("GPNVM only works with Bank0");
at91sam3.c:2235	LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
at91sam3.c:2243	LOG_ERROR("Failed");
at91sam3.c:2271	LOG_ERROR("GPNVM only works with Bank0");
at91sam3.c:2276	LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
at91sam3.c:2302	LOG_ERROR("GPNVM only works with Bank0");
at91sam3.c:2307	LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
at91sam3.c:2855	LOG_ERROR("INVALID SAM3 REGISTER");
at91sam3.c:2870	LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d",
at91sam3.c:2886	LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d",
at91sam3.c:2959	LOG_ERROR("Target not halted");
at91sam3.c:2965	LOG_ERROR("no private for this bank?");
at91sam3.c:3000	LOG_ERROR("NO RAM!");
at91sam3.c:3015	LOG_ERROR("Address 0x%08x invalid bank address (try 0x%08x or 0x%08x "
at91sam3.c:3086	LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can ID this chip?)",
at91sam3.c:3136	LOG_ERROR("Target not halted");
at91sam3.c:3142	LOG_ERROR("Invalid/unknown bank number");
at91sam3.c:3169	LOG_ERROR("No memory!");
at91sam3.c:3218	LOG_ERROR("Target not halted");
at91sam3.c:3249	LOG_ERROR("Target not halted");
at91sam3.c:3281	LOG_ERROR("SAM3: Flash program failed to read page phys address: 0x%08x",
at91sam3.c:3319	LOG_ERROR("SAM3: Failed to write (buffer) page at phys address 0x%08x",
at91sam3.c:3331	LOG_ERROR("SAM3: Error performing Erase & Write page @ phys address 0x%08x",
at91sam3.c:3334	LOG_ERROR("SAM3: Page @ Phys address 0x%08x is locked", (unsigned int)(adr));
at91sam3.c:3338	LOG_ERROR("SAM3: Flash Command error @phys address 0x%08x", (unsigned int)(adr));
at91sam3.c:3367	LOG_ERROR("Target not halted");
at91sam3.c:3379	LOG_ERROR("Flash write error - past end of bank");
at91sam3.c:3380	LOG_ERROR(" offset: 0x%08x, count 0x%08x, BankEnd: 0x%08x",
at91sam3.c:3390	LOG_ERROR("No memory for %d Byte page buffer", (int)(private->page_size));
at91sam3.c:3561	LOG_ERROR("sam3 - target not halted");
at91sam4.c:1504	LOG_ERROR("BUG: Embedded flash has only %u pages", (unsigned)(n));
at91sam4.c:1510	LOG_ERROR("BUG: Embedded flash has only %d GPNVMs",
at91sam4.c:1522	LOG_ERROR("Argument is meaningless for cmd: %d", command);
at91sam4.c:1525	LOG_ERROR("Unknown command %d", command);
at91sam4.c:1544	LOG_ERROR("flash controller(%d) is not ready! Error",
at91sam4.c:1549	LOG_ERROR("Flash controller(%d) is not ready, attempting reset",
at91sam4.c:1603	LOG_ERROR("Command timeout");
at91sam4.c:1726	LOG_ERROR("GPNVM only works with Bank0");
at91sam4.c:1731	LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
at91sam4.c:1739	LOG_ERROR("Failed");
at91sam4.c:1767	LOG_ERROR("GPNVM only works with Bank0");
at91sam4.c:1772	LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
at91sam4.c:1798	LOG_ERROR("GPNVM only works with Bank0");
at91sam4.c:1803	LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
at91sam4.c:2362	LOG_ERROR("INVALID SAM4 REGISTER");
at91sam4.c:2377	LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Err: %d",
at91sam4.c:2393	LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Error: %d",
at91sam4.c:2452	LOG_ERROR("Target not halted");
at91sam4.c:2458	LOG_ERROR("no private for this bank?");
at91sam4.c:2493	LOG_ERROR("NO RAM!");
at91sam4.c:2508	LOG_ERROR("Address 0x%08x invalid bank address (try 0x%08x"
at91sam4.c:2572	LOG_ERROR("SAM4 ChipID 0x%08x not found in table (perhaps you can ID this chip?)",
at91sam4.c:2642	LOG_ERROR("Target not halted");
at91sam4.c:2648	LOG_ERROR("Invalid/unknown bank number");
at91sam4.c:2678	LOG_ERROR("No memory!");
at91sam4.c:2732	LOG_ERROR("Target not halted");
at91sam4.c:2758	LOG_ERROR("SAM4: Error performing Erase page @ lock region number %u",
at91sam4.c:2761	LOG_ERROR("SAM4: Lock Region %u is locked", i);
at91sam4.c:2765	LOG_ERROR("SAM4: Flash Command error @lock region %u", i);
at91sam4.c:2781	LOG_ERROR("Target not halted");
at91sam4.c:2813	LOG_ERROR("SAM4: Flash program failed to read page phys address: 0x%08x",
at91sam4.c:2826	LOG_ERROR("Error Read failed: read flash mode register");
at91sam4.c:2839	LOG_ERROR("Error Write failed: set flash mode register");
at91sam4.c:2863	LOG_ERROR("SAM4: Failed to write (buffer) page at phys address 0x%08x",
at91sam4.c:2875	LOG_ERROR("SAM4: Error performing Write page @ phys address 0x%08x",
at91sam4.c:2878	LOG_ERROR("SAM4: Page @ Phys address 0x%08x is locked", (unsigned int)(adr));
at91sam4.c:2882	LOG_ERROR("SAM4: Flash Command error @phys address 0x%08x", (unsigned int)(adr));
at91sam4.c:2911	LOG_ERROR("Target not halted");
at91sam4.c:2923	LOG_ERROR("Flash write error - past end of bank");
at91sam4.c:2924	LOG_ERROR(" offset: 0x%08x, count 0x%08x, BankEnd: 0x%08x",
at91sam4.c:2934	LOG_ERROR("No memory for %d Byte page buffer", (int)(private->page_size));
at91sam4.c:3109	LOG_ERROR("sam4 - target not halted");
at91sam4l.c:186	LOG_ERROR("%s got error status 0x%08" PRIx32, __func__, err);
at91sam4l.c:196	LOG_ERROR("Address " TARGET_ADDR_FMT
at91sam4l.c:206	LOG_ERROR("No memory for flash bank chip info");
at91sam4l.c:241	LOG_ERROR("Quick page read %" PRIu32 " failed", pn);
at91sam4l.c:248	LOG_ERROR("Couldn't read erase status");
at91sam4l.c:269	LOG_ERROR("Couldn't read chip ID");
at91sam4l.c:275	LOG_ERROR("Couldn't read extended chip ID");
at91sam4l.c:295	LOG_ERROR("Unknown flash size (chip ID is %08" PRIx32 "), assuming 128K", id);
at91sam4l.c:303	LOG_ERROR("Couldn't read Flash parameters");
at91sam4l.c:353	LOG_ERROR("Target not halted");
at91sam4l.c:380	LOG_ERROR("Target not halted");
at91sam4l.c:392	LOG_ERROR("Protect range %u - %u not valid (%u sectors total)", first, last,
at91sam4l.c:406	LOG_ERROR("Can't %slock region containing page %d", set ? "" : "un", i);
at91sam4l.c:421	LOG_ERROR("Target not halted");
at91sam4l.c:433	LOG_ERROR("Erase range %u - %u not valid (%u sectors total)", first, last,
at91sam4l.c:444	LOG_ERROR("Erase All failed");
at91sam4l.c:460	LOG_ERROR("Erasing page %u failed", pn);
at91sam4l.c:491	LOG_ERROR("%s: can't clear page buffer", __func__);
at91sam4l.c:499	LOG_ERROR("%s: %d", __func__, __LINE__);
at91sam4l.c:557	LOG_ERROR("Target not halted");
at91sam7.c:301	LOG_ERROR("status register: 0x%" PRIx32 "", status);
at91sam7.c:303	LOG_ERROR("Lock Error Bit Detected, Operation Abort");
at91sam7.c:305	LOG_ERROR("Invalid command and/or bad keyword, Operation Abort");
at91sam7.c:307	LOG_ERROR("Security Bit Set, Operation Abort");
at91sam7.c:548	LOG_ERROR(
at91sam7.c:565	LOG_ERROR("No memory for flash bank");
at91sam7.c:575	LOG_ERROR("No memory for flash driver priv");
at91sam7.c:640	LOG_ERROR("Target not halted");
at91sam7.c:661	LOG_ERROR("Target not halted");
at91sam7.c:753	LOG_ERROR("No memory for flash bank");
at91sam7.c:763	LOG_ERROR("No memory for flash driver priv");
at91sam7.c:814	LOG_ERROR("Target not halted");
at91sam7.c:866	LOG_ERROR("Target not halted");
at91sam7.c:908	LOG_ERROR("Target not halted");
at91sam7.c:970	LOG_ERROR("Target not halted");
at91sam7.c:1050	LOG_ERROR("target has to be halted to perform flash operation");
at91sam9.c:74	LOG_ERROR("Target must be halted to use NAND controller (%s)", label);
at91sam9.c:298	LOG_ERROR("ECC controller address must be set when not reading raw NAND data");
at91sam9.c:327	LOG_ERROR("Unable to allocate space for OOB");
at91sam9.c:378	LOG_ERROR("Error detected!");
at91sam9.c:380	LOG_ERROR("Multiple errors encountered; unrecoverable!");
at91sam9.c:400	LOG_ERROR("Error in ECC bytes detected");
at91sam9.c:445	LOG_ERROR("Unable to write data to NAND device");
at91sam9.c:469	LOG_ERROR("Unable to write OOB data to NAND");
at91sam9.c:491	LOG_ERROR("parameters: %s target chip_addr", CMD_ARGV[0]);
at91sam9.c:497	LOG_ERROR("invalid NAND chip address: %s", CMD_ARGV[2]);
at91sam9.c:504	LOG_ERROR("invalid ECC controller address: %s", CMD_ARGV[3]);
at91sam9.c:511	LOG_ERROR("unable to allocate space for controller private data");
at91samd.c:431	LOG_ERROR("Couldn't read NVM Parameters register");
at91samd.c:449	LOG_ERROR("Couldn't read Device ID register");
at91samd.c:455	LOG_ERROR("Couldn't find part corresponding to DID %08" PRIx32, id);
at91samd.c:464	LOG_ERROR("Couldn't determine Flash page size");
at91samd.c:517	LOG_ERROR("Can't read NVM intflag");
at91samd.c:526	LOG_ERROR("SAMD: NVM programming timed out");
at91samd.c:533	LOG_ERROR("Can't read NVM status");
at91samd.c:541	LOG_ERROR("SAMD: NVM Error");
at91samd.c:546	LOG_ERROR("SAMD: NVM lock error");
at91samd.c:551	LOG_ERROR("SAMD: NVM programming error");
at91samd.c:559	LOG_ERROR("Can't clear NVM error conditions");
at91samd.c:569	LOG_ERROR("Target not halted");
at91samd.c:604	LOG_ERROR("Failed to erase row containing %08" PRIx32, address);
at91samd.c:624	LOG_ERROR("Couldn't read Device ID register");
at91samd.c:630	LOG_ERROR("Couldn't determine device family");
at91samd.c:672	LOG_ERROR("Couldn't determine Flash page size");
at91samd.c:698	LOG_ERROR("Couldn't erase user row");
at91samd.c:716	LOG_ERROR("Read of NVM register CTRKB failed.");
at91samd.c:757	LOG_ERROR("Target not halted");
at91samd.c:805	LOG_ERROR("Target not halted");
at91samd.c:819	LOG_ERROR("SAMD: failed to erase sector %d at 0x%08" PRIx32, s, bank->sectors[s].offset);
at91samd.c:842	LOG_ERROR("Target not halted");
at91samd.c:864	LOG_ERROR("%s: %d", __func__, __LINE__);
at91samd.c:909	LOG_ERROR("%s: %d", __func__, __LINE__);
at91samd.c:927	LOG_ERROR("%s: write failed at address 0x%08" PRIx32, __func__, address);
at91samd.c:945	LOG_ERROR("Address " TARGET_ADDR_FMT
at91samd.c:955	LOG_ERROR("No memory for flash bank chip info");
at91samd.c:1001	LOG_ERROR("Target not halted");
at91samd.c:1024	LOG_ERROR("Target not halted");
at91samd.c:1082	LOG_ERROR("Target not halted.");
at91samd.c:1089	LOG_ERROR("Couldn't determine the mask for reserved bits.");
at91samd.c:1114	LOG_ERROR("NVMUSERROW could not be read.");
at91samd.c:1126	LOG_ERROR("Target not halted");
at91samd.c:1134	LOG_ERROR("Couldn't determine Flash page size");
ath79.c:259	LOG_ERROR("not enough memory");
ath79.c:365	LOG_ERROR("Unknown arg: %s", CMD_ARGV[6]);
ath79.c:372	LOG_ERROR("not enough memory");
ath79.c:419	LOG_ERROR("timeout");
ath79.c:446	LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32,
ath79.c:499	LOG_ERROR("Target not halted");
ath79.c:504	LOG_ERROR("Flash sector invalid");
ath79.c:509	LOG_ERROR("Flash bank not probed");
ath79.c:518	LOG_ERROR("Flash sector %u protected", sector);
ath79.c:559	LOG_ERROR("ath79_write_page: unaligned write address: %08" PRIx32,
ath79.c:564	LOG_ERROR("ath79_write_page: page buffer not initialized");
ath79.c:568	LOG_ERROR("ath79_write_page: len bigger than page size %" PRIu32 ": %" PRIu32,
ath79.c:642	LOG_ERROR("Target not halted");
ath79.c:660	LOG_ERROR("Flash sector %u protected", sector);
ath79.c:683	LOG_ERROR("ath79_read_buffer: unaligned read address: %08" PRIx32,
ath79.c:711	LOG_ERROR("Target not halted");
ath79.c:731	LOG_ERROR("Target not halted");
ath79.c:747	LOG_ERROR("No SPI flash found");
ath79.c:775	LOG_ERROR("Device ID 0x%" PRIx32 " is not known",
ath79.c:797	LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
ath79.c:819	LOG_ERROR("not enough memory");
ath79.c:828	LOG_ERROR("not enough memory");
atsame5.c:260	LOG_ERROR("Couldn't read NVM Parameters register");
atsame5.c:278	LOG_ERROR("Couldn't read Device ID register");
atsame5.c:284	LOG_ERROR("Couldn't find part corresponding to DID %08" PRIx32, id);
atsame5.c:293	LOG_ERROR("Couldn't determine Flash page size");
atsame5.c:348	LOG_ERROR("SAM: error reading the NVMCTRL_INTFLAG register");
atsame5.c:357	LOG_ERROR("SAM: NVM programming timed out");
atsame5.c:370	LOG_ERROR("SAM: Addr Error");
atsame5.c:375	LOG_ERROR("SAM: NVM Error");
atsame5.c:380	LOG_ERROR("SAM: NVM lock error");
atsame5.c:385	LOG_ERROR("SAM: NVM programming error");
atsame5.c:393	LOG_ERROR("Can't clear NVM error conditions");
atsame5.c:403	LOG_ERROR("Target not halted");
atsame5.c:438	LOG_ERROR("Failed to erase block containing %08" PRIx32, address);
atsame5.c:452	LOG_ERROR("Target not halted");
atsame5.c:462	LOG_ERROR("The flash controller must be in manual write mode. Issue 'reset init' and retry.");
atsame5.c:492	LOG_ERROR("Couldn't determine Flash page size");
atsame5.c:526	LOG_ERROR("Couldn't erase user row");
atsame5.c:576	LOG_ERROR("Target not halted");
atsame5.c:626	LOG_ERROR("Target not halted");
atsame5.c:638	LOG_ERROR("SAM: failed to erase sector %d at 0x%08" PRIx32, s, bank->sectors[s].offset);
atsame5.c:667	LOG_ERROR("%s: %d", __func__, __LINE__);
atsame5.c:712	LOG_ERROR("%s: %d", __func__, __LINE__);
atsame5.c:718	LOG_ERROR("%s: write failed at address 0x%08" PRIx32, __func__, address);
atsame5.c:737	LOG_ERROR("Address " TARGET_ADDR_FMT " invalid bank address (try "
atsame5.c:745	LOG_ERROR("No memory for flash bank chip info");
atsame5.c:816	LOG_ERROR("USER PAGE could not be read.");
atsamv.c:90	LOG_ERROR("flash controller is not ready");
atsamv.c:125	LOG_ERROR("Command timeout");
atsamv.c:175	LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
atsamv.c:181	LOG_ERROR("samv_get_gpnvm failed");
atsamv.c:199	LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
atsamv.c:217	LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
atsamv.c:317	LOG_ERROR("unexpected eproc code: %d was expecting 0 (Cortex-M7)", eproc);
atsamv.c:333	LOG_ERROR("unrecognized flash size code: %d", nvm_size_code);
atsamv.c:372	LOG_ERROR("Target not halted");
atsamv.c:391	LOG_ERROR("error performing erase page @ lock region number %u", i);
atsamv.c:393	LOG_ERROR("lock region %u is locked", i);
atsamv.c:397	LOG_ERROR("flash command error @lock region %u", i);
atsamv.c:408	LOG_ERROR("Target not halted");
atsamv.c:427	LOG_ERROR("flash program failed to read page @ 0x%08x",
atsamv.c:442	LOG_ERROR("failed to buffer page at 0x%08x", (unsigned int)addr);
atsamv.c:448	LOG_ERROR("error performing write page at 0x%08x", (unsigned int)addr);
atsamv.c:450	LOG_ERROR("page at 0x%08x is locked", (unsigned int)addr);
atsamv.c:454	LOG_ERROR("flash command error at 0x%08x", (unsigned int)addr);
atsamv.c:464	LOG_ERROR("target not halted");
atsamv.c:472	LOG_ERROR("flash write error - past end of bank");
atsamv.c:473	LOG_ERROR(" offset: 0x%08x, count 0x%08x, bank end: 0x%08x",
atsamv.c:589	LOG_ERROR("target not halted");
avr32_ap7k.c:273	LOG_ERROR("can't request a halt while in reset if nSRST pulls nTRST");
avr32_ap7k.c:291	LOG_ERROR("%s: implement me", __func__);
avr32_ap7k.c:298	LOG_ERROR("%s: implement me", __func__);
avr32_ap7k.c:388	LOG_ERROR("%s: implement me", __func__);
avr32_ap7k.c:395	LOG_ERROR("%s: implement me", __func__);
avr32_ap7k.c:403	LOG_ERROR("%s: implement me", __func__);
avr32_ap7k.c:410	LOG_ERROR("%s: implement me", __func__);
avr32_ap7k.c:418	LOG_ERROR("%s: implement me", __func__);
avr32_ap7k.c:577	LOG_ERROR("%s: implement me", __func__);
avr32_jtag.c:37	LOG_ERROR("%s: setting address failed", __func__);
avr32_jtag.c:74	LOG_ERROR("%s: setting address failed", __func__);
avr32_jtag.c:109	LOG_ERROR("%s: reading data failed", __func__);
avr32_jtag.c:149	LOG_ERROR("%s: reading data failed", __func__);
avr32_jtag.c:206	LOG_ERROR("%s: setting address failed", __func__);
avr32_jtag.c:240	LOG_ERROR("%s: reading data failed", __func__);
avr32_jtag.c:280	LOG_ERROR("%s: reading data failed", __func__);
avrf.c:221	LOG_ERROR("Target not halted");
avrf.c:244	LOG_ERROR("Target not halted");
avrf.c:301	LOG_ERROR("Target not halted");
avrf.c:313	LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
avrf.c:345	LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
avrf.c:368	LOG_ERROR("Target not halted");
avrf.c:378	LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
avrf.c:409	LOG_ERROR("Target not halted");
avrt.c:153	LOG_ERROR("invalid tap");
avrt.c:157	LOG_ERROR("invalid ir_len");
avrt.c:172	LOG_ERROR("invalid tap");
avrt.c:187	LOG_ERROR("ir_len overflow, maximum is 8");
avrt.c:200	LOG_ERROR("dr_len overflow, maximum is 32");
batch.c:31	LOG_ERROR("Failed to allocate data_out in RISC-V batch.");
batch.c:36	LOG_ERROR("Failed to allocate data_in in RISC-V batch.");
batch.c:41	LOG_ERROR("Failed to allocate fields in RISC-V batch.");
batch.c:47	LOG_ERROR("Failed to allocate bscan_ctxt in RISC-V batch.");
batch.c:54	LOG_ERROR("Failed to allocate read_keys in RISC-V batch.");
batch.c:110	LOG_ERROR("Unable to execute JTAG queue");
bluenrg-x.c:100	LOG_ERROR("failed to allocate bank structure");
bluenrg-x.c:148	LOG_ERROR("Target not halted");
bluenrg-x.c:153	LOG_ERROR("Blue disable failed");
bluenrg-x.c:161	LOG_ERROR("Register write failed");
bluenrg-x.c:167	LOG_ERROR("Register write failed");
bluenrg-x.c:172	LOG_ERROR("Register write failed");
bluenrg-x.c:179	LOG_ERROR("Register write failed");
bluenrg-x.c:185	LOG_ERROR("Mass erase command failed (timeout)");
bluenrg-x.c:197	LOG_ERROR("Register write failed");
bluenrg-x.c:203	LOG_ERROR("Register write failed");
bluenrg-x.c:208	LOG_ERROR("Failed");
bluenrg-x.c:215	LOG_ERROR("Register write failed");
bluenrg-x.c:221	LOG_ERROR("Erase command failed (timeout)");
bluenrg-x.c:259	LOG_ERROR("Requested write past beyond of flash size: (offset+count) = %" PRIu32 ", size=%" PRIu32,
bluenrg-x.c:266	LOG_ERROR("Target not halted");
bluenrg-x.c:349	LOG_ERROR("error executing bluenrg-x flash write algorithm");
bluenrg-x.c:354	LOG_ERROR("flash write failed = %08" PRIx32, error);
bluenrg-x.c:362	LOG_ERROR("flash write failed = %08" PRIx32, rp);
breakpoints.c:117	LOG_ERROR("Duplicate Breakpoint asid: 0x%08" PRIx32 " (BP %" PRIu32 ")",
cc26xx.c:122	LOG_ERROR("%s: Flash operation failed", cc26xx_bank->family_name);
cc26xx.c:158	LOG_ERROR("%s: Failed to load flash helper algorithm",
cc26xx.c:173	LOG_ERROR("%s: Failed to start flash helper algorithm",
cc26xx.c:217	LOG_ERROR("Target not halted");
cc26xx.c:280	LOG_ERROR("Target not halted");
cc26xx.c:332	LOG_ERROR("Target not halted");
cc26xx.c:359	LOG_ERROR("Unable to write data to target memory");
cc3220sf.c:41	LOG_ERROR("Target not halted");
cc3220sf.c:116	LOG_ERROR("Target not halted");
cc3220sf.c:190	LOG_ERROR("Target not halted");
cc3220sf.c:288	LOG_ERROR("cc3220sf: Flash algorithm failed to run");
cc3220sf.c:294	LOG_ERROR("cc3220sf: Flash operation failed");
cc3220sf.c:350	LOG_ERROR("cc3220sf: Flash algorithm failed to run");
cc3220sf.c:358	LOG_ERROR("cc3220sf: Flash operation failed");
cc3220sf.c:402	LOG_ERROR("cc3220sf: Flash algorithm failed to run");
cc3220sf.c:408	LOG_ERROR("cc3220sf: Flash operation failed");
certus.c:32	LOG_ERROR("Not supported to write usercode on certus devices");
certus.c:182	LOG_ERROR("Password protection is set");
certus.c:194	LOG_ERROR("NV User Feature Sector OTP is Set");
certus.c:202	LOG_ERROR("NV User Feature Sector OTP is Set");
certus.c:208	LOG_ERROR("failed to enable programming mode");
certus.c:214	LOG_ERROR("erasing device failed");
certus.c:259	LOG_ERROR("erasing device failed");
cfi.c:112	LOG_ERROR("BUG: sector list not yet built");
cfi.c:320	LOG_ERROR("timeout while waiting for WSM to become ready");
cfi.c:340	LOG_ERROR("status register: 0x%x", status);
cfi.c:342	LOG_ERROR("Block Lock-Bit Detected, Operation Abort");
cfi.c:344	LOG_ERROR("Program suspended");
cfi.c:346	LOG_ERROR("Low Programming Voltage Detected, Operation Aborted");
cfi.c:348	LOG_ERROR("Program Error / Error in Setting Lock-Bit");
cfi.c:350	LOG_ERROR("Error in Block Erasure or Clear Lock-Bits");
cfi.c:352	LOG_ERROR("Block Erase Suspended");
cfi.c:388	LOG_ERROR("dq5 timeout, status: 0x%x", status);
cfi.c:404	LOG_ERROR("timeout, status: 0x%x", status);
cfi.c:419	LOG_ERROR("Out of memory");
cfi.c:438	LOG_ERROR("Could not read bank flash bank information");
cfi.c:515	LOG_ERROR("Out of memory");
cfi.c:539	LOG_ERROR("Could not read spansion bank information");
cfi.c:617	LOG_ERROR("Out of memory");
cfi.c:645	LOG_ERROR("Could not read atmel bank information");
cfi.c:798	LOG_ERROR("chip and bus width have to specified in bytes");
cfi.c:804	LOG_ERROR("No memory for flash bank info");
cfi.c:867	LOG_ERROR("couldn't erase block %u of flash bank at base "
cfi.c:922	LOG_ERROR("couldn't erase block %i of flash bank at base "
cfi.c:937	LOG_ERROR("Target not halted");
cfi.c:954	LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
cfi.c:973	LOG_ERROR("lock/unlock not supported on flash");
cfi.c:1014	LOG_ERROR(
cfi.c:1079	LOG_ERROR("Target not halted");
cfi.c:1110	LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes",
cfi.c:1202	LOG_ERROR("Unknown architecture");
cfi.c:1230	LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes",
cfi.c:1257	LOG_ERROR("Unable to write block write code to target");
cfi.c:1322	LOG_ERROR(
cfi.c:1457	LOG_ERROR("Need DQ5 support");
cfi.c:1464	LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes",
cfi.c:1475	LOG_ERROR("Out of memory");
cfi.c:1551	LOG_ERROR("flash write block failed status: 0x%" PRIx32, status);
cfi.c:1795	LOG_ERROR("Unknown architecture");
cfi.c:1805	LOG_ERROR("Unknown ARM architecture");
cfi.c:1836	LOG_ERROR("Unknown ARM architecture");
cfi.c:1843	LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes",
cfi.c:1854	LOG_ERROR("Out of memory");
cfi.c:1930	LOG_ERROR("flash write block failed status: 0x%" PRIx32, status);
cfi.c:1979	LOG_ERROR("couldn't write word at base " TARGET_ADDR_FMT
cfi.c:2004	LOG_ERROR("Write address at base " TARGET_ADDR_FMT ", address 0x%"
cfi.c:2012	LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %" PRIu32,
cfi.c:2033	LOG_ERROR(
cfi.c:2064	LOG_ERROR("Buffer write at base " TARGET_ADDR_FMT
cfi.c:2095	LOG_ERROR("couldn't write word at base " TARGET_ADDR_FMT
cfi.c:2119	LOG_ERROR("Write address at base " TARGET_ADDR_FMT
cfi.c:2127	LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %"
cfi.c:2161	LOG_ERROR("couldn't write block at base " TARGET_ADDR_FMT
cfi.c:2181	LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
cfi.c:2206	LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
cfi.c:2226	LOG_ERROR("Target not halted");
cfi.c:2295	LOG_ERROR("Target not halted");
cfi.c:2358	LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
cfi.c:2525	LOG_ERROR("Could not probe bank: no QRY");
cfi.c:2544	LOG_ERROR("Target not halted");
cfi.c:2598	LOG_ERROR("Unsupported bank chipwidth %u, can't probe memory",
cfi.c:2755	LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
cfi.c:2812	LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
cfi.c:2935	LOG_ERROR("Target not halted");
cfi.c:2949	LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
cfi.c:3023	LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
chibios.c:145	LOG_ERROR("Could not allocate space for ChibiOS/RT memory signature");
chibios.c:154	LOG_ERROR("Could not read ChibiOS/RT memory signature from target");
chibios.c:159	LOG_ERROR("Memory signature identifier does not contain magic bytes.");
chibios.c:164	LOG_ERROR("ChibiOS/RT memory signature claims to be smaller "
chibios.c:188	LOG_ERROR("ChibiOS/RT target memory signature claims an address "
chibios.c:241	LOG_ERROR("Could not read CPACR register to check FPU state");
chibios.c:273	LOG_ERROR("No symbols for ChibiOS");
chibios.c:282	LOG_ERROR("Reading the memory signature of ChibiOS/RT failed");
chibios.c:307	LOG_ERROR("Could not read next ChibiOS thread");
chibios.c:313	LOG_ERROR("ChibiOS registry integrity check failed, NULL pointer");
chibios.c:322	LOG_ERROR("ChibiOS registry integrity check failed, "
chibios.c:363	LOG_ERROR("Could not allocate space for thread details");
chibios.c:377	LOG_ERROR("Could not read next ChibiOS thread");
chibios.c:392	LOG_ERROR("Could not read ChibiOS thread name pointer from target");
chibios.c:401	LOG_ERROR("Error reading thread name from ChibiOS target");
chibios.c:420	LOG_ERROR("Error reading thread state from ChibiOS target");
chibios.c:445	LOG_ERROR("Could not read current Thread from ChibiOS target");
chibios.c:472	LOG_ERROR("Failed to determine exact stacking for the target type %s", target_type_name(rtos->target));
chibios.c:480	LOG_ERROR("Error reading stack frame from ChibiOS thread");
chromium-ec.c:96	LOG_ERROR("Chromium-EC: Symbol \"%s\" missing",
chromium-ec.c:125	LOG_ERROR("Chromium-EC: out of memory");
chromium-ec.c:139	LOG_ERROR("Chromium-EC: target not supported: %s", target_type_name(target));
chromium-ec.c:162	LOG_ERROR("Failed to determine #of tasks");
chromium-ec.c:197	LOG_ERROR("Failed to get number of tasks");
chromium-ec.c:204	LOG_ERROR("Failed to get current task");
chromium-ec.c:222	LOG_ERROR("Failed to load start_called");
chromium-ec.c:250	LOG_ERROR("Failed to load tasks_enabled");
chromium-ec.c:258	LOG_ERROR("Failed to load tasks_ready");
chromium-ec.c:277	LOG_ERROR("Failed to read name_ptr");
chromium-ec.c:285	LOG_ERROR("Failed to read task name");
chromium-ec.c:302	LOG_ERROR("Failed to get task %d's events", t);
chromium-ec.c:309	LOG_ERROR("Failed to get task %d's runtime", t);
chromium-ec.c:358	LOG_ERROR("Failed to load TCB");
chromium-ec.c:373	LOG_ERROR("Chromium-EC: out of memory");
cmsis_dap.c:266	LOG_ERROR("unable to allocate memory");
cmsis_dap.c:287	LOG_ERROR("unable to find a matching CMSIS-DAP device");
cmsis_dap.c:336	LOG_ERROR("internal: queue not empty before xfer");
cmsis_dap.c:339	LOG_ERROR("pending %u blocks, flushing", dap->pending_fifo_block_count);
cmsis_dap.c:360	LOG_ERROR("CMSIS-DAP command 0x%" PRIx8 " not implemented", current_cmd);
cmsis_dap.c:365	LOG_ERROR("CMSIS-DAP command mismatch. Sent 0x%" PRIx8
cmsis_dap.c:387	LOG_ERROR("CMSIS-DAP command CMD_DAP_SWJ_PINS failed.");
cmsis_dap.c:409	LOG_ERROR("CMSIS-DAP command CMD_DAP_SWJ_CLOCK failed.");
cmsis_dap.c:449	LOG_ERROR("CMSIS-DAP command CMD_INFO failed.");
cmsis_dap.c:468	LOG_ERROR("CMSIS-DAP command CMD_LED failed.");
cmsis_dap.c:484	LOG_ERROR("CMSIS-DAP command CMD_CONNECT failed.");
cmsis_dap.c:489	LOG_ERROR("CMSIS-DAP failed to connect in mode (%d)", mode);
cmsis_dap.c:504	LOG_ERROR("CMSIS-DAP command CMD_DISCONNECT failed.");
cmsis_dap.c:522	LOG_ERROR("CMSIS-DAP command CMD_TFER_Configure failed.");
cmsis_dap.c:538	LOG_ERROR("CMSIS-DAP command CMD_SWD_Configure failed.");
cmsis_dap.c:596	LOG_ERROR("CMSIS-DAP command SWD_Sequence failed.");
cmsis_dap.c:617	LOG_ERROR("CMSIS-DAP: command CMD_SWO_Transport(%d) failed.", transport);
cmsis_dap.c:637	LOG_ERROR("CMSIS-DAP: command CMD_SWO_Mode(%d) failed.", mode);
cmsis_dap.c:665	LOG_ERROR("CMSIS-DAP: command CMD_SWO_Baudrate(%u) -> %u failed.", in_baudrate, rvbr);
cmsis_dap.c:692	LOG_ERROR("CMSIS-DAP: command CMD_SWO_Control(%d) failed.", control);
cmsis_dap.c:717	LOG_ERROR("CMSIS-DAP: command CMD_SWO_Status failed.");
cmsis_dap.c:749	LOG_ERROR("CMSIS-DAP: command CMD_SWO_Data failed.");
cmsis_dap.c:800	LOG_ERROR("internal: write an empty queue?!");
cmsis_dap.c:868	LOG_ERROR("internal: too much pending writes %u", dap->pending_fifo_block_count);
cmsis_dap.c:882	LOG_ERROR("internal: no pending write when reading?!");
cmsis_dap.c:922	LOG_ERROR("CMSIS-DAP command mismatch. Expected 0x%x received 0x%" PRIx8,
cmsis_dap.c:953	LOG_ERROR("CMSIS-DAP transfer count mismatch: expected %d, got %d",
cmsis_dap.c:1282	LOG_ERROR("Sequence %d not supported", seq);
cmsis_dap.c:1298	LOG_ERROR("CMSIS-DAP: SWD not supported");
cmsis_dap.c:1341	LOG_ERROR("CMSIS-DAP: JTAG not supported");
cmsis_dap.c:1401	LOG_ERROR("Unable to allocate memory for CMSIS-DAP queue");
cmsis_dap.c:1489	LOG_ERROR("CMSIS-DAP: Interface reset failed");
cmsis_dap.c:1520	LOG_ERROR("BUG: %i is not a valid end state", state);
cmsis_dap.c:1615	LOG_ERROR("CMSIS-DAP command CMD_DAP_JTAG_SEQ failed.");
cmsis_dap.c:1855	LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition.",
cmsis_dap.c:1952	LOG_ERROR("BUG: unknown JTAG command type 0x%X encountered", cmd->type);
cmsis_dap.c:1974	LOG_ERROR("RTCK not supported. Set nonzero \"adapter speed\".");
cmsis_dap.c:2028	LOG_ERROR("Failed to disable the SWO-trace.");
cmsis_dap.c:2039	LOG_ERROR("SWO-trace is not supported by the device.");
cmsis_dap.c:2051	LOG_ERROR("Selected pin protocol is not supported.");
cmsis_dap.c:2084	LOG_ERROR("SWO frequency is not suitable. Please choose a "
cmsis_dap.c:2162	LOG_ERROR("CMSIS-DAP command failed.");
cmsis_dap_usb_bulk.c:74	LOG_ERROR("libusb initialization failed: %s", libusb_strerror(err));
cmsis_dap_usb_bulk.c:80	LOG_ERROR("could not enumerate USB devices: %s", libusb_strerror(num_devices));
cmsis_dap_usb_bulk.c:91	LOG_ERROR("could not get device descriptor for device %d: %s", i, libusb_strerror(err));
cmsis_dap_usb_bulk.c:121	LOG_ERROR("could not open device 0x%04x:0x%04x: %s",
cmsis_dap_usb_bulk.c:184	LOG_ERROR("could not get configuration descriptor %d for device 0x%04x:0x%04x: %s",
cmsis_dap_usb_bulk.c:345	LOG_ERROR("could not find current configuration: %s", libusb_strerror(err));
cmsis_dap_usb_bulk.c:354	LOG_ERROR("could not set configuration: %s", libusb_strerror(err));
cmsis_dap_usb_bulk.c:367	LOG_ERROR("unable to allocate memory");
cmsis_dap_usb_bulk.c:384	LOG_ERROR("unable to allocate USB transfer");
cmsis_dap_usb_bulk.c:392	LOG_ERROR("unable to allocate USB transfer");
cmsis_dap_usb_bulk.c:462	LOG_ERROR("error submitting USB read: %s", libusb_strerror(err));
cmsis_dap_usb_bulk.c:477	LOG_ERROR("error handling USB events: %s", libusb_strerror(err));
cmsis_dap_usb_bulk.c:492	LOG_ERROR("error writing USB data");
cmsis_dap_usb_bulk.c:506	LOG_ERROR("error reading USB data");
cmsis_dap_usb_bulk.c:532	LOG_ERROR("busy command USB transfer at %u", dap->pending_fifo_put_idx);
cmsis_dap_usb_bulk.c:541	LOG_ERROR("error writing USB data, late detect");
cmsis_dap_usb_bulk.c:547	LOG_ERROR("USB write: late transfer competed");
cmsis_dap_usb_bulk.c:573	LOG_ERROR("error submitting USB write: %s", libusb_strerror(err));
cmsis_dap_usb_bulk.c:584	LOG_ERROR("unable to allocate CMSIS-DAP packet buffer");
cmsis_dap_usb_bulk.c:606	LOG_ERROR("unable to allocate CMSIS-DAP pending packet buffer");
cmsis_dap_usb_bulk.c:650	LOG_ERROR("expected exactly one argument to cmsis_dap_usb_interface <interface_number>");
cmsis_dap_usb_hid.c:82	LOG_ERROR("unable to open HIDAPI");
cmsis_dap_usb_hid.c:127	LOG_ERROR("unable to allocate serial number buffer");
cmsis_dap_usb_hid.c:157	LOG_ERROR("unable to allocate memory");
cmsis_dap_usb_hid.c:165	LOG_ERROR("unable to open CMSIS-DAP device 0x%x:0x%x", target_vid, target_pid);
cmsis_dap_usb_hid.c:223	LOG_ERROR("error reading data: %ls", hid_error(dap->bdata->dev_handle));
cmsis_dap_usb_hid.c:242	LOG_ERROR("error writing data: %ls", hid_error(dap->bdata->dev_handle));
cmsis_dap_usb_hid.c:254	LOG_ERROR("unable to allocate CMSIS-DAP packet buffer");
command.c:80	LOG_ERROR("Out of memory");
command.c:207	LOG_ERROR("BUG: command '%s' does not have the "
command.c:487	LOG_ERROR("The '%s' command must be used %s 'init'.",
command.c:501	LOG_ERROR("Out of memory");
command.c:785	LOG_ERROR("Out of memory");
command.c:850	LOG_ERROR("unable to build search string");
command.c:868	LOG_ERROR("Out of memory");
command.c:877	LOG_ERROR("Out of memory");
command.c:1036	LOG_ERROR("Out of memory");
command.c:1041	LOG_ERROR("Out of memory");
command.c:1053	LOG_ERROR("Out of memory");
command.c:1063	LOG_ERROR("Out of memory");
command.c:1081	LOG_ERROR("command name '%s' is unknown", CMD_NAME);
command.c:1234	LOG_ERROR("Failed to run startup.tcl (embedded into OpenOCD)");
command.c:1278	LOG_ERROR("Invalid command argument"); \
command.c:1285	LOG_ERROR("Invalid command argument"); \
command.c:1289	LOG_ERROR("Argument overflow"); \
command.c:1293	LOG_ERROR("Argument underflow"); \
command.c:1390	LOG_ERROR("%s: argument '%s' is not valid", CMD_NAME, in);
commands.c:51	LOG_ERROR("JTAG API jtag_queue_command() called on non JTAG interface");
core.c:317	LOG_ERROR(
core.c:321	LOG_ERROR("BUG: unknown controller initialization failure");
core.c:365	LOG_ERROR(
core.c:422	LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
core.c:435	LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
core.c:445	LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
core.c:477	LOG_ERROR(
core.c:484	LOG_ERROR("BUG: unknown controller initialization failure");
core.c:559	LOG_ERROR("timeout waiting for NAND flash block erase to complete");
core.c:565	LOG_ERROR("couldn't read status");
core.c:570	LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
core.c:842	LOG_ERROR("couldn't read status");
core.c:847	LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
core.c:868	LOG_ERROR("Unable to write data to NAND device");
core.c:876	LOG_ERROR("Unable to write OOB data to NAND device");
core.c:36	LOG_ERROR("failed erasing sectors %u to %u", first, last);
core.c:55	LOG_ERROR("illegal protection block range");
core.c:63	LOG_ERROR("Flash protection is not supported.");
core.c:80	LOG_ERROR("failed setting protection for blocks %u to %u", first, last);
core.c:92	LOG_ERROR(
core.c:111	LOG_ERROR(
core.c:135	LOG_ERROR("verify failed in bank at " TARGET_ADDR_FMT " starting at 0x%8.8" PRIx32,
core.c:197	LOG_ERROR("flash bank %d does not exist", num);
core.c:271	LOG_ERROR("auto_probe failed");
core.c:291	LOG_ERROR("auto_probe failed");
core.c:316	LOG_ERROR("auto_probe failed");
core.c:327	LOG_ERROR("No flash at address " TARGET_ADDR_FMT, addr);
core.c:341	LOG_ERROR("Target not halted");
core.c:386	LOG_ERROR("Target not halted");
core.c:467	LOG_ERROR("Bank is invalid");
core.c:474	LOG_ERROR("Whole bank access must start at beginning of bank.");
core.c:483	LOG_ERROR("Flash access does not fit into bank.");
core.c:561	LOG_ERROR("address range " TARGET_ADDR_FMT " .. " TARGET_ADDR_FMT
core.c:825	LOG_ERROR("Section at " TARGET_ADDR_FMT
core.c:828	LOG_ERROR("Flash write aborted.");
core.c:913	LOG_ERROR("Out of memory for flash bank buffer");
core.c:523	LOG_ERROR("BUG: TAP path doesn't finish in a stable state");
core.c:530	LOG_ERROR("BUG: TAP_RESET is not a valid state for pathmove sequences");
core.c:537	LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
core.c:602	LOG_ERROR("jtag_add_clocks() called with TAP in unstable state \"%s\"",
core.c:620	LOG_ERROR("BUG: can't assert SRST");
core.c:630	LOG_ERROR("SRST error");
core.c:664	LOG_ERROR("BUG: can't assert SRST");
core.c:670	LOG_ERROR("BUG: can't assert only SRST");
core.c:705	LOG_ERROR("TRST/SRST error");
core.c:779	LOG_ERROR("BUG: can't assert SRST");
core.c:785	LOG_ERROR("BUG: can't assert only SRST");
core.c:817	LOG_ERROR("TRST/SRST error");
core.c:935	LOG_ERROR("No JTAG interface configured yet. "
core.c:949	LOG_ERROR("JTAG API jtag_execute_queue() called on non JTAG interface");
core.c:1009	LOG_ERROR("Unknown JTAG command: %d", cmd->type);
core.c:1122	LOG_ERROR("JTAG scan chain interrogation failed: all %s",
core.c:1124	LOG_ERROR("Check JTAG interface, timings, target power, etc.");
core.c:1311	LOG_ERROR("double-check your JTAG setup (interface, speed, ...)");
core.c:1414	LOG_ERROR("%s: IR capture error; saw 0x%0" PRIx64 " not 0x%0" PRIx32,
core.c:1432	LOG_ERROR("IR capture error at bit %d, saw 0x%s not 0x...3",
core.c:1555	LOG_ERROR("Trying to use configured scan chain anyway...");
core.c:1716	LOG_ERROR("No Valid JTAG Interface Configured.");
core.c:1836	LOG_ERROR("transport is not selected");
core.c:1842	LOG_ERROR("adapter has no srst signal");
core.c:1858	LOG_ERROR("transport %s has no trst signal",
core.c:1864	LOG_ERROR("adapter has no srst signal");
core.c:1874	LOG_ERROR("reset is not supported on transport %s",
core.c:1893	LOG_ERROR("reset is not supported on %s",
core.c:1896	LOG_ERROR("transport is not selected");
core.c:1910	LOG_ERROR("reset is not supported on %s",
core.c:1913	LOG_ERROR("transport is not selected");
core.c:1925	LOG_ERROR("The selected interface does not support tracing");
cortex_a.c:178	LOG_ERROR("trying to enable mmu on target stopped with mmu disable");
cortex_a.c:267	LOG_ERROR("Could not read DSCR register");
cortex_a.c:274	LOG_ERROR("Error waiting for InstrCompl=1");
cortex_a.c:307	LOG_ERROR("Error waiting for cortex_a_exec_opcode");
cortex_a.c:353	LOG_ERROR("Error waiting for read dcc");
cortex_a.c:378	LOG_ERROR("Error waiting for dpm prepare");
cortex_a.c:384	LOG_ERROR("DSCR_DTR_RX_FULL, dscr 0x%08" PRIx32, dscr);
cortex_a.c:812	LOG_ERROR("Error waiting for halt");
cortex_a.c:875	LOG_ERROR("How do I resume into Jazelle state??");
cortex_a.c:878	LOG_ERROR("Shouldn't be in AARCH64 state");
cortex_a.c:939	LOG_ERROR("DSCR InstrCompl must be set before leaving debug!");
cortex_a.c:956	LOG_ERROR("Error waiting for resume");
cortex_a.c:1237	LOG_ERROR("timeout waiting for target halt");
cortex_a.c:1300	LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
cortex_a.c:1393	LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
cortex_a.c:1446	LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
cortex_a.c:1456	LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
cortex_a.c:1720	LOG_ERROR("ERROR Can not find free Watchpoint Register Pair");
cortex_a.c:1912	LOG_ERROR("%s: how to reset?", target_name(target));
cortex_a.c:1996	LOG_ERROR("Could not read DSCR register");
cortex_a.c:2002	LOG_ERROR("timeout waiting for DSCR bit change");
cortex_a.c:2361	LOG_ERROR("data abort at 0x%08" PRIx32 ", dfsr = 0x%08" PRIx32, fault_dfar, fault_dfsr);
cortex_a.c:2369	LOG_ERROR("error restoring dfar/dfsr - dscr = 0x%08" PRIx32, dscr);
cortex_a.c:2667	LOG_ERROR("data abort at 0x%08" PRIx32 ", dfsr = 0x%08" PRIx32, fault_dfar, fault_dfsr);
cortex_a.c:2675	LOG_ERROR("error restoring dfar/dfsr - dscr = 0x%08" PRIx32, dscr);
cortex_a.c:2878	LOG_ERROR("Timeout waiting for dtr tx full");
cortex_a.c:2907	LOG_ERROR("Could not find APB-AP for debug access");
cortex_a.c:2913	LOG_ERROR("Cannot get AP");
cortex_a.c:2921	LOG_ERROR("Could not initialize the APB-AP");
cortex_a.c:2934	LOG_ERROR("Can't detect %s's dbgbase from the ROM table; you need to specify it explicitly.",
cortex_a.c:3144	LOG_ERROR("Out of memory");
cortex_a.c:3165	LOG_ERROR("Out of memory");
cortex_a.c:3261	LOG_ERROR("target not examined yet");
cortex_a.c:3283	LOG_ERROR("Unknown parameter: %s - should be off or on", CMD_ARGV[0]);
cortex_m.c:1699	LOG_ERROR("Unexpected DM-AP ID: %08x\r\n", ap_id);
cortex_m.c:2759	LOG_ERROR("Cannot get AP");
davinci.c:63	LOG_ERROR("Target must be halted to use NAND controller (%s)", label);
davinci.c:81	LOG_ERROR("chip address %08" PRIx32 " not NAND-enabled?", info->data);
davinci.c:253	LOG_ERROR("Missing NAND data; try 'nand raw_access enable'");
davinci.c:364	LOG_ERROR("couldn't read status");
davinci.c:369	LOG_ERROR("write operation failed, status: 0x%02x", status);
davinci.c:681	LOG_ERROR("Invalid NAND chip address %s", CMD_ARGV[2]);
davinci.c:692	LOG_ERROR("Invalid ecc mode %s", CMD_ARGV[3]);
davinci.c:698	LOG_ERROR("Invalid AEMIF controller address %s", CMD_ARGV[4]);
davinci.c:711	LOG_ERROR("NAND address %08lx out of range?", chip);
davinci.c:716	LOG_ERROR("unrecognized AEMIF controller address %08lx", aemif);
driver.c:129	LOG_ERROR("At least one TAP shouldn't be in BYPASS mode");
dsp563xx.c:916	LOG_ERROR("no IDCODE present on device");
dsp563xx.c:1049	LOG_ERROR("jtag status contains invalid mode value - communication failure");
dsp563xx.c:1406	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
dsp563xx.c:1411	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
dsp563xx.c:1447	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
dsp563xx.c:1452	LOG_ERROR(
dsp563xx.c:1891	LOG_ERROR("Cannot add watchpoint. Hardware resource already used.");
dsp563xx.c:1909	LOG_ERROR("Unknown mem_type parameter (%" PRIu32 ")", mem_type);
dsp563xx.c:1926	LOG_ERROR("Unsupported write mode (%d)", rw);
dsp563xx.c:1946	LOG_ERROR("Unsupported condition code (%d)", cond);
dsp563xx.c:1987	LOG_ERROR("Cannot remove watchpoint, as no watchpoint is currently configured!");
dsp5680xx.c:22	#define err_check(r, c, m) if (r != ERROR_OK) {LOG_ERROR(_E, c, __func__, __LINE__, m); return r; }
dsp5680xx.c:982	LOG_ERROR
dsp5680xx.c:989	LOG_ERROR("%s: Target status invalid - communication failure",
dsp5680xx.c:1291	LOG_ERROR("%s: Could not write to p:0x%04" PRIX32, __func__,
dsp5680xx.c:1348	LOG_ERROR("%s: Could not write to p:0x%04" PRIX32, __func__,
dsp5680xx.c:1385	LOG_ERROR("%s: Could not write to p:0x%04" PRIX32, __func__,
dsp5680xx_flash.c:140	LOG_ERROR("%s: Flash bank cannot fit data.", __func__);
dsp5680xx_flash.c:149	LOG_ERROR("%s: Writing to odd addresses not supported for this target", __func__);
eCos.c:472	LOG_ERROR("eCos: Invalid symbol index %u", idx);
eCos.c:517	LOG_ERROR("eCos: Unexpected XML char %c", *raw);
eCos.c:727	LOG_ERROR("No symbols for eCos");
eCos.c:736	LOG_ERROR("Don't have the thread list head");
eCos.c:788	LOG_ERROR("Reading active thread address");
eCos.c:799	LOG_ERROR("Could not read eCos current thread from target");
eCos.c:850	LOG_ERROR("Could not read eCos thread id from target");
eCos.c:861	LOG_ERROR("Could not read eCos thread name pointer from target");
eCos.c:872	LOG_ERROR("Error reading thread name from eCos target");
eCos.c:909	LOG_ERROR("Error reading thread state from eCos target");
eCos.c:960	LOG_ERROR("Error reading thread sleep reason from eCos target");
eCos.c:986	LOG_ERROR("Error reading thread priority from eCos target");
eCos.c:999	LOG_ERROR("OOM allocating extra information buffer");
eCos.c:1022	LOG_ERROR("Error reading next thread pointer in eCos thread list");
eCos.c:1076	LOG_ERROR("Error reading unique id from eCos thread 0x%08" PRIX32 "", thread_index);
eCos.c:1098	LOG_ERROR("Error reading stack frame from eCos thread");
eCos.c:1103	LOG_ERROR("NULL stack pointer in thread %" PRIu64, thread_id);
eCos.c:1111	LOG_ERROR("Error reading stack layout for eCos thread");
eCos.c:1222	LOG_ERROR("Could not find target in eCos compatibility list");
efinix.c:48	LOG_ERROR("couldn't open %s: %s", filename, strerror(errno));
efinix.c:58	LOG_ERROR("Failed to get length from file %s: %s", filename, strerror(errno));
efinix.c:66	LOG_ERROR("Out of memory");
efinix.c:81	LOG_ERROR("unexpected line length");
efinix.c:89	LOG_ERROR("unexpected char in hex string");
efinix.c:108	LOG_ERROR("Unable to detect filename suffix");
efinix.c:119	LOG_ERROR("Unable to detect filetype");
efinix.c:129	LOG_ERROR("Out of memory");
efinix.c:183	LOG_ERROR("Out of memory");
efinix.c:220	LOG_ERROR("family unknown, please specify for 'pld create'");
efinix.c:228	LOG_ERROR("Devices has only user register 1 to %d", num_user);
efinix.c:246	LOG_ERROR("efinix devices only have user register 1 to %d", num_user);
efinix.c:289	LOG_ERROR("Out of memory");
efm32.c:280	LOG_ERROR("Unknown MCU family %d", efm32_info->part_family);
efm32.c:324	LOG_ERROR("Invalid page size %u", efm32_info->page_size);
efm32.c:342	LOG_ERROR("Flash bank with base address %" PRIx32 " is not supported",
efm32.c:441	LOG_ERROR("timed out waiting for MSC status");
efm32.c:483	LOG_ERROR("Page is locked");
efm32.c:486	LOG_ERROR("Invalid address 0x%" PRIx32, addr);
efm32.c:506	LOG_ERROR("Target not halted");
efm32.c:513	LOG_ERROR("Failed to enable MSC write");
efm32.c:520	LOG_ERROR("Failed to erase page %d", i);
efm32.c:531	LOG_ERROR("Failed to restore lockbits after erase");
efm32.c:555	LOG_ERROR("Failed to read PLW %d", i);
efm32.c:566	LOG_ERROR("Failed to read ULW");
efm32.c:574	LOG_ERROR("Failed to read DLW");
efm32.c:582	LOG_ERROR("Failed to read MLW");
efm32.c:590	LOG_ERROR("Failed to read ALW");
efm32.c:598	LOG_ERROR("Failed to read CLW1");
efm32.c:606	LOG_ERROR("Failed to read CLW0");
efm32.c:632	LOG_ERROR("Failed to read extra contents of LB page");
efm32.c:640	LOG_ERROR("Failed to erase LB page");
efm32.c:650	LOG_ERROR("Failed to restore extra contents of LB page");
efm32.c:687	LOG_ERROR("Locking user and lockbits pages is not supported yet");
efm32.c:711	LOG_ERROR("Target not halted");
efm32.c:718	LOG_ERROR("Failed to set lock on page %d", i);
efm32.c:725	LOG_ERROR("Failed to write LB page");
efm32.c:862	LOG_ERROR("flash write failed at address 0x%"PRIx32,
efm32.c:867	LOG_ERROR("flash memory write protected");
efm32.c:872	LOG_ERROR("invalid flash memory write address");
efm32.c:926	LOG_ERROR("Page is locked");
efm32.c:929	LOG_ERROR("Invalid address 0x%" PRIx32, addr);
efm32.c:936	LOG_ERROR("Wait for WDATAREADY failed");
efm32.c:942	LOG_ERROR("WDATA write failed");
efm32.c:949	LOG_ERROR("WRITECMD write failed");
efm32.c:956	LOG_ERROR("Wait for BUSY failed");
efm32.c:970	LOG_ERROR("Target not halted");
efm32.c:975	LOG_ERROR("addr 0x%" PRIx32 " breaks required 4-byte "
efm32.c:985	LOG_ERROR("odd number of bytes to write and no memory "
efm32.c:1042	LOG_ERROR("Cannot write to lock words");
efm32.c:1081	LOG_ERROR("Failed to read LB data");
efm32.c:1119	LOG_ERROR("Target not halted");
efm32.c:1125	LOG_ERROR("Failed to read LB data");
efm32.c:1144	LOG_ERROR("Failed to read EFM32 info");
efm32.c:1170	LOG_ERROR("Target not halted");
efm32.c:1180	LOG_ERROR("Failed to write LB page");
em357.c:122	LOG_ERROR("timed out waiting for flash");
em357.c:129	LOG_ERROR("em357 device protected");
em357.c:134	LOG_ERROR("em357 device programming failed");
em357.c:311	LOG_ERROR("Target not halted");
em357.c:341	LOG_ERROR("Target not halted");
em357.c:396	LOG_ERROR("Target not halted");
em357.c:535	LOG_ERROR("error executing em357 flash write algorithm");
em357.c:540	LOG_ERROR("flash memory not erased before writing");
em357.c:548	LOG_ERROR("flash memory write protected");
em357.c:582	LOG_ERROR("Target not halted");
em357.c:759	LOG_ERROR("Target not halted");
em357.c:796	LOG_ERROR("Target not halted");
em357.c:822	LOG_ERROR("Target not halted");
embKernel.c:185	LOG_ERROR("No symbols for embKernel");
embKernel.c:190	LOG_ERROR("Don't have the thread list head");
embKernel.c:202	LOG_ERROR("Error reading current thread in embKernel thread list");
embKernel.c:217	LOG_ERROR("Could not read embKernel thread count from target");
embKernel.c:224	LOG_ERROR("Error allocating memory for %d threads", thread_list_size);
embKernel.c:314	LOG_ERROR("Error reading stack frame from embKernel thread");
embeddedice.c:141	LOG_ERROR("error queueing EmbeddedICE register read");
embeddedice.c:147	LOG_ERROR("EmbeddedICE register read failed");
embeddedice.c:239	LOG_ERROR("EmbeddedICE v%d handling might be broken",
embeddedice.c:267	LOG_ERROR("EmbeddedICE v%d handling might be broken",
embeddedice.c:282	LOG_ERROR("unknown EmbeddedICE version "
embeddedice.c:494	LOG_ERROR("register write failed");
embeddedice.c:593	LOG_ERROR("Invalid arguments");
embeddedice.c:633	LOG_ERROR("embeddedice handshake timeout");
eneispif.c:58	LOG_ERROR("not enough memory");
eneispif.c:81	LOG_ERROR("%s error at " TARGET_ADDR_FMT, __func__,
eneispif.c:99	LOG_ERROR("%s error writing 0x%" PRIx32 " to " TARGET_ADDR_FMT, __func__,
eneispif.c:121	LOG_ERROR("Busy more than 1000ms.");
eneispif.c:169	LOG_ERROR("Target not halted");
eneispif.c:174	LOG_ERROR("Flash sector invalid");
eneispif.c:179	LOG_ERROR("Flash bank not probed");
eneispif.c:185	LOG_ERROR("Flash sector %u protected", sector);
eneispif.c:223	LOG_ERROR("Target not halted");
eneispif.c:239	LOG_ERROR("Flash sector %u protected", sector);
eneispif.c:297	LOG_ERROR("Target not halted");
eneispif.c:372	LOG_ERROR("not enough memory");
esirisc.c:167	LOG_ERROR("%s: failed to read Thread CSR: ETC", target_name(target));
esirisc.c:175	LOG_ERROR("%s: failed to write Thread CSR: ETC", target_name(target));
esirisc.c:220	LOG_ERROR("%s: failed to read Thread CSR: ETC", target_name(target));
esirisc.c:237	LOG_ERROR("%s: failed to write Thread CSR: ETC", target_name(target));
esirisc.c:273	LOG_ERROR("%s: failed to write Debug CSR: HWDC", target_name(target));
esirisc.c:328	LOG_ERROR("%s: failed to flush caches", target_name(target));
esirisc.c:386	LOG_ERROR("%s: unsupported size: %" PRIu32, target_name(target), size);
esirisc.c:391	LOG_ERROR("%s: failed to read address: 0x%" TARGET_PRIxADDR, target_name(target),
esirisc.c:434	LOG_ERROR("%s: unsupported size: %" PRIu32, target_name(target), size);
esirisc.c:439	LOG_ERROR("%s: failed to write address: 0x%" TARGET_PRIxADDR, target_name(target),
esirisc.c:494	LOG_ERROR("%s: out of hardware breakpoints", target_name(target));
esirisc.c:505	LOG_ERROR("%s: failed to write Debug CSR: IBA", target_name(target));
esirisc.c:512	LOG_ERROR("%s: failed to read Debug CSR: IBC", target_name(target));
esirisc.c:520	LOG_ERROR("%s: failed to write Debug CSR: IBC", target_name(target));
esirisc.c:556	LOG_ERROR("%s: failed to read Debug CSR: IBC", target_name(target));
esirisc.c:564	LOG_ERROR("%s: failed to write Debug CSR: IBC", target_name(target));
esirisc.c:584	LOG_ERROR("%s: failed to write Debug CSR: IBC", target_name(target));
esirisc.c:620	LOG_ERROR("%s: out of hardware watchpoints", target_name(target));
esirisc.c:631	LOG_ERROR("%s: failed to write Debug CSR: DBA", target_name(target));
esirisc.c:638	LOG_ERROR("%s: failed to read Debug CSR: DBS", target_name(target));
esirisc.c:660	LOG_ERROR("%s: unsupported length: %" PRIu32, target_name(target),
esirisc.c:669	LOG_ERROR("%s: failed to write Debug CSR: DBS", target_name(target));
esirisc.c:676	LOG_ERROR("%s: failed to read Debug CSR: DBC", target_name(target));
esirisc.c:695	LOG_ERROR("%s: unsupported rw: %" PRId32, target_name(target),
esirisc.c:704	LOG_ERROR("%s: failed to write Debug CSR: DBC", target_name(target));
esirisc.c:740	LOG_ERROR("%s: failed to read Debug CSR: DBC", target_name(target));
esirisc.c:748	LOG_ERROR("%s: failed to write Debug CSR: DBC", target_name(target));
esirisc.c:768	LOG_ERROR("%s: failed to write Debug CSR: DBC", target_name(target));
esirisc.c:789	LOG_ERROR("%s: failed to halt target", target_name(target));
esirisc.c:809	LOG_ERROR("%s: failed to read Debug CSR: DC", target_name(target));
esirisc.c:817	LOG_ERROR("%s: failed to write Debug CSR: DC", target_name(target));
esirisc.c:835	LOG_ERROR("%s: failed to read Debug CSR: DC", target_name(target));
esirisc.c:843	LOG_ERROR("%s: failed to write Debug CSR: DC", target_name(target));
esirisc.c:904	LOG_ERROR("%s: failed to resume target", target_name(target));
esirisc.c:952	LOG_ERROR("%s: failed to resume target", target_name(target));
esirisc.c:958	LOG_ERROR("%s: step timed out", target_name(target));
esirisc.c:978	LOG_ERROR("%s: failed to assert reset", target_name(target));
esirisc.c:984	LOG_ERROR("%s: failed to deassert reset", target_name(target));
esirisc.c:990	LOG_ERROR("%s: reset timed out", target_name(target));
esirisc.c:1007	LOG_ERROR("%s: failed to enable debug mode", target_name(target));
esirisc.c:1024	LOG_ERROR("%s: target unresponsive; giving up", target_name(target));
esirisc.c:1090	LOG_ERROR("%s: failed to poll target", target_name(target));
esirisc.c:1095	LOG_ERROR("%s: target has stopped; reset required", target_name(target));
esirisc.c:1137	LOG_ERROR("%s: failed to assert reset", target_name(target));
esirisc.c:1161	LOG_ERROR("%s: failed to read Thread CSR: ETA", target_name(target));
esirisc.c:1168	LOG_ERROR("%s: failed to read address: 0x%" TARGET_PRIxADDR, target_name(target),
esirisc.c:1176	LOG_ERROR("%s: failed to write Thread CSR: EPC", target_name(target));
esirisc.c:1205	LOG_ERROR("%s: failed to deassert reset", target_name(target));
esirisc.c:1212	LOG_ERROR("%s: reset timed out", target_name(target));
esirisc.c:1228	LOG_ERROR("%s: failed to resume target", target_name(target));
esirisc.c:1309	LOG_ERROR("%s: failed to read register: %s", target_name(target), reg->name);
esirisc.c:1332	LOG_ERROR("%s: failed to write register: %s", target_name(target), reg->name);
esirisc.c:1354	LOG_ERROR("%s: failed to read CSR: %s", target_name(target), reg->name);
esirisc.c:1377	LOG_ERROR("%s: failed to write CSR: %s", target_name(target), reg->name);
esirisc.c:1526	LOG_ERROR("%s: failed to read Configuration CSR: ARCH0", target_name(target));
esirisc.c:1535	LOG_ERROR("%s: failed to read Configuration CSR: MEM", target_name(target));
esirisc.c:1544	LOG_ERROR("%s: failed to read Configuration CSR: IC", target_name(target));
esirisc.c:1552	LOG_ERROR("%s: failed to read Configuration CSR: DC", target_name(target));
esirisc.c:1560	LOG_ERROR("%s: failed to read Configuration CSR: DBG", target_name(target));
esirisc.c:1569	LOG_ERROR("%s: failed to read Configuration CSR: TRACE", target_name(target));
esirisc.c:1587	LOG_ERROR("%s: invalid IR length; expected %d", target_name(target),
esirisc.c:1652	LOG_ERROR("%s: failed to halt target", target_name(target));
esirisc.c:1661	LOG_ERROR("%s: failed to identify target", target_name(target));
esirisc.c:1678	LOG_ERROR("%s: failed to resume target", target_name(target));
esirisc.c:1710	LOG_ERROR("invalid cache_arch: %s", *CMD_ARGV);
esirisc.c:1727	LOG_ERROR("target does not support caching");
esirisc.c:1773	LOG_ERROR("invalid mask: %s", CMD_ARGV[CMD_ARGC]);
esirisc_flash.c:182	LOG_ERROR("%s: bad status: 0x%" PRIx32, bank->name, status);
esirisc_flash.c:230	LOG_ERROR("%s: control timed out: 0x%" PRIx32, bank->name, control);
esirisc_flash.c:261	LOG_ERROR("%s: failed to erase address: 0x%" PRIx32, bank->name, address);
esirisc_flash.c:286	LOG_ERROR("%s: failed to mass erase", bank->name);
esirisc_flash.c:310	LOG_ERROR("%s: failed to erase reference cell", bank->name);
esirisc_flash.c:380	LOG_ERROR("%s: failed to program address: 0x%" PRIx32, bank->name, offset);
esirisc_flash.c:439	LOG_ERROR("%s: failed to recall trim code", bank->name);
esirisc_flash.c:460	LOG_ERROR("%s: failed to initialize bank", bank->name);
esirisc_jtag.c:176	LOG_ERROR("esirisc_jtag: bad status: 0x%02" PRIx8 " (DA: %" PRId32 ", "
esirisc_jtag.c:196	LOG_ERROR("esirisc_jtag: send failed (command: 0x%02" PRIx8 ")", command);
esirisc_jtag.c:202	LOG_ERROR("esirisc_jtag: recv failed (command: 0x%02" PRIx8 ")", command);
esirisc_trace.c:88	LOG_ERROR("%s: failed to write Trace CSR: Status", target_name(target));
esirisc_trace.c:105	LOG_ERROR("%s: failed to read Trace CSR: Status", target_name(target));
esirisc_trace.c:124	LOG_ERROR("%s: failed to read Trace CSR: Control", target_name(target));
esirisc_trace.c:132	LOG_ERROR("%s: failed to write Trace CSR: Control", target_name(target));
esirisc_trace.c:151	LOG_ERROR("%s: failed to read Trace CSR: Control", target_name(target));
esirisc_trace.c:159	LOG_ERROR("%s: failed to write Trace CSR: Control", target_name(target));
esirisc_trace.c:198	LOG_ERROR("%s: failed to write Trace CSR: Control", target_name(target));
esirisc_trace.c:206	LOG_ERROR("%s: failed to write Trace CSR: BufferStart", target_name(target));
esirisc_trace.c:213	LOG_ERROR("%s: failed to write Trace CSR: BufferEnd", target_name(target));
esirisc_trace.c:224	LOG_ERROR("%s: failed to write Trace CSR: BufferCurrent", target_name(target));
esirisc_trace.c:244	LOG_ERROR("%s: failed to write Trace CSR: Trigger", target_name(target));
esirisc_trace.c:252	LOG_ERROR("%s: failed to write Trace CSR: StartData", target_name(target));
esirisc_trace.c:259	LOG_ERROR("%s: failed to write Trace CSR: StartMask", target_name(target));
esirisc_trace.c:267	LOG_ERROR("%s: failed to write Trace CSR: StopData", target_name(target));
esirisc_trace.c:274	LOG_ERROR("%s: failed to write Trace CSR: StopMask", target_name(target));
esirisc_trace.c:282	LOG_ERROR("%s: failed to write Trace CSR: Delay", target_name(target));
esirisc_trace.c:329	LOG_ERROR("%s: failed to read trace data", target_name(target));
esirisc_trace.c:349	LOG_ERROR("%s: failed to read Trace CSR: BufferCurrent", target_name(target));
esp.c:38	LOG_ERROR("%s: Failed to read first debug stub entry!", target_name(target));
esp32.c:112	LOG_ERROR(
esp32.c:124	LOG_ERROR(
esp32.c:134	LOG_ERROR("Couldn't halt target before SoC reset");
esp32.c:164	LOG_ERROR("Failed to save contents of RTC_SLOW_MEM (%d)!", res);
esp32.c:171	LOG_ERROR("Failed to write stub (%d)!", res);
esp32.c:181	LOG_ERROR("Failed to run stub (%d)!", res);
esp32.c:222	LOG_ERROR("Failed to write ESP32_TIMG0WDT_PROTECT (%d)!", res);
esp32.c:227	LOG_ERROR("Failed to write ESP32_TIMG0WDT_CFG0 (%d)!", res);
esp32.c:233	LOG_ERROR("Failed to write ESP32_TIMG1WDT_PROTECT (%d)!", res);
esp32.c:238	LOG_ERROR("Failed to write ESP32_TIMG1WDT_CFG0 (%d)!", res);
esp32.c:244	LOG_ERROR("Failed to write ESP32_RTCWDT_PROTECT (%d)!", res);
esp32.c:249	LOG_ERROR("Failed to write ESP32_RTCWDT_CFG (%d)!", res);
esp32.c:340	LOG_ERROR("Failed to alloc memory for arch info!");
esp32.c:347	LOG_ERROR("Failed to init arch info!");
esp32_apptrace.c:102	LOG_ERROR("Failed to write %d bytes to out file (%d)! Written %d.", size, errno, wr_sz);
esp32_apptrace.c:122	LOG_ERROR("Failed to alloc mem for file dest!");
esp32_apptrace.c:129	LOG_ERROR("Failed to open file %s", dest_name);
esp32_apptrace.c:168	LOG_ERROR("Failed to write %u bytes to out socket (%d)! Written %d.", size, errno, wr_sz);
esp32_apptrace.c:189	LOG_ERROR("apptrace: Invalid connection URI, format should be tcp://host:port");
esp32_apptrace.c:196	LOG_ERROR("apptrace: Hostname too long");
esp32_apptrace.c:215	LOG_ERROR("apptrace: Failed to resolve host name: %s", hostname);
esp32_apptrace.c:251	LOG_ERROR("apptrace: Could not connect to %s:%s", hostname, port_str);
esp32_apptrace.c:258	LOG_ERROR("apptrace: Failed to alloc mem for tcp dest!");
esp32_apptrace.c:288	LOG_ERROR("apptrace: Failed to init trace data destination '%s'!", dest_paths[i]);
esp32_apptrace.c:390	LOG_ERROR("Failed to wait for pended trace blocks!");
esp32_apptrace.c:675	LOG_ERROR("Failed to halt target (%d)!", res);
esp32_apptrace.c:680	LOG_ERROR("Failed to wait halt target %s / %d (%d)!",
esp32_apptrace.c:693	LOG_ERROR("Failed to read trace status (%d)!", res);
esp32_apptrace.c:706	LOG_ERROR("Failed to set breakpoint (%d)!", res);
esp32_apptrace.c:713	LOG_ERROR("Failed to resume target (%d)!", res);
esp32_apptrace.c:723	LOG_ERROR("Failed to wait halt on bp (%d)!", res);
esp32_apptrace.c:731	LOG_ERROR("Failed to read trace status (%d)!", res);
esp32_apptrace.c:745	LOG_ERROR("Failed to read trace status (%d)!", res);
esp32_apptrace.c:825	LOG_ERROR("Too large user block %" PRId32, size);
esp32_apptrace.c:843	LOG_ERROR("Incomplete block sz %" PRId32 ", wr %" PRId32, usr_len, wr_len);
esp32_apptrace.c:860	LOG_ERROR("Failed to read data len on (%s)!", target_name(ctx->cpus[i]));
esp32_apptrace.c:894	LOG_ERROR("Failed to write %" PRId32 " bytes to dest 0!", data_len);
esp32_apptrace.c:909	LOG_ERROR("Failed to stop trace read time measure!");
esp32_apptrace.c:932	LOG_ERROR("Failed to process %" PRId32 " bytes!", usr_len);
esp32_apptrace.c:954	LOG_ERROR("Failed to process trace block %" PRId32 " bytes!", block->data_len);
esp32_apptrace.c:960	LOG_ERROR("Failed to free ready block!");
esp32_apptrace.c:978	LOG_ERROR("Failed to read apptrace control reg for cpu(%d) res(%d)!", i, res);
esp32_apptrace.c:986	LOG_ERROR("Failed to read trace status (%d)!", res);
esp32_apptrace.c:1003	LOG_ERROR("Failed to write apptrace control reg for cpu(%d) res(%d)!", i, res);
esp32_apptrace.c:1009	LOG_ERROR("Failed to re-start idle time measure!");
esp32_apptrace.c:1046	LOG_ERROR("Failed to read data len!");
esp32_apptrace.c:1087	LOG_ERROR("Failed to measure idle time!");
esp32_apptrace.c:1092	LOG_ERROR("Data timeout!");
esp32_apptrace.c:1101	LOG_ERROR("Too large block size %" PRId32 "!", target_state[fired_target_num].data_len);
esp32_apptrace.c:1107	LOG_ERROR("Failed to start trace read time measurement!");
esp32_apptrace.c:1121	LOG_ERROR("Failed to start block read time measurement!");
esp32_apptrace.c:1141	LOG_ERROR("Failed to measure block read time!");
esp32_apptrace.c:1153	LOG_ERROR("Failed to start block proc time measurement!");
esp32_apptrace.c:1185	LOG_ERROR("Failed to process trace block %" PRId32 " bytes!", block->data_len);
esp32_apptrace.c:1191	LOG_ERROR("Failed to free ready block!");
esp32_apptrace.c:1199	LOG_ERROR("Failed to start idle time measure!");
esp32_apptrace.c:1206	LOG_ERROR("Failed to stop block proc time measure!");
esp32_apptrace.c:1227	LOG_ERROR("Failed to stop trace read time measurement!");
esp32_apptrace.c:1230	LOG_ERROR("Failed to unregister target timer handler (%d)!", res);
esp32_apptrace.c:1235	LOG_ERROR("sysview: Failed to stop tracing!");
esp32_apptrace.c:1240	LOG_ERROR("Failed to wait for pended blocks (%d)!", res);
esp32_apptrace.c:1243	LOG_ERROR("Failed to disconnect targets (%d)!", res);
esp32_apptrace.c:1247	LOG_ERROR("Failed to cleanup cmd ctx (%d)!", res);
esp32_apptrace.c:1261	LOG_ERROR("sysview: Failed to read target data info!");
esp32_apptrace.c:1273	LOG_ERROR("sysview: Failed to start tracing!");
esp32_apptrace.c:1290	LOG_ERROR("Failed to get free block for data on (%s)!", target_name(ctx->cpus[fired_target_num]));
esp32_apptrace.c:1298	LOG_ERROR("sysview: Failed to halt targets (%d)!", res);
esp32_apptrace.c:1315	LOG_ERROR("sysview: Failed to read data on (%s)!", target_name(ctx->cpus[fired_target_num]));
esp32_apptrace.c:1322	LOG_ERROR("Failed to process trace block %" PRId32 " bytes!", block->data_len);
esp32_apptrace.c:1331	LOG_ERROR("sysview: Failed to stop tracing!");
esp32_apptrace.c:1342	LOG_ERROR("sysview: Failed to ack data on target '%s' (%d)!",
esp32_apptrace.c:1357	LOG_ERROR("sysview: Failed to resume target '%s' (%d)!", target_name(ctx->cpus[k]), res);
esp32_apptrace.c:1366	LOG_ERROR("Failed to start trace stop timeout measurement!");
esp32_apptrace.c:1375	LOG_ERROR("sysview: Failed to read targets data info!");
esp32_apptrace.c:1393	LOG_ERROR("sysview: Failed to read last data on (%s)!", target_name(ctx->cpus[fired_target_num]));
esp32_apptrace.c:1404	LOG_ERROR("sysview: Failed to ack data on target '%s' (%d)!",
esp32_apptrace.c:1413	LOG_ERROR("Failed to process trace block %" PRId32 " bytes!",
esp32_apptrace.c:1422	LOG_ERROR("Failed to start trace stop timeout measurement!");
esp32_apptrace.c:1536	LOG_ERROR("Failed to measure trace read time!");
esp32_apptrace.c:1560	LOG_ERROR("Failed to poll target for trace data (%d)!", res);
esp32_apptrace.c:1570	LOG_ERROR("Failed to wait for pended blocks (%d)!", res);
esp32_sysview.c:163	LOG_ERROR("sysview: Failed to write %u bytes to dest %d!", hdr_len, i);
esp32_sysview.c:272	LOG_ERROR("sysview: Unsupported predef event %d!", id);
esp32_sysview.c:338	LOG_ERROR("sysview: Failed to write %u bytes to dest %d!", pkt_len, pkt_core_id);
esp32_sysview.c:345	LOG_ERROR("sysview: Failed to write %u bytes of delta to dest %d!", delta_len, pkt_core_id);
esp32_sysview.c:458	LOG_ERROR("sysview: Invalid core id %d in user block!", core_id);
esp32_sysview.c:466	LOG_ERROR("sysview: Invalid init seq len %d!", data_len);
esp32_sysview.c:472	LOG_ERROR("sysview: Invalid init seq [%x %x %x %x %x %x %x %x %x %x]",
esp32_sysview.c:481	LOG_ERROR("sysview: Failed to write %u sync bytes to dest %d!",
esp32_sysview.c:495	LOG_ERROR("sysview: Failed to write %u sync bytes to dest %d!", SYSVIEW_SYNC_LEN, core_id ? 0 : 1);
esp32_sysview.c:534	LOG_ERROR("sysview: Failed to write %u bytes to dest %d!", pkt_len, 0);
esp32_sysview.c:549	LOG_ERROR("Failed to stop trace read time measure!");
esp32s2.c:98	LOG_ERROR("Failed to restore smpbreak (%d)!", res);
esp32s2.c:141	LOG_ERROR("Failed to write ESP32_S2_SW_CPU_STALL (%d)!", res);
esp32s2.c:149	LOG_ERROR("Failed to write ESP32_S2_OPTIONS0 (%d)!", res);
esp32s2.c:229	LOG_ERROR("Failed to write ESP32_S2_STORE4 (%d)!", res);
esp32s2.c:234	LOG_ERROR("Failed to write ESP32_S2_STORE5 (%d)!", res);
esp32s2.c:239	LOG_ERROR("Failed to write ESP32_S2_RTC_CNTL_DIG_PWC_REG (%d)!", res);
esp32s2.c:244	LOG_ERROR("Failed to write ESP32_S2_CLK_CONF (%d)!", res);
esp32s2.c:254	LOG_ERROR("Failed to set smpbreak (%d)!", res);
esp32s2.c:265	LOG_ERROR("Failed to write ESP32_S2_OPTIONS0 (%d)!", res);
esp32s2.c:298	LOG_ERROR("Failed to write ESP32_S2_DPORT_PMS_OCCUPY_3 (%d)!", res);
esp32s2.c:309	LOG_ERROR("Failed to write ESP32_S2_TIMG0WDT_PROTECT (%d)!", res);
esp32s2.c:314	LOG_ERROR("Failed to write ESP32_S2_TIMG0WDT_CFG0 (%d)!", res);
esp32s2.c:320	LOG_ERROR("Failed to write ESP32_S2_TIMG1WDT_PROTECT (%d)!", res);
esp32s2.c:325	LOG_ERROR("Failed to write ESP32_S2_TIMG1WDT_CFG0 (%d)!", res);
esp32s2.c:331	LOG_ERROR("Failed to write ESP32_S2_RTCWDT_PROTECT (%d)!", res);
esp32s2.c:336	LOG_ERROR("Failed to write ESP32_S2_RTCWDT_CFG (%d)!", res);
esp32s2.c:342	LOG_ERROR("Failed to write ESP32_S2_SWD_WPROTECT_REG (%d)!", res);
esp32s2.c:348	LOG_ERROR("Failed to read ESP32_S2_SWD_CONF_REG (%d)!", res);
esp32s2.c:354	LOG_ERROR("Failed to write ESP32_S2_SWD_CONF_REG (%d)!", res);
esp32s2.c:402	LOG_ERROR("Failed to resume target");
esp32s2.c:460	LOG_ERROR("Failed to alloc memory for arch info!");
esp32s2.c:466	LOG_ERROR("Failed to init arch info!");
esp32s3.c:109	LOG_ERROR(
esp32s3.c:121	LOG_ERROR(
esp32s3.c:131	LOG_ERROR("Couldn't halt target before SoC reset");
esp32s3.c:161	LOG_ERROR("Failed to save contents of RTC_SLOW_MEM (%d)!", res);
esp32s3.c:171	LOG_ERROR("Failed to write stub (%d)!", res);
esp32s3.c:181	LOG_ERROR("Failed to run stub (%d)!", res);
esp32s3.c:223	LOG_ERROR("Failed to write ESP32_S3_TIMG0WDT_PROTECT (%d)!", res);
esp32s3.c:228	LOG_ERROR("Failed to write ESP32_S3_TIMG0WDT_CFG0 (%d)!", res);
esp32s3.c:234	LOG_ERROR("Failed to write ESP32_S3_TIMG1WDT_PROTECT (%d)!", res);
esp32s3.c:239	LOG_ERROR("Failed to write ESP32_S3_TIMG1WDT_CFG0 (%d)!", res);
esp32s3.c:245	LOG_ERROR("Failed to write ESP32_S3_RTCWDT_PROTECT (%d)!", res);
esp32s3.c:250	LOG_ERROR("Failed to write ESP32_S3_RTCWDT_CFG (%d)!", res);
esp32s3.c:256	LOG_ERROR("Failed to write ESP32_S3_SWD_WPROTECT_REG (%d)!", res);
esp32s3.c:262	LOG_ERROR("Failed to read ESP32_S3_SWD_CONF_REG (%d)!", res);
esp32s3.c:268	LOG_ERROR("Failed to write ESP32_S3_SWD_CONF_REG (%d)!", res);
esp32s3.c:334	LOG_ERROR("Failed to alloc memory for arch info!");
esp32s3.c:344	LOG_ERROR("Failed to init arch info!");
esp_algorithm.c:35	LOG_ERROR("Failed to allocate memory for the stub log!");
esp_algorithm.c:63	LOG_ERROR("Failed to alloc target mem handles!");
esp_algorithm.c:76	LOG_ERROR("Failed to alloc target buffer!");
esp_algorithm.c:90	LOG_ERROR("Failed to prepare algorithm host side args stub (%d)!", retval);
esp_algorithm.c:103	LOG_ERROR("Failed to start algorithm (%d)!", retval);
esp_algorithm.c:112	LOG_ERROR("Failed to exec algorithm user func (%d)!", retval);
esp_algorithm.c:124	LOG_ERROR("Failed to wait algorithm (%d)!", retval);
esp_algorithm.c:133	LOG_ERROR("Algorithm run failed (%d)!", retval);
esp_algorithm.c:173	LOG_ERROR("Failed to start algorithm (%d)!", retval);
esp_algorithm.c:187	LOG_ERROR("Failed to wait algorithm (%d)!", retval);
esp_algorithm.c:192	LOG_ERROR("Algorithm run failed (%d)!", retval);
esp_algorithm.c:246	LOG_ERROR("Failed to read stub section (%d)!", retval);
esp_algorithm.c:274	LOG_ERROR("Failed to write stub section!");
esp_algorithm.c:280	LOG_ERROR("Failed to write stub section!");
esp_algorithm.c:311	LOG_ERROR("Failed to start algo time measurement!");
esp_algorithm.c:335	LOG_ERROR("no working area available, can't alloc space for stub code!");
esp_algorithm.c:358	LOG_ERROR("no working area available, can't alloc space for stub code!");
esp_algorithm.c:368	LOG_ERROR("working area " TARGET_ADDR_FMT " and stub code section " TARGET_ADDR_FMT
esp_algorithm.c:391	LOG_ERROR("no working area available, can't alloc space for stub jumper!");
esp_algorithm.c:416	LOG_ERROR("Failed to write stub jumper!");
esp_algorithm.c:431	LOG_ERROR("no working area available, can't alloc space for stub code!");
esp_algorithm.c:455	LOG_ERROR("no working area available, can't alloc space for stub data!");
esp_algorithm.c:463	LOG_ERROR("working area " TARGET_ADDR_FMT
esp_algorithm.c:482	LOG_ERROR("no working area available, can't alloc stub stack!");
esp_algorithm.c:490	LOG_ERROR("Failed to stop algo run measurement!");
esp_algorithm.c:540	LOG_ERROR("Failed to start algo time measurement!");
esp_algorithm.c:551	LOG_ERROR("Stub tramp size %zu bytes exceeds target buf size %d bytes!",
esp_algorithm.c:557	LOG_ERROR("Algorithm stack size not fit into the allocated target stack!");
esp_algorithm.c:569	LOG_ERROR("Failed to write stub jumper!");
esp_algorithm.c:576	LOG_ERROR("Failed to stop algo run measurement!");
esp_semihosting.c:24	LOG_ERROR("Unknown target arch!");
esp_semihosting.c:94	LOG_ERROR("No target selected");
esp_semihosting.c:106	LOG_ERROR("Failed to Configure semihosting");
esp_xtensa.c:26	LOG_ERROR("No valid stub data entry found (0x%" PRIx32 ")!", __internal_val); \
esp_xtensa.c:35	LOG_ERROR("No valid stub code entry found (0x%" PRIx32 ")!", __internal_val); \
esp_xtensa.c:53	LOG_ERROR("Failed to write trace status (%d)!", res);
esp_xtensa.c:131	LOG_ERROR("Failed to read debug stubs address location (%d)!", res);
esp_xtensa.c:138	LOG_ERROR("Failed to clear debug stubs address location (%d)!", res);
esp_xtensa.c:162	LOG_ERROR("Failed to read debug stubs descriptor (%d)!", res);
esp_xtensa_algorithm.c:36	LOG_ERROR("Running stubs is not supported for cores without windowed registers option!");
esp_xtensa_algorithm.c:79	LOG_ERROR("Too many algo user args %u! Max %zu args are supported.", num_args, ARRAY_SIZE(arg_regs));
esp_xtensa_algorithm.c:85	LOG_ERROR("Unable to allocate memory");
esp_xtensa_algorithm.c:105	LOG_ERROR("Unable to allocate memory");
esp_xtensa_apptrace.c:73	LOG_ERROR("Failed to read TRAX status (%d)!", res);
esp_xtensa_apptrace.c:80	LOG_ERROR("Failed to read TRAX config (%d)!", res);
esp_xtensa_apptrace.c:185	LOG_ERROR("Failed to exec JTAG queue!");
esp_xtensa_apptrace.c:210	LOG_ERROR("Failed to exec JTAG queue!");
esp_xtensa_apptrace.c:251	LOG_ERROR("Failed to exec JTAG queue!");
esp_xtensa_apptrace.c:266	LOG_ERROR("Failed to exec JTAG queue!");
esp_xtensa_apptrace.c:280	LOG_ERROR("%s: writing DCR failed!", target->cmd_name);
esp_xtensa_apptrace.c:293	LOG_ERROR("Failed to activate SW debug (%d)!", res);
esp_xtensa_apptrace.c:303	LOG_ERROR("Failed to activate SW debug (%d)!", res);
esp_xtensa_apptrace.c:495	LOG_ERROR("Failed to exec JTAG queue!");
esp_xtensa_smp.c:223	LOG_ERROR("Failed to resume target");
esp_xtensa_smp.c:234	LOG_ERROR("Failed to resume target");
esp_xtensa_smp.c:518	LOG_ERROR("Failed to find HALTED core!");
esp_xtensa_smp.c:559	LOG_ERROR("Failed to find HALTED core!");
etb.c:95	LOG_ERROR("BUG: error scheduling ETB register read");
etb.c:101	LOG_ERROR("ETB register read failed");
etb.c:259	LOG_ERROR("BUG: error scheduling ETB register write");
etb.c:278	LOG_ERROR("ETB: register write failed");
etb.c:330	LOG_ERROR("ETB: target '%s' not defined", CMD_ARGV[0]);
etb.c:357	LOG_ERROR("ETM: target has no ETM defined, ETB left unconfigured");
etb.c:490	LOG_ERROR("ETB: DFEmpty won't go high, status 0x%02x",
etb.c:647	LOG_ERROR("ETB can't run in demultiplexed mode with a 4 or 16 bit port");
etb.c:654	LOG_ERROR("ETB: can't run in multiplexed mode");
etm.c:237	LOG_ERROR("ETM: register 0x%02x not available", id);
etm.c:256	LOG_ERROR("etm_reg_add is requested to add non-existing registers, ETM config might be bogus");
etm.c:291	LOG_ERROR("No memory");
etm.c:388	LOG_ERROR("etb selected as etm capture driver, but no ETB configured");
etm.c:461	LOG_ERROR("ETM capture driver initialization failed");
etm.c:473	LOG_ERROR("BUG: error scheduling etm register read");
etm.c:479	LOG_ERROR("register read failed");
etm.c:497	LOG_ERROR("BUG: can't read write-only register %s", r->name);
etm.c:550	LOG_ERROR("BUG: error scheduling etm register write");
etm.c:569	LOG_ERROR("register write failed");
etm.c:584	LOG_ERROR("BUG: can't write read--only register %s", r->name);
etm.c:664	LOG_ERROR("error while reading instruction");
etm.c:676	LOG_ERROR("error while reading instruction");
etm.c:682	LOG_ERROR("BUG: tracing of jazelle code not supported");
etm.c:685	LOG_ERROR("BUG: unknown core state encountered");
etm.c:834	LOG_ERROR("TODO: add support for 64-bit values");
etm.c:969	LOG_ERROR(
etm.c:1314	LOG_ERROR("target '%s' not defined", CMD_ARGV[0]);
etm.c:1423	LOG_ERROR("trace capture driver '%s' not found", CMD_ARGV[4]);
etm.c:1534	LOG_ERROR("Illegal max_port_size");
etm_dummy.c:23	LOG_ERROR("target '%s' not defined", CMD_ARGV[0]);
etm_dummy.c:36	LOG_ERROR("target has no ETM defined, ETM dummy left unconfigured");
fa526.c:27	LOG_ERROR("%s: there is no Thumb state on FA526", __func__);
fa526.c:238	LOG_ERROR("%s: there is no Thumb state on FA526", __func__);
faux.c:36	LOG_ERROR("no memory for flash bank info");
faux.c:42	LOG_ERROR("no memory for flash bank info");
faux.c:61	LOG_ERROR("target '%s' not defined", CMD_ARGV[5]);
feroceon.c:556	LOG_ERROR("DCC write failed,"
feroceon.c:672	LOG_ERROR("unexpected Feroceon EICE version signature");
fespi.c:144	LOG_ERROR("not enough memory");
fespi.c:167	LOG_ERROR("fespi_read_reg() error at " TARGET_ADDR_FMT,
fespi.c:181	LOG_ERROR("fespi_write_reg() error writing 0x%" PRIx32 " to " TARGET_ADDR_FMT,
fespi.c:226	LOG_ERROR("ip.txwm didn't get set.");
fespi.c:246	LOG_ERROR("txfifo stayed negative.");
fespi.c:266	LOG_ERROR("rxfifo didn't go positive (value=0x%" PRIx32 ").", value);
fespi.c:307	LOG_ERROR("timeout");
fespi.c:366	LOG_ERROR("Target not halted");
fespi.c:371	LOG_ERROR("Flash sector invalid");
fespi.c:376	LOG_ERROR("Flash bank not probed");
fespi.c:382	LOG_ERROR("Flash sector %u protected", sector);
fespi.c:394	LOG_ERROR("WM Didn't go high before attempting.");
fespi.c:493	LOG_ERROR("Target not halted");
fespi.c:510	LOG_ERROR("Flash sector %u protected", sector);
fespi.c:517	LOG_ERROR("Unexpected target type");
fespi.c:539	LOG_ERROR("Failed to write code to " TARGET_ADDR_FMT ": %d",
fespi.c:600	LOG_ERROR("Failed to execute algorithm at " TARGET_ADDR_FMT ": %d",
fespi.c:607	LOG_ERROR("Algorithm returned error %" PRId64, algorithm_result);
fespi.c:677	LOG_ERROR("Target not halted");
fespi.c:743	LOG_ERROR("Device ID 0x%" PRIx32 " is not known as FESPI capable",
fespi.c:783	LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
fespi.c:804	LOG_ERROR("not enough memory");
fileio.c:36	LOG_ERROR("BUG: fileio->file not a valid file descriptor");
fileio.c:38	LOG_ERROR("couldn't close %s: %s", fileio->url, strerror(errno));
fileio.c:68	LOG_ERROR("BUG: access neither read, write nor readwrite");
fileio.c:80	LOG_ERROR("couldn't open %s", fileio->url);
fileio.c:158	LOG_ERROR("couldn't seek file %s: %s", fileio->url, strerror(errno));
fm3.c:119	LOG_ERROR("unknown fm3 variant: %s", CMD_ARGV[5]);
fm3.c:182	LOG_ERROR("Polling data reading timed out!");
fm3.c:218	LOG_ERROR("Flash/Device type unknown!");
fm3.c:223	LOG_ERROR("Target not halted");
fm3.c:311	LOG_ERROR("Error executing flash erase programming algorithm");
fm3.c:366	LOG_ERROR("Flash/Device type unknown!");
fm3.c:592	LOG_ERROR("Error executing fm3 Flash programming algorithm");
fm3.c:598	LOG_ERROR("Fujitsu MB9[A/B]FXXX: Flash programming ERROR (Timeout) -> Reg R3: %" PRIx32,
fm3.c:628	LOG_ERROR("Target not halted");
fm3.c:827	LOG_ERROR("Flash/Device type unknown!");
fm3.c:832	LOG_ERROR("Target not halted");
fm3.c:909	LOG_ERROR("Error executing flash erase programming algorithm");
fm4.c:134	LOG_ERROR("No working area available.");
fm4.c:165	LOG_ERROR("Error executing flash sector erase "
fm4.c:173	LOG_ERROR("Timeout error from flash sector erase programming algorithm");
fm4.c:177	LOG_ERROR("Unexpected error %" PRIu32 " from flash sector erase programming algorithm", result);
fm4.c:220	LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment",
fm4.c:241	LOG_ERROR("No working area available for write code.");
fm4.c:253	LOG_ERROR("No working area available for write data.");
fm4.c:282	LOG_ERROR("Error writing data buffer");
fm4.c:302	LOG_ERROR("Error executing flash sector erase "
fm4.c:310	LOG_ERROR("Timeout error from flash write "
fm4.c:315	LOG_ERROR("Unexpected error %" PRIu32 " from flash write "
ftdi.c:159	LOG_ERROR("interface doesn't provide signal '%s'", s->name);
ftdi.c:169	LOG_ERROR("interface can't drive '%s' high", s->name);
ftdi.c:178	LOG_ERROR("interface can't tri-state '%s'", s->name);
ftdi.c:185	LOG_ERROR("invalid signal level specifier \'%c\'(0x%02x)", value, value);
ftdi.c:212	LOG_ERROR("interface doesn't provide signal '%s'", s->name);
ftdi.c:275	LOG_ERROR("couldn't set FTDI TCK speed");
ftdi.c:307	LOG_ERROR("BUG: %s is not a stable end state", tap_state_name(state));
ftdi.c:399	LOG_ERROR("BUG: %s -> %s isn't a valid "
ftdi.c:536	LOG_ERROR("Can't assert TRST: nTRST signal is not defined");
ftdi.c:550	LOG_ERROR("Can't assert SRST: nSRST signal is not defined");
ftdi.c:622	LOG_ERROR("BUG: unknown JTAG command type encountered: %d", cmd->type);
ftdi.c:644	LOG_ERROR("error while flushing MPSSE queue: %d", retval);
ftdi.c:657	LOG_ERROR("Please specify ftdi vid_pid");
ftdi.c:672	LOG_ERROR("SWD mode is active but SWD_EN signal is not defined");
ftdi.c:715	LOG_ERROR("expected exactly one argument to ftdi device_desc <description>");
ftdi.c:780	LOG_ERROR("signal %s is not defined", CMD_ARGV[i + 1]);
ftdi.c:790	LOG_ERROR("unknown option '%s'", CMD_ARGV[i]);
ftdi.c:800	LOG_ERROR("failed to create signal %s", CMD_ARGV[0]);
ftdi.c:822	LOG_ERROR("interface configuration doesn't define signal '%s'", CMD_ARGV[0]);
ftdi.c:838	LOG_ERROR("unknown signal level '%s', use 0, 1 or z", CMD_ARGV[1]);
ftdi.c:999	LOG_ERROR("failed to create signal %s", name);
ftdi.c:1080	LOG_ERROR("MPSSE failed");
ftdi.c:1109	LOG_ERROR("SWD Read data parity mismatch");
ftdi.c:1235	LOG_ERROR("Sequence %d not supported", seq);
gatemate.c:40	LOG_ERROR("Out of memory");
gatemate.c:71	LOG_ERROR("parsing failed");
gatemate.c:93	LOG_ERROR("Out of memory");
gatemate.c:119	LOG_ERROR("Couldn't open %s: %s", filename, strerror(errno));
gatemate.c:149	LOG_ERROR("Unable to detect filename suffix");
gatemate.c:158	LOG_ERROR("Filetype not supported, expecting .bit or .cfg file");
gatemate.c:168	LOG_ERROR("Out of memory");
gatemate.c:290	LOG_ERROR("Out of memory");
gdb_server.c:330	LOG_ERROR("BUG: couldn't put character back");
gdb_server.c:500	LOG_ERROR("GDB missing ack(1) - assumed good");
gdb_server.c:504	LOG_ERROR("unknown character(1) 0x%2.2x in reply, dropping connection", reply);
gdb_server.c:509	LOG_ERROR("GDB missing ack(2) - assumed good");
gdb_server.c:513	LOG_ERROR("unknown character(2) 0x%2.2x in reply, dropping connection",
gdb_server.c:600	LOG_ERROR("packet buffer too small");
gdb_server.c:1055	LOG_ERROR("Connect failed. Consider setting up a gdb-attach event for the target "
gdb_server.c:1200	LOG_ERROR("BUG: gdb value with uneven number of characters encountered");
gdb_server.c:1208	LOG_ERROR("BUG: unable to convert register value");
gdb_server.c:1344	LOG_ERROR("BUG: register packet is too small for registers");
gdb_server.c:1395	LOG_ERROR("gdb requested a non-existing register (reg_num=%d)", reg_num);
gdb_server.c:1432	LOG_ERROR("GDB 'set register packet', but no '=' following the register number");
gdb_server.c:1455	LOG_ERROR("gdb requested a non-existing register (reg_num=%d)", reg_num);
gdb_server.c:1462	LOG_ERROR("gdb sent %zu bits for a %" PRIu32 "-bit register (%s)",
gdb_server.c:1517	LOG_ERROR("incomplete read memory packet received, dropping connection");
gdb_server.c:1590	LOG_ERROR("incomplete write memory packet received, dropping connection");
gdb_server.c:1597	LOG_ERROR("incomplete write memory packet received, dropping connection");
gdb_server.c:1606	LOG_ERROR("unable to decode memory packet");
gdb_server.c:1644	LOG_ERROR("incomplete write memory binary packet received, dropping connection");
gdb_server.c:1651	LOG_ERROR("incomplete write memory binary packet received, dropping connection");
gdb_server.c:1775	LOG_ERROR("invalid gdb watch/breakpoint type(%d), dropping connection", type);
gdb_server.c:1783	LOG_ERROR("incomplete breakpoint/watchpoint packet received, dropping connection");
gdb_server.c:1790	LOG_ERROR("incomplete breakpoint/watchpoint packet received, dropping connection");
gdb_server.c:2358	LOG_ERROR("malloc(%zu) failed", combined_allocated * sizeof(struct reg *));
gdb_server.c:2388	LOG_ERROR("SMP register %s is %d bits on one "
gdb_server.c:2404	LOG_ERROR("realloc(%zu) failed", combined_allocated * sizeof(struct reg *));
gdb_server.c:2418	LOG_ERROR("Unable to get register list");
gdb_server.c:2476	LOG_ERROR("get register list failed");
gdb_server.c:2482	LOG_ERROR("get register list failed");
gdb_server.c:2490	LOG_ERROR("Can't get the registers feature list");
gdb_server.c:2603	LOG_ERROR("Unable to Generate Target Description");
gdb_server.c:2613	LOG_ERROR("Unable to Generate Target Description");
gdb_server.c:2629	LOG_ERROR("Unable to allocate memory");
gdb_server.c:2666	LOG_ERROR("get register list failed");
gdb_server.c:2671	LOG_ERROR("get register list failed");
gdb_server.c:2679	LOG_ERROR("Can't get the registers feature list");
gdb_server.c:2760	LOG_ERROR("Unable to Generate Thread List");
gdb_server.c:2780	LOG_ERROR("Unable to allocate memory");
gdb_server.c:2893	LOG_ERROR("incomplete read memory packet received, dropping connection");
gdb_server.c:3205	LOG_ERROR("Unknown vCont packet");
gdb_server.c:3345	LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
gdb_server.c:3352	LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
gdb_server.c:3359	LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
gdb_server.c:3392	LOG_ERROR("flash_erase returned %i", result);
gdb_server.c:3406	LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
gdb_server.c:3412	LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
gdb_server.c:3652	LOG_ERROR("Memory write failure!");
gdb_server.c:4087	LOG_ERROR("Unable to Generate Target Description");
gdb_server.c:4105	LOG_ERROR("Can't open %s for writing", tdesc_filename);
gdb_server.c:4114	LOG_ERROR("Error while writing the tdesc file");
gowin.c:72	LOG_ERROR("Out of memory");
gowin.c:131	LOG_ERROR("Couldn't open %s: %s", filename, strerror(errno));
gowin.c:182	LOG_ERROR("Unable to detect filename suffix");
gowin.c:195	LOG_ERROR("Filetype not supported, expecting .fs or .bin file");
gowin.c:205	LOG_ERROR("Out of memory");
gowin.c:373	LOG_ERROR("Id on device (0x%8.8" PRIx32 ") and id in bit-stream (0x%8.8" PRIx32 ") don't match.",
gowin.c:472	LOG_ERROR("gowin devices only have user register 1 & 2");
gowin.c:582	LOG_ERROR("Out of memory");
hla_interface.c:96	LOG_ERROR("expected %u of %u: 0x%08" PRIx32, ii + 1, limit,
hla_interface.c:199	LOG_ERROR("The selected interface does not support tracing");
hla_interface.c:221	LOG_ERROR("expected exactly one argument to hl_device_desc <description>");
hla_interface.c:232	LOG_ERROR("Need exactly one argument to stlink_layout");
hla_interface.c:237	LOG_ERROR("already specified hl_layout %s",
hla_interface.c:251	LOG_ERROR("No adapter layout '%s' found", CMD_ARGV[0]);
hla_interface.c:313	LOG_ERROR("The selected adapter doesn't support custom commands");
hla_layout.c:86	LOG_ERROR("no layout specified");
hla_target.c:196	LOG_ERROR("hla_target: invalid parameter -ap-num (> 0)");
hla_target.c:202	LOG_ERROR("No memory creating target");
hla_target.c:296	LOG_ERROR("jtag status contains invalid mode value - communication failure");
hla_target.c:368	LOG_ERROR("Hardware srst not supported, falling back to software reset");
hla_transport.c:169	LOG_ERROR("no current target");
hla_transport.c:176	LOG_ERROR("no transport selected");
hwthread.c:275	LOG_ERROR("Couldn't get register %s.", reg_list[i]->name);
hwthread.c:302	LOG_ERROR("Couldn't find RTOS thread for id %" PRId64 ".", thread_id);
hwthread.c:313	LOG_ERROR("Couldn't find register %" PRIu32 " in thread %" PRId64 ".", reg_num,
hwthread.c:387	LOG_ERROR("hwthread: cannot find thread id %"PRId64, current_threadid);
image.c:113	LOG_ERROR("Unknown image type: %s, use one of: bin, ihex, elf, mem, s19, build", type_string);
image.c:184	LOG_ERROR("Too many sections found in IHEX file");
image.c:239	LOG_ERROR("Too many sections found in IHEX file");
image.c:278	LOG_ERROR("Too many sections found in IHEX file");
image.c:303	LOG_ERROR("unhandled IHEX record type: %i", (int)record_type);
image.c:311	LOG_ERROR("incorrect record checksum found in IHEX file");
image.c:325	LOG_ERROR("premature end of IHEX file, no matching end-of-file record found");
image.c:338	LOG_ERROR("Out of memory");
image.c:344	LOG_ERROR("Out of memory");
image.c:368	LOG_ERROR("cannot seek to ELF file header, read failed");
image.c:375	LOG_ERROR("insufficient memory to perform operation");
image.c:381	LOG_ERROR("cannot read ELF file header, read failed");
image.c:385	LOG_ERROR("cannot read ELF file header, only partially read");
image.c:391	LOG_ERROR("invalid ELF file, no program headers");
image.c:397	LOG_ERROR("cannot seek to ELF program header table, read failed");
image.c:403	LOG_ERROR("insufficient memory to perform operation");
image.c:410	LOG_ERROR("cannot read ELF segment headers, read failed");
image.c:414	LOG_ERROR("cannot read ELF segment headers, only partially read");
image.c:427	LOG_ERROR("invalid ELF file, no loadable segments");
image.c:455	LOG_ERROR("insufficient memory to perform operation");
image.c:493	LOG_ERROR("cannot seek to ELF file header, read failed");
image.c:500	LOG_ERROR("insufficient memory to perform operation");
image.c:506	LOG_ERROR("cannot read ELF file header, read failed");
image.c:510	LOG_ERROR("cannot read ELF file header, only partially read");
image.c:516	LOG_ERROR("invalid ELF file, no program headers");
image.c:522	LOG_ERROR("cannot seek to ELF program header table, read failed");
image.c:528	LOG_ERROR("insufficient memory to perform operation");
image.c:535	LOG_ERROR("cannot read ELF segment headers, read failed");
image.c:539	LOG_ERROR("cannot read ELF segment headers, only partially read");
image.c:552	LOG_ERROR("invalid ELF file, no loadable segments");
image.c:580	LOG_ERROR("insufficient memory to perform operation");
image.c:616	LOG_ERROR("cannot read ELF file header, read failed");
image.c:620	LOG_ERROR("cannot read ELF file header, only partially read");
image.c:625	LOG_ERROR("invalid ELF file, bad magic number");
image.c:632	LOG_ERROR("invalid ELF file, unknown endianness setting");
image.c:648	LOG_ERROR("invalid ELF file, only 32/64 bit ELF files are supported");
image.c:678	LOG_ERROR("cannot find ELF segment content, seek failed");
image.c:683	LOG_ERROR("cannot read ELF segment content, read failed");
image.c:721	LOG_ERROR("cannot find ELF segment content, seek failed");
image.c:726	LOG_ERROR("cannot read ELF segment content, read failed");
image.c:901	LOG_ERROR("unhandled S19 record type: %i", (int)(record_type));
image.c:911	LOG_ERROR("incorrect record checksum found in S19 file");
image.c:925	LOG_ERROR("premature end of S19 file, no matching end-of-file record found");
image.c:938	LOG_ERROR("Out of memory");
image.c:944	LOG_ERROR("Out of memory");
image.c:997	LOG_ERROR(
image.c:1020	LOG_ERROR("target '%s' not defined", url);
image.c:1048	LOG_ERROR(
intel.c:43	LOG_ERROR("unknown boundary scan length. Please specify with 'intel set_bscan'.");
intel.c:48	LOG_ERROR("checkpos has to be smaller than scan length %d < %u",
intel.c:64	LOG_ERROR("Unable to detect filename suffix");
intel.c:71	LOG_ERROR("Unable to detect filetype");
intel.c:81	LOG_ERROR("Out of memory");
intel.c:155	LOG_ERROR("Out of memory");
intel.c:174	LOG_ERROR("Check failed");
intel.c:199	LOG_ERROR("unknown family");
intel.c:227	LOG_ERROR("intel devices only have user register 0 & 1");
intel.c:325	LOG_ERROR("Out of memory");
interface.c:89	LOG_ERROR("FATAL: unstable state \"%s\" in tap_move_ndx()",
interface.c:270	LOG_ERROR("fatal: invalid argument cur_state=%d", cur_state);
interface.c:307	LOG_ERROR("fatal: invalid argument cur_state=%d", cur_state);
ipdbg.c:144	LOG_ERROR("error during write: %zu != %zu", bytes_written, fifo->count);
ipdbg.c:190	LOG_ERROR("Out of memory");
ipdbg.c:289	LOG_ERROR("Out of memory");
ipdbg.c:297	LOG_ERROR("Out of memory");
ipdbg.c:318	LOG_ERROR("Out of memory");
ipdbg.c:350	LOG_ERROR("Out of memory");
ipdbg.c:699	LOG_ERROR("BUG: ipdbg_start_polling failed");
ipdbg.c:723	LOG_ERROR("error during read: %s", strerror(errno));
ipdbg.c:764	LOG_ERROR("BUG: ipdbg_remove_service failed");
ipdbg.c:774	LOG_ERROR("BUG: remove_service failed");
ipdbg.c:856	LOG_ERROR("No service for hub '%s'/tool %d found", hub->name, tool);
ipdbg.c:970	LOG_ERROR("cannot create Hub because a command with name '%s' already exists", hub->name);
ipdbg.c:1009	LOG_ERROR("Creating hub failed");
ipdbg.c:1108	LOG_ERROR("IPDBG hub with name '%s' already exists", hub_name);
ipdbg.c:1115	LOG_ERROR("Out of memory");
ipdbg.c:1124	LOG_ERROR("IPDBG hub for given TAP and user-instruction already exists");
jlink.c:272	LOG_ERROR("BUG: Unknown JTAG command type encountered");
jlink.c:306	LOG_ERROR("jaylink_get_speeds() failed: %s",
jlink.c:319	LOG_ERROR("Adaptive clocking is not supported by the device");
jlink.c:333	LOG_ERROR("jaylink_set_speed() failed: %s",
jlink.c:362	LOG_ERROR("jaylink_read_raw_config() failed: %s",
jlink.c:383	LOG_ERROR("Device supports JTAG transport only");
jlink.c:393	LOG_ERROR("jaylink_get_available_interfaces() failed: %s",
jlink.c:399	LOG_ERROR("Selected transport is not supported by the device");
jlink.c:406	LOG_ERROR("jaylink_select_interface() failed: %s",
jlink.c:427	LOG_ERROR("jaylink_register() failed: %s", jaylink_strerror(ret));
jlink.c:441	LOG_ERROR("Registration failed: maximum number of connections on the "
jlink.c:465	LOG_ERROR("jaylink_get_free_memory() failed: %s",
jlink.c:471	LOG_ERROR("Not enough free device internal memory: %" PRIu32 " bytes", tmp);
jlink.c:548	LOG_ERROR("jaylink_discovery_scan() failed: %s", jaylink_strerror(ret));
jlink.c:558	LOG_ERROR("jaylink_get_devices() failed: %s", jaylink_strerror(ret));
jlink.c:566	LOG_ERROR("Multiple devices found, specify the desired device");
jlink.c:633	LOG_ERROR("Failed to open device: %s", jaylink_strerror(ret));
jlink.c:653	LOG_ERROR("J-Link driver does not support USB devices");
jlink.c:660	LOG_ERROR("jaylink_init() failed: %s", jaylink_strerror(ret));
jlink.c:667	LOG_ERROR("jaylink_log_set_callback() failed: %s",
jlink.c:677	LOG_ERROR("Invalid serial number: %s", serial);
jlink.c:682	LOG_ERROR("jaylink_parse_serial_number() failed: %s", jaylink_strerror(ret));
jlink.c:702	LOG_ERROR("No J-Link device found");
jlink.c:715	LOG_ERROR("jaylink_get_firmware_version() failed: %s",
jlink.c:731	LOG_ERROR("jaylink_get_caps() failed: %s", jaylink_strerror(ret));
jlink.c:741	LOG_ERROR("jaylink_get_extended_caps() failed: %s",
jlink.c:755	LOG_ERROR("Failed to retrieve hardware version: %s",
jlink.c:784	LOG_ERROR("Failed to read device configuration data");
jlink.c:796	LOG_ERROR("jaylink_get_hardware_status() failed: %s",
jlink.c:858	LOG_ERROR("jaylink_swo_stop() failed: %s", jaylink_strerror(ret));
jlink.c:865	LOG_ERROR("jaylink_unregister() failed: %s",
jlink.c:883	LOG_ERROR("BUG: %i is not a valid end state", state);
jlink.c:912	LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
jlink.c:1222	LOG_ERROR("jaylink_swo_read() failed: %s", jaylink_strerror(ret));
jlink.c:1242	LOG_ERROR("jaylink_get_free_memory() failed: %s",
jlink.c:1316	LOG_ERROR("Trace capturing is not supported by the device");
jlink.c:1323	LOG_ERROR("jaylink_swo_stop() failed: %s", jaylink_strerror(ret));
jlink.c:1339	LOG_ERROR("Selected pin protocol is not supported");
jlink.c:1346	LOG_ERROR("Not enough free device memory to start trace capturing");
jlink.c:1353	LOG_ERROR("jaylink_swo_get_speeds() failed: %s",
jlink.c:1380	LOG_ERROR("SWO frequency is not suitable. Please choose a "
jlink.c:1389	LOG_ERROR("Maximum permitted frequency deviation of %.02f %% "
jlink.c:1391	LOG_ERROR("Auto-detection of SWO frequency failed");
jlink.c:1402	LOG_ERROR("jaylink_start_swo() failed: %s", jaylink_strerror(ret));
jlink.c:1659	LOG_ERROR("jaylink_write_raw_config() failed: %s",
jlink.c:1665	LOG_ERROR("Failed to read device configuration for verification");
jlink.c:1670	LOG_ERROR("Verification of device configuration failed. Please check "
jlink.c:1708	LOG_ERROR("Device does not support EMUCOM");
jlink.c:1717	LOG_ERROR("Data must be encoded as hexadecimal pairs");
jlink.c:1724	LOG_ERROR("Failed to allocate buffer");
jlink.c:1731	LOG_ERROR("Data must be encoded as hexadecimal pairs");
jlink.c:1742	LOG_ERROR("Channel not supported by the device");
jlink.c:1745	LOG_ERROR("Failed to write to channel: %s", jaylink_strerror(ret));
jlink.c:1767	LOG_ERROR("Device does not support EMUCOM");
jlink.c:1777	LOG_ERROR("Failed to allocate buffer");
jlink.c:1784	LOG_ERROR("Channel is not supported by the device");
jlink.c:1788	LOG_ERROR("Channel is not available for the requested amount of data. "
jlink.c:1793	LOG_ERROR("Failed to read from channel: %s", jaylink_strerror(ret));
jlink.c:1801	LOG_ERROR("Failed to convert data into hexadecimal string");
jlink.c:2054	LOG_ERROR("jaylink_jtag_io() failed: %s", jaylink_strerror(ret));
jlink.c:2150	LOG_ERROR("Sequence %d not supported", seq);
jlink.c:2180	LOG_ERROR("jaylink_swd_io() failed: %s", jaylink_strerror(ret));
jlink.c:2198	LOG_ERROR("SWD: Read data parity mismatch");
jsp_server.c:114	LOG_ERROR("error during read: %s", strerror(errno));
jsp_server.c:163	LOG_ERROR("unknown telnet state");
jtagspi.c:55	LOG_ERROR("pld device '#%s' is out of bounds or unknown", CMD_ARGV[7]);
jtagspi.c:64	LOG_ERROR("no memory for flash bank info");
jtagspi.c:71	LOG_ERROR("Target has no JTAG tap");
jtagspi.c:336	LOG_ERROR("Not enough memory");
jtagspi.c:462	LOG_ERROR("Unknown flash device (ID 0x%06" PRIx32 ")", id & 0xFFFFFF);
jtagspi.c:492	LOG_ERROR("not enough memory");
jtagspi.c:548	LOG_ERROR("timeout, device still busy");
jtagspi.c:562	LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx32, status);
jtagspi.c:633	LOG_ERROR("Flash sector invalid");
jtagspi.c:638	LOG_ERROR("Flash bank not probed");
jtagspi.c:644	LOG_ERROR("Flash sector %u protected", sector);
jtagspi.c:666	LOG_ERROR("Sector erase failed.");
jtagspi.c:690	LOG_ERROR("Flash bank not probed.");
jtagspi.c:712	LOG_ERROR("page read error");
jtagspi.c:750	LOG_ERROR("Flash bank not probed.");
jtagspi.c:765	LOG_ERROR("page write error");
kinetis.c:518	LOG_ERROR("Cannot perform halt with a high-level adapter");
kinetis.c:543	LOG_ERROR("MDM: halt timed out");
kinetis.c:561	LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
kinetis.c:578	LOG_ERROR("Cannot perform reset with a high-level adapter");
kinetis.c:584	LOG_ERROR("MDM: failed to write MDM_REG_CTRL");
kinetis.c:590	LOG_ERROR("MDM: failed to assert reset");
kinetis.c:596	LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
kinetis.c:618	LOG_ERROR("Cannot perform mass erase with a high-level adapter");
kinetis.c:639	LOG_ERROR("MDM: failed to assert reset");
kinetis.c:672	LOG_ERROR("MDM: waiting for mass erase conditions timed out.");
kinetis.c:687	LOG_ERROR("MDM: mass erase is disabled");
kinetis.c:707	LOG_ERROR("MDM: failed to start mass erase");
kinetis.c:719	LOG_ERROR("MDM: mass erase timeout");
kinetis.c:738	LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
kinetis.c:786	LOG_ERROR("MDM: failed to read ID register");
kinetis.c:813	LOG_ERROR("MDM: failed to read MDM_REG_STAT");
kinetis.c:830	LOG_ERROR("MDM: failed to get AP");
kinetis.c:913	LOG_ERROR("Unsupported flash bank option %s", argv[i]);
kinetis.c:935	LOG_ERROR("No memory");
kinetis.c:948	LOG_ERROR("Only %u Kinetis flash banks are supported", KINETIS_MAX_BANKS);
kinetis.c:988	LOG_ERROR("Only %u Kinetis flash banks are supported", KINETIS_MAX_BANKS);
kinetis.c:1068	LOG_ERROR("Target not halted");
kinetis.c:1093	LOG_ERROR("Error executing Kinetis WDOG unlock algorithm");
kinetis.c:1165	LOG_ERROR("Cannot disable Kinetis watchdog (WDOG_CS 0x%08" PRIx32 "), issue 'reset init'", wdog_cs);
kinetis.c:1211	LOG_ERROR("Cannot disable Kinetis watchdog (SIM_COPC 0x%02" PRIx8 "), issue 'reset init'", sim_copc);
kinetis.c:1245	LOG_ERROR("Flash operation failed, illegal command");
kinetis.c:1249	LOG_ERROR("Flash operation failed, protection violated");
kinetis.c:1252	LOG_ERROR("Flash operation failed, read collision");
kinetis.c:1258	LOG_ERROR("Flash operation timed out");
kinetis.c:1286	LOG_ERROR("Flash controller is busy");
kinetis.c:1340	LOG_ERROR("allocating working area failed");
kinetis.c:1369	LOG_ERROR("Error writing flash at %08" PRIx32, end_address);
kinetis.c:1379	LOG_ERROR("Error executing kinetis Flash programming algorithm");
kinetis.c:1397	LOG_ERROR("Protection setting is possible with 'kinetis fcf_source protection' only!");
kinetis.c:1402	LOG_ERROR("No protection possible for current bank!");
kinetis.c:1443	LOG_ERROR("Protection checks for FlexRAM not supported");
kinetis.c:1607	LOG_ERROR("Chip not probed.");
kinetis.c:1613	LOG_ERROR("Target not halted");
kinetis.c:1654	LOG_ERROR("Flash operation not possible in current run mode: SMC_PMSTAT: 0x%x", pmstat);
kinetis.c:1655	LOG_ERROR("Issue a 'reset init' command.");
kinetis.c:1839	LOG_ERROR("target_write_memory failed");
kinetis.c:1850	LOG_ERROR("Error writing section at " TARGET_ADDR_FMT,
kinetis.c:1856	LOG_ERROR("Flash write error at " TARGET_ADDR_FMT,
kinetis.c:1860	LOG_ERROR("Flash write immediately after the end of Flash Config Field shows error");
kinetis.c:1861	LOG_ERROR("because the flash memory is 256 bits wide (data were written correctly).");
kinetis.c:1862	LOG_ERROR("Either change the linker script to add a gap of 16 bytes after FCF");
kinetis.c:1863	LOG_ERROR("or set 'kinetis fcf_source write'");
kinetis.c:1910	LOG_ERROR("offset 0x%" PRIx32 " breaks the required alignment", offset);
kinetis.c:1919	LOG_ERROR("odd number of bytes to write and no memory "
kinetis.c:1952	LOG_ERROR("Error writing longword at " TARGET_ADDR_FMT,
kinetis.c:1958	LOG_ERROR("Flash write error at " TARGET_ADDR_FMT,
kinetis.c:1970	LOG_ERROR("Flash write strategy not implemented");
kinetis.c:2207	LOG_ERROR("Unsupported S32K1xx-series");
kinetis.c:2211	LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32, k_chip->sim_sdid);
kinetis.c:2369	LOG_ERROR("Unsupported K-family FAMID");
kinetis.c:2444	LOG_ERROR("Unsupported Kinetis K22 DIEID");
kinetis.c:2523	LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
kinetis.c:2593	LOG_ERROR("Unsupported KW FAMILYID SUBFAMID");
kinetis.c:2656	LOG_ERROR("Unsupported KV FAMILYID SUBFAMID");
kinetis.c:2701	LOG_ERROR("Unsupported KE FAMILYID SUBFAMID");
kinetis.c:2706	LOG_ERROR("Unsupported K-series");
kinetis.c:2711	LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32, k_chip->sim_sdid);
kinetis.c:2982	LOG_ERROR("Cannot determine parameters for bank %u, only %u banks on device",
kinetis.c:3016	LOG_ERROR("Unknown sector size for bank %u", bank->bank_number);
kinetis.c:3158	LOG_ERROR("NVM partition not supported on S32K1xx (yet).");
kinetis.c:3175	LOG_ERROR("Chip not probed.");
kinetis.c:3238	LOG_ERROR("Unsupported EEPROM size");
kinetis.c:3248	LOG_ERROR("Unsupported EEPROM sizes ratio");
kinetis_ke.c:331	LOG_ERROR("KE04 - Unknown pin count");
kinetis_ke.c:453	LOG_ERROR("Target not halted");
kinetis_ke.c:484	LOG_ERROR("Error executing Kinetis KE watchdog algorithm");
kinetis_ke.c:511	LOG_ERROR("Cannot perform mass erase with a high-level adapter");
kinetis_ke.c:537	LOG_ERROR("MDM : flash ready timeout");
kinetis_ke.c:601	LOG_ERROR("MDM: failed to read ID register");
kinetis_ke.c:623	LOG_ERROR("MDM: flash ready timeout");
kinetis_ke.c:636	LOG_ERROR("MDM: failed to read MDM_REG_STAT");
kinetis_ke.c:660	LOG_ERROR("MDM: Failed to check security status of the MCU. Cannot proceed further");
kinetis_ke.c:754	LOG_ERROR("flash access error");
kinetis_ke.c:757	LOG_ERROR("flash protection violation");
kinetis_ke.c:778	LOG_ERROR("Target not halted");
kinetis_ke.c:790	LOG_ERROR("Target not halted");
kinetis_ke.c:947	LOG_ERROR("Target not halted");
kinetis_ke.c:994	LOG_ERROR("Target not halted");
kinetis_ke.c:1019	LOG_ERROR("odd number of bytes to write and no memory "
kinetis_ke.c:1050	LOG_ERROR("Unsupported KE family");
kinetis_ke.c:1068	LOG_ERROR("Unsupported KE sub-family");
kinetis_ke.c:1158	LOG_ERROR("Target not halted");
kitprog.c:166	LOG_ERROR("Failed to allocate memory");
kitprog.c:171	LOG_ERROR("Can't find a KitProg device! Please check device connections and permissions.");
kitprog.c:207	LOG_ERROR("No PSoC devices found");
kitprog.c:216	LOG_ERROR("Failed to allocate memory for the packet buffer");
kitprog.c:223	LOG_ERROR("Failed to allocate memory for the SWD transfer queue");
kitprog.c:253	LOG_ERROR("libusb_get_string_descriptor_ascii() failed with %d", retval);
kitprog.c:263	LOG_ERROR("Failed to allocate memory for the serial number");
kitprog.c:279	LOG_ERROR("Failed to open or find the device");
kitprog.c:291	LOG_ERROR("Failed to allocate memory for the serial number");
kitprog.c:296	LOG_ERROR("Failed to convert serial number");
kitprog.c:304	LOG_ERROR("Failed to open KitBridge (HID) interface");
kitprog.c:310	LOG_ERROR("Failed to claim KitProg Programmer (bulk transfer) interface");
kitprog.c:343	LOG_ERROR("HID read timed out");
kitprog.c:346	LOG_ERROR("HID read error %ls", hid_error(kitprog_handle->hid_handle));
kitprog.c:396	LOG_ERROR("Failed to get KitProg version");
kitprog.c:405	LOG_ERROR("Failed to get target voltage");
kitprog.c:666	LOG_ERROR("Sequence %d not supported.", seq);
kitprog.c:736	LOG_ERROR("Bulk write failed");
kitprog.c:759	LOG_ERROR("Bulk read failed");
kitprog.c:825	LOG_ERROR("KitProg: Interface has no TRST");
kitprog.c:841	LOG_ERROR("KitProg: Interface reset failed");
lakemont.c:210	LOG_ERROR("target running, halt it first");
lakemont.c:221	LOG_ERROR("%s invalid target tap", __func__);
lakemont.c:227	LOG_ERROR("%s tap enabled but tap irlen=%u",
lakemont.c:230	LOG_ERROR("%s tap not enabled and irlen=%u",
lakemont.c:242	LOG_ERROR("%s failed to execute queue", __func__);
lakemont.c:254	LOG_ERROR("%s invalid target tap", __func__);
lakemont.c:259	LOG_ERROR("%s data len is %d bits, max is %d bits",
lakemont.c:271	LOG_ERROR("%s drscan failed to execute queue", __func__);
lakemont.c:282	LOG_ERROR("%s no drscan data", __func__);
lakemont.c:294	LOG_ERROR("%s error reading regs", __func__);
lakemont.c:309	LOG_ERROR("%s error writing regs", __func__);
lakemont.c:377	LOG_ERROR("%s out of memory", __func__);
lakemont.c:412	LOG_ERROR("%s unable to allocate feature list", __func__);
lakemont.c:418	LOG_ERROR("%s unable to allocate reg type list", __func__);
lakemont.c:458	LOG_ERROR("%s PM enter error, tapstatus = 0x%08" PRIx32
lakemont.c:607	LOG_ERROR("%s error saving reg %s",
lakemont.c:626	LOG_ERROR("%s error restoring reg %s",
lakemont.c:728	LOG_ERROR("%s error disabling paging", __func__);
lakemont.c:740	LOG_ERROR("%s error enabling paging", __func__);
lakemont.c:759	LOG_ERROR("%s transaction error tapstatus = 0x%08" PRIx32
lakemont.c:771	LOG_ERROR("%s error submitting pir", __func__);
lakemont.c:782	LOG_ERROR("%s error submitting pir", __func__);
lakemont.c:794	LOG_ERROR("%s error submitting pir", __func__);
lakemont.c:857	LOG_ERROR("tapstatus invalid - scan_chain serialization or locked JTAG access issues");
lakemont.c:986	LOG_ERROR("%s target not running", __func__);
lakemont.c:1008	LOG_ERROR("%s stepping over a software breakpoint at 0x%08" PRIx32 " "
lakemont.c:1090	LOG_ERROR("%s target didn't stop after executing a single step", __func__);
lakemont.c:1123	LOG_ERROR("%s could not select quark_x10xx.cltap", __func__);
lakemont.c:1137	LOG_ERROR("%s irscan failed to execute queue", __func__);
lakemont.c:1147	LOG_ERROR("%s drscan failed to execute queue", __func__);
lakemont.c:1177	LOG_ERROR("could not halt target");
lakemont.c:1191	LOG_ERROR("could not write to port 0xcf9");
lakemont.c:1224	LOG_ERROR("could not update state after probemode entry");
lattice.c:68	LOG_ERROR("Out of memory");
lattice.c:96	LOG_ERROR("Unknown id! Specify family and preload-length manually.");
lattice.c:157	LOG_ERROR("Out of memory");
lattice.c:197	LOG_ERROR("verifying user code register failed got: 0x%08" PRIx32 " expected: 0x%08" PRIx32,
lattice.c:250	LOG_ERROR("verifying status register failed got: 0x%08" PRIx32 " expected: 0x%08" PRIx32,
lattice.c:266	LOG_ERROR("verifying status register failed got: 0x%08" PRIx64 " expected: 0x%08" PRIx64,
lattice.c:315	LOG_ERROR("loading unknown device family");
lattice.c:339	LOG_ERROR("lattice devices only have user register 1 & 2");
lattice.c:451	LOG_ERROR("Out of memory");
lattice_bit.c:78	LOG_ERROR("parsing bitstream failed");
lattice_bit.c:96	LOG_ERROR("Unable to detect filename suffix");
lattice_bit.c:103	LOG_ERROR("Filetype not supported");
libusb_helper.c:104	LOG_ERROR("libusb_get_string_descriptor_ascii() failed with %d", retval);
libusb_helper.c:179	LOG_ERROR("libusb_open() failed with %s",
libusb_helper.c:237	LOG_ERROR("libusb_control_transfer error: %s", libusb_error_name(retval));
libusb_helper.c:259	LOG_ERROR("libusb_bulk_write error: %s", libusb_error_name(ret));
libusb_helper.c:276	LOG_ERROR("libusb_bulk_read error: %s", libusb_error_name(ret));
linux.c:105	LOG_ERROR("Cannot compute linux virt2phys translation");
linux.c:127	LOG_ERROR("linux awareness : address in user space");
linux.c:177	LOG_ERROR("could not find thread: %" PRIx64, thread_id);
linux.c:194	LOG_ERROR
linux.c:296	LOG_ERROR("fill_task: unable to read memory");
linux.c:304	LOG_ERROR("fill task: unable to read memory");
linux.c:312	LOG_ERROR("fill task: unable to read memory");
linux.c:327	LOG_ERROR
linux.c:332	LOG_ERROR("fill task: unable to read memory");
linux.c:352	LOG_ERROR("get_name: unable to read memory\n");
linux.c:440	LOG_ERROR
linux.c:500	LOG_ERROR("cpu_context: unable to read memory");
linux.c:513	LOG_ERROR
linux.c:524	LOG_ERROR("cpu_context: unable to read memory");
linux.c:534	LOG_ERROR("cpu_context: unable to read memory\n");
linux.c:579	LOG_ERROR("next task: unable to read memory");
linux.c:898	LOG_ERROR("unable to read pid");
log.c:203	LOG_ERROR("level must be between %d and %d", LOG_LVL_SILENT, LOG_LVL_DEBUG_IO);
log.c:495	LOG_ERROR("Error on socket '%s': WSAGetLastError==%d%s%s.", socket_desc, error_code,
log.h:159	LOG_ERROR("[%s] " fmt_str, target_name(target), ##__VA_ARGS__)
lpc2000.c:376	LOG_ERROR("BUG: unknown bank->size encountered");
lpc2000.c:417	LOG_ERROR("BUG: unknown bank->size encountered");
lpc2000.c:480	LOG_ERROR("BUG: unknown bank->size encountered");
lpc2000.c:510	LOG_ERROR("BUG: unknown bank->size encountered");
lpc2000.c:554	LOG_ERROR("BUG: unknown bank->size encountered");
lpc2000.c:575	LOG_ERROR("BUG: unknown bank->size encountered,\nLPC1100 flash size must be a multiple of 4096");
lpc2000.c:615	LOG_ERROR("BUG: unknown bank->size encountered");
lpc2000.c:643	LOG_ERROR("BUG: unknown bank->size encountered");
lpc2000.c:659	LOG_ERROR("BUG: unknown lpc2000_info->variant encountered");
lpc2000.c:681	LOG_ERROR("no working area specified, can't write LPC2000 internal flash");
lpc2000.c:705	LOG_ERROR("BUG: unknown lpc2000_info->variant encountered");
lpc2000.c:711	LOG_ERROR("Write memory at address " TARGET_ADDR_FMT " failed (check work_area definition)",
lpc2000.c:760	LOG_ERROR("BUG: unknown lpc2000->variant encountered");
lpc2000.c:829	LOG_ERROR("BUG: unknown lpc2000->variant encountered");
lpc2000.c:896	LOG_ERROR("BUG: unknown LPC2000 status code %i", status_code);
lpc2000.c:939	LOG_ERROR("unknown LPC2000 variant: %s", CMD_ARGV[6]);
lpc2000.c:975	LOG_ERROR("Target not halted");
lpc2000.c:1053	LOG_ERROR("Target not halted");
lpc2000.c:1116	LOG_ERROR("no working area specified, can't write LPC2000 internal flash");
lpc2000.c:1224	LOG_ERROR("Target not halted");
lpc2000.c:1259	LOG_ERROR("Target not halted");
lpc2000.c:1265	LOG_ERROR("Could not get part ID");
lpc2000.c:1502	LOG_ERROR("BUG: unknown Part ID encountered: 0x%" PRIx32, part_id);
lpc2000.c:1537	LOG_ERROR("Target not halted");
lpc2000.c:1565	LOG_ERROR("Target not halted");
lpc288x.c:218	LOG_ERROR("Target not halted");
lpc288x.c:360	LOG_ERROR("Target not halted");
lpc2900.c:235	LOG_ERROR("Target not halted");
lpc2900.c:377	LOG_ERROR("Refuse to burn index sector page %d", pagenum);
lpc2900.c:384	LOG_ERROR("Target not halted");
lpc2900.c:408	LOG_ERROR("Index sector write failed @ page %d", pagenum);
lpc2900.c:431	LOG_ERROR("Index sector write failed @ page %d", pagenum);
lpc2900.c:483	LOG_ERROR("Target not halted");
lpc2900.c:523	LOG_ERROR("Target not halted");
lpc2900.c:556	LOG_ERROR("Write operation to file %s failed", filename);
lpc2900.c:621	LOG_ERROR("Target not halted");
lpc2900.c:640	LOG_ERROR("Only one section allowed in image file.");
lpc2900.c:645	LOG_ERROR("Incorrect image file size. Expected %d, "
lpc2900.c:663	LOG_ERROR("couldn't read from file '%s'", filename);
lpc2900.c:679	LOG_ERROR("couldn't read from file '%s'", filename);
lpc2900.c:743	LOG_ERROR("failed to update index sector page 6");
lpc2900.c:758	LOG_ERROR("failed to update index sector page 7");
lpc2900.c:768	LOG_ERROR("Cannot determine sector security status");
lpc2900.c:813	LOG_ERROR("failed to update index sector page 5");
lpc2900.c:1157	LOG_ERROR("Unable to write block write code to target");
lpc2900.c:1243	LOG_ERROR("Unable to write data to target");
lpc2900.c:1267	LOG_ERROR("Execution of flash algorithm failed.");
lpc2900.c:1311	LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
lpc2900.c:1331	LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
lpc2900.c:1368	LOG_ERROR("Target not halted");
lpc2900.c:1493	LOG_ERROR("Never heard about sector %u", i);
lpc2900.c:1503	LOG_ERROR("Cannot determine sector security status");
lpc3180.c:136	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:142	LOG_ERROR("LPC3180 only supports 8 or 16 bit bus width, not %i", bus_width);
lpc3180.c:156	LOG_ERROR("LPC3180 only supports 3 or 4 address cycles, not %i", address_cycles);
lpc3180.c:161	LOG_ERROR("LPC3180 only supports 512 or 2048 byte pages, not %i", page_size);
lpc3180.c:266	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:271	LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
lpc3180.c:278	LOG_ERROR("LPC3180 NAND controller timed out after reset");
lpc3180.c:286	LOG_ERROR("LPC3180 NAND controller timed out after reset");
lpc3180.c:300	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:305	LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
lpc3180.c:324	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:329	LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
lpc3180.c:348	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:353	LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
lpc3180.c:372	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:377	LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
lpc3180.c:388	LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
lpc3180.c:404	LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
lpc3180.c:426	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:431	LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
lpc3180.c:438	LOG_ERROR("LPC3180 MLC controller can't write OOB data only");
lpc3180.c:443	LOG_ERROR("LPC3180 MLC controller can't write more "
lpc3180.c:449	LOG_ERROR("data size exceeds page size");
lpc3180.c:514	LOG_ERROR("timeout while waiting for completion of auto encode cycle");
lpc3180.c:526	LOG_ERROR("couldn't read status");
lpc3180.c:533	LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
lpc3180.c:586	LOG_ERROR("Reserve at least 0x%x physical target working area",
lpc3180.c:591	LOG_ERROR(
lpc3180.c:597	LOG_ERROR("no working area specified, can't read LPC internal flash");
lpc3180.c:781	LOG_ERROR("timeout while waiting for completion of DMA");
lpc3180.c:808	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:813	LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
lpc3180.c:829	LOG_ERROR("data size exceeds page size");
lpc3180.c:883	LOG_ERROR("timeout while waiting for completion of auto decode cycle");
lpc3180.c:893	LOG_ERROR("uncorrectable error detected: 0x%2.2x",
lpc3180.c:967	LOG_ERROR("Reserve at least 0x%x physical target working area",
lpc3180.c:972	LOG_ERROR(
lpc3180.c:978	LOG_ERROR("no working area specified, can't read LPC internal flash");
lpc3180.c:1089	LOG_ERROR("timeout while waiting for completion of DMA");
lpc3180.c:1156	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:1199	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc3180.c:1242	LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
lpc32xx.c:132	LOG_ERROR("could not read SYSCLK_CTRL");
lpc32xx.c:144	LOG_ERROR("could not read HCLK_CTRL");
lpc32xx.c:153	LOG_ERROR("could not read HCLKPLL_CTRL");
lpc32xx.c:160	LOG_ERROR("could not read CLKDIV_CTRL");
lpc32xx.c:187	LOG_ERROR("target must be halted to use LPC32xx "
lpc32xx.c:194	LOG_ERROR("LPC32xx doesn't support %i", bus_width);
lpc32xx.c:202	LOG_ERROR("LPC32xx driver doesn't support %i address cycles", address_cycles);
lpc32xx.c:207	LOG_ERROR("LPC32xx doesn't support page size %i", page_size);
lpc32xx.c:226	LOG_ERROR("could not set FLASHCLK_CTRL");
lpc32xx.c:233	LOG_ERROR("could not set MLC_CEH");
lpc32xx.c:240	LOG_ERROR("could not set MLC_LOCK");
lpc32xx.c:255	LOG_ERROR("could not set MLC_ICR");
lpc32xx.c:273	LOG_ERROR("could not set MLC_LOCK");
lpc32xx.c:287	LOG_ERROR("could not set MLC_TIME_REG");
lpc32xx.c:302	LOG_ERROR("could not set FLASHCLK_CTRL");
lpc32xx.c:324	LOG_ERROR("could not set SLC_CFG");
lpc32xx.c:331	LOG_ERROR("could not set SLC_IEN");
lpc32xx.c:340	LOG_ERROR("could not set DMACLK_CTRL");
lpc32xx.c:347	LOG_ERROR("could not set DMACConfig");
lpc32xx.c:371	LOG_ERROR("could not set SLC_TAC");
lpc32xx.c:386	LOG_ERROR("target must be halted to use "
lpc32xx.c:392	LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
lpc32xx.c:398	LOG_ERROR("could not set MLC_CMD");
lpc32xx.c:403	LOG_ERROR("LPC32xx MLC NAND controller timed out "
lpc32xx.c:411	LOG_ERROR("could not set SLC_CTRL");
lpc32xx.c:416	LOG_ERROR("LPC32xx SLC NAND controller timed out "
lpc32xx.c:432	LOG_ERROR("target must be halted to use "
lpc32xx.c:438	LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
lpc32xx.c:444	LOG_ERROR("could not set MLC_CMD");
lpc32xx.c:451	LOG_ERROR("could not set SLC_CMD");
lpc32xx.c:466	LOG_ERROR("target must be halted to use "
lpc32xx.c:472	LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
lpc32xx.c:478	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:485	LOG_ERROR("could not set SLC_ADDR");
lpc32xx.c:500	LOG_ERROR("target must be halted to use "
lpc32xx.c:506	LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
lpc32xx.c:512	LOG_ERROR("could not set MLC_DATA");
lpc32xx.c:519	LOG_ERROR("could not set SLC_DATA");
lpc32xx.c:534	LOG_ERROR("target must be halted to use LPC32xx "
lpc32xx.c:540	LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
lpc32xx.c:548	LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
lpc32xx.c:552	LOG_ERROR("could not read MLC_DATA");
lpc32xx.c:561	LOG_ERROR("could not read SLC_DATA");
lpc32xx.c:569	LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
lpc32xx.c:591	LOG_ERROR("could not set MLC_CMD");
lpc32xx.c:599	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:606	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:612	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:620	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:628	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:633	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:640	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:646	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:678	LOG_ERROR("could not set MLC_ECC_ENC_REG");
lpc32xx.c:685	LOG_ERROR("could not set MLC_BUF (data)");
lpc32xx.c:691	LOG_ERROR("could not set MLC_BUF (oob)");
lpc32xx.c:698	LOG_ERROR("could not set MLC_ECC_AUTO_ENC_REG");
lpc32xx.c:703	LOG_ERROR("timeout while waiting for "
lpc32xx.c:712	LOG_ERROR("could not set MLC_CMD");
lpc32xx.c:718	LOG_ERROR("couldn't read status");
lpc32xx.c:723	LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
lpc32xx.c:892	LOG_ERROR("Could not set DMACIntTCClear");
lpc32xx.c:899	LOG_ERROR("Could not set DMACIntErrClear");
lpc32xx.c:917	LOG_ERROR("Could not set DMACC0Config");
lpc32xx.c:924	LOG_ERROR("Could not set SLC_CTRL");
lpc32xx.c:931	LOG_ERROR("Could not set SLC_ICR");
lpc32xx.c:938	LOG_ERROR("lpc32xx_start_slc_dma: Could not set SLC_TC");
lpc32xx.c:944	LOG_ERROR("timeout while waiting for completion of DMA");
lpc32xx.c:965	LOG_ERROR("Could not read DMACRawIntTCStat");
lpc32xx.c:971	LOG_ERROR("Could not read DMACRawIntErrStat");
lpc32xx.c:978	LOG_ERROR("lpc32xx_dma_ready "
lpc32xx.c:1056	LOG_ERROR("Could not write DMA descriptors to IRAM");
lpc32xx.c:1062	LOG_ERROR("NAND_CMD_SEQIN failed");
lpc32xx.c:1076	LOG_ERROR("Could not set SLC_CFG");
lpc32xx.c:1088	LOG_ERROR("Could not write data to IRAM");
lpc32xx.c:1097	LOG_ERROR("Could not write DMA descriptor to DMAC");
lpc32xx.c:1106	LOG_ERROR("DMA failed");
lpc32xx.c:1112	LOG_ERROR("Data DMA failed during write");
lpc32xx.c:1130	LOG_ERROR("Reading hw generated ECC from IRAM failed");
lpc32xx.c:1145	LOG_ERROR("Writing OOB to IRAM failed");
lpc32xx.c:1154	LOG_ERROR("Could not write OOB DMA descriptor to DMAC");
lpc32xx.c:1164	LOG_ERROR("Could not set DMACIntTCClear");
lpc32xx.c:1181	LOG_ERROR("Could not set DMACC0Config");
lpc32xx.c:1186	LOG_ERROR("timeout while waiting for "
lpc32xx.c:1194	LOG_ERROR("DMA OOB failed");
lpc32xx.c:1202	LOG_ERROR("nand_write_finish failed");
lpc32xx.c:1218	LOG_ERROR("target must be halted to use LPC32xx "
lpc32xx.c:1224	LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
lpc32xx.c:1228	LOG_ERROR("LPC32xx MLC controller can't write "
lpc32xx.c:1234	LOG_ERROR("LPC32xx MLC controller can't write more "
lpc32xx.c:1240	LOG_ERROR("data size exceeds page size");
lpc32xx.c:1261	LOG_ERROR("Can't allocate working area in "
lpc32xx.c:1298	LOG_ERROR("could not set MLC_CMD");
lpc32xx.c:1306	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:1313	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:1319	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:1327	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:1336	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:1341	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:1348	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:1354	LOG_ERROR("could not set MLC_ADDR");
lpc32xx.c:1362	LOG_ERROR("could not set MLC_CMD");
lpc32xx.c:1371	LOG_ERROR("could not set MLC_ECC_AUTO_DEC_REG");
lpc32xx.c:1376	LOG_ERROR("timeout while waiting for "
lpc32xx.c:1383	LOG_ERROR("could not read MLC_ISR");
lpc32xx.c:1389	LOG_ERROR("uncorrectable error detected: "
lpc32xx.c:1402	LOG_ERROR("could not read MLC_BUF (data)");
lpc32xx.c:1411	LOG_ERROR("could not read MLC_BUF (oob)");
lpc32xx.c:1453	LOG_ERROR("Could not write DMA descriptors to IRAM");
lpc32xx.c:1459	LOG_ERROR("lpc32xx_read_page_slc: NAND_CMD_READ0 failed");
lpc32xx.c:1473	LOG_ERROR("lpc32xx_read_page_slc: Could not set SLC_CFG");
lpc32xx.c:1481	LOG_ERROR("Could not write DMA descriptor to DMAC");
lpc32xx.c:1490	LOG_ERROR("lpc32xx_read_page_slc: DMA read failed");
lpc32xx.c:1499	LOG_ERROR("Could not read data from IRAM");
lpc32xx.c:1509	LOG_ERROR("Could not read OOB from IRAM");
lpc32xx.c:1521	LOG_ERROR("Could not read OOB from IRAM");
lpc32xx.c:1530	LOG_ERROR("Could not read hw generated ECC from IRAM");
lpc32xx.c:1554	LOG_ERROR("uncorrectable error detected: %" PRIu32 "/%d", page, i);
lpc32xx.c:1569	LOG_ERROR("target must be halted to use LPC32xx "
lpc32xx.c:1575	LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
lpc32xx.c:1579	LOG_ERROR("data size exceeds page size");
lpc32xx.c:1591	LOG_ERROR("Can't allocate working area in "
lpc32xx.c:1610	LOG_ERROR("target must be halted to use LPC32xx "
lpc32xx.c:1624	LOG_ERROR("could not set MLC_STAT");
lpc32xx.c:1639	LOG_ERROR("could not set SLC_STAT");
lpc32xx.c:1663	LOG_ERROR("target must be halted to use LPC32xx "
lpc32xx.c:1678	LOG_ERROR("could not read MLC_ISR");
lpc32xx.c:1693	LOG_ERROR("could not read SLC_STAT");
lpc32xx.c:1722	LOG_ERROR("Could not read SLC_INT_STAT");
lpcspifi.c:59	LOG_ERROR("not enough memory");
lpcspifi.c:118	LOG_ERROR("Timeout while polling BSY");
lpcspifi.c:169	LOG_ERROR("Insufficient working area to initialize SPIFI "
lpcspifi.c:214	LOG_ERROR("Error executing SPIFI init algorithm");
lpcspifi.c:331	LOG_ERROR("timeout waiting for flash to finish write/erase operation");
lpcspifi.c:363	LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32, status);
lpcspifi.c:419	LOG_ERROR("Target not halted");
lpcspifi.c:424	LOG_ERROR("Flash sector invalid");
lpcspifi.c:429	LOG_ERROR("Flash bank not probed");
lpcspifi.c:435	LOG_ERROR("Flash sector %u protected", sector);
lpcspifi.c:517	LOG_ERROR("Insufficient working area. You must configure a working"
lpcspifi.c:548	LOG_ERROR("Error executing flash erase algorithm");
lpcspifi.c:586	LOG_ERROR("Target not halted");
lpcspifi.c:603	LOG_ERROR("Flash sector %u protected", sector);
lpcspifi.c:674	LOG_ERROR("Insufficient working area. You must configure"
lpcspifi.c:696	LOG_ERROR("Insufficient working area. Please allocate at least"
lpcspifi.c:740	LOG_ERROR("Error executing flash write algorithm");
lpcspifi.c:769	LOG_ERROR("Target not halted");
lpcspifi.c:865	LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
lpcspifi.c:887	LOG_ERROR("not enough memory");
max32xxx.c:143	LOG_ERROR("Read failure on FLSH_BL_CTRL");
max32xxx.c:152	LOG_ERROR("Write failure on FLSH_BL_CTRL");
max32xxx.c:156	LOG_ERROR("Read failure on FLSH_BL_CTRL");
max32xxx.c:161	LOG_ERROR("Unable to swap flash page 0 back in. Writes to page 0 will fail.");
max32xxx.c:234	LOG_ERROR("Target not halted");
max32xxx.c:282	LOG_ERROR("Timed out waiting for flash page erase @ 0x%08x",
max32xxx.c:290	LOG_ERROR("Error erasing flash page %i", banknr);
max32xxx.c:298	LOG_ERROR("All pages protected %u to %u", first, last);
max32xxx.c:317	LOG_ERROR("Target not halted");
max32xxx.c:415	LOG_ERROR("error %d executing max32xxx flash write algorithm", retval);
max32xxx.c:440	LOG_ERROR("Target not halted");
max32xxx.c:510	LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address);
max32xxx.c:544	LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address);
max32xxx.c:575	LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address);
max32xxx.c:613	LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address);
max32xxx.c:621	LOG_ERROR("Flash Error writing 0x%" PRIx32 " bytes at 0x%08" PRIx32, count, offset);
max32xxx.c:689	LOG_ERROR("Target not halted");
max32xxx.c:705	LOG_ERROR("All pages protected");
max32xxx.c:731	LOG_ERROR("Timed out waiting for flash mass erase");
max32xxx.c:738	LOG_ERROR("Error mass erasing");
mdr.c:126	LOG_ERROR("Target not halted");
mdr.c:135	LOG_ERROR("Target needs reset before flash operations");
mdr.c:280	LOG_ERROR("flash write failed at address 0x%"PRIx32,
mdr.c:303	LOG_ERROR("Target not halted");
mdr.c:308	LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-byte alignment", offset);
mdr.c:320	LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
mdr.c:338	LOG_ERROR("Target needs reset before flash operations");
mdr.c:472	LOG_ERROR("Target not halted");
mdr.c:477	LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-byte alignment", offset);
mdr.c:482	LOG_ERROR("count 0x%" PRIx32 " breaks required 4-byte alignment", count);
mdr.c:494	LOG_ERROR("Target needs reset before flash operations");
mem_ap.c:37	LOG_ERROR("AP number not specified");
mem_ap.c:43	LOG_ERROR("Out of memory");
mem_ap.c:142	LOG_ERROR("Cannot get AP");
mem_ap.c:216	LOG_ERROR("Out of memory");
mips32.c:432	LOG_ERROR("Could not read core registers from target");
mips32.c:515	LOG_ERROR("unable to allocate reg type list");
mips32.c:530	LOG_ERROR("unable to allocate feature list");
mips32.c:613	LOG_ERROR("current target isn't a MIPS32 target");
mips32.c:645	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
mips32.c:650	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
mips32.c:678	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
mips32.c:683	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
mips32.c:882	LOG_ERROR("processor id not available, failed to read cp0 PRId register");
mips32.c:1057	LOG_ERROR("Failed to read cp0 status register");
mips32.c:1066	LOG_ERROR("Failed to read cp1 FIR register");
mips32.c:1135	LOG_ERROR("isa info not available, failed to read cp0 config register: %" PRId32, i);
mips32.c:1179	LOG_ERROR("fpu info is not available, error while reading cp0 status");
mips32.c:1188	LOG_ERROR("failed to read EJTAG_DCR register");
mips32.c:1296	LOG_ERROR("Erase value 0x%02" PRIx8 " not yet supported for MIPS32",
mips32_dmaacc.c:51	LOG_ERROR("DMA time out");
mips32_dmaacc.c:91	LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)", addr);
mips32_dmaacc.c:94	LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ", addr);
mips32_dmaacc.c:133	LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)", addr);
mips32_dmaacc.c:136	LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ", addr);
mips32_dmaacc.c:180	LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)", addr);
mips32_dmaacc.c:183	LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ", addr);
mips32_dmaacc.c:238	LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)", addr);
mips32_dmaacc.c:241	LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE", addr);
mips32_dmaacc.c:284	LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)", addr);
mips32_dmaacc.c:287	LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE", addr);
mips32_dmaacc.c:331	LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)", addr);
mips32_dmaacc.c:334	LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE", addr);
mips32_pracc.c:348	LOG_ERROR("Out of memory");
mips32_pracc.c:369	LOG_ERROR("Out of memory");
mips32_pracc.c:403	LOG_ERROR("Error: access not pending count: %d", scan_count);
mips32_pracc.c:408	LOG_ERROR("Not a fetch/read access, count: %d", scan_count);
mips32_pracc.c:413	LOG_ERROR("Fetch addr mismatch, read: %" PRIx32 " expected: %" PRIx32 " count: %d",
mips32_pracc.c:428	LOG_ERROR("Not a store/write access, count: %d", scan_count);
mips32_pracc.c:433	LOG_ERROR("Store address mismatch, read: %" PRIx32 " expected: %" PRIx32 " count: %d",
mips32_pracc.c:481	LOG_ERROR("Out of memory");
mips32_pracc.c:864	LOG_ERROR("Unable to barrier");
mips32_pracc.c:1336	LOG_ERROR("fastdata load failed");
mips32_pracc.c:1345	LOG_ERROR("mini program did not return to start");
mips64.c:360	LOG_ERROR("BUG: called for a non-MIPS64 target");
mips64.c:386	LOG_ERROR("unable to allocate cache");
mips64.c:392	LOG_ERROR("unable to allocate reg_list");
mips64.c:398	LOG_ERROR("unable to allocate arch_info");
mips64.c:505	LOG_ERROR("unable to allocate inst_break_list");
mips64.c:540	LOG_ERROR("unable to allocate data_break_list");
mips64_pracc.c:79	LOG_ERROR("Error: iparam size exceeds MIPS64_PRACC_PARAM_IN_SIZE");
mips64_pracc.c:84	LOG_ERROR("Error: unexpected reading of input parameter");
mips64_pracc.c:96	LOG_ERROR("Error: unexpected reading of output parameter");
mips64_pracc.c:118	LOG_ERROR("Error reading from stack: stack is empty");
mips64_pracc.c:130	LOG_ERROR("Error reading unexpected address %" PRIx64, address);
mips64_pracc.c:184	LOG_ERROR("Error: unexpected writing of input parameter");
mips64_pracc.c:192	LOG_ERROR("Error: unexpected writing of output parameter");
mips64_pracc.c:199	LOG_ERROR("Error: PrAcc stack depth exceeded");
mips64_pracc.c:204	LOG_ERROR("Error writing unexpected address 0x%" PRIx64, address);
mips64_pracc.c:259	LOG_ERROR("PSZ=%d ADDRESS[2:0]=%d: not supported", psz, address20);
mips64_pracc.c:266	LOG_ERROR("PSZ=%d ADDRESS[2:0]=%d: not supported", psz, address20);
mips64_pracc.c:271	LOG_ERROR("PSZ=%d ADDRESS[2:0]=%d: not supported", psz, address20);
mips64_pracc.c:276	LOG_ERROR("Error reading address " TARGET_ADDR_FMT " (0x%08llx expected)",
mips64_pracc.c:287	LOG_ERROR("mips64_pracc_exec_write() failed");
mips64_pracc.c:300	LOG_ERROR("mips64_pracc_exec_read() failed");
mips64_pracc.c:309	LOG_ERROR("Pracc Stack not zero");
mips64_pracc.c:1368	LOG_ERROR("! @MIPS64_PRACC_FASTDATA_AREA (" TARGET_ADDR_FMT ")", address);
mips64_pracc.c:1396	LOG_ERROR("mips64_ejtag_fastdata_scan failed");
mips64_pracc.c:1403	LOG_ERROR("jtag_execute_queue failed");
mips64_pracc.c:1409	LOG_ERROR("wait_for_pracc_rw failed");
mips64_pracc.c:1416	LOG_ERROR("mips_ejtag_drscan_32 failed");
mips64_pracc.c:1422	LOG_ERROR("mini program did not return to start");
mips_ejtag.c:100	LOG_ERROR("register read failed");
mips_ejtag.c:137	LOG_ERROR("register read failed");
mips_ejtag.c:165	LOG_ERROR("register read failed");
mips_ejtag.c:227	LOG_ERROR("Failed to remove DCR MPbit!");
mips_ejtag.c:254	LOG_ERROR("Failed to enter Debug Mode!");
mips_ejtag.c:364	LOG_ERROR("impcode read failed");
mips_m4k.c:272	LOG_ERROR("can't request a halt while in reset if nSRST pulls nTRST");
mips_m4k.c:614	LOG_ERROR("Can not find free FP Comparator(bpid: %" PRIu32 ")",
mips_m4k.c:693	LOG_ERROR("Unable to set 32bit breakpoint at address %08" TARGET_PRIxADDR
mips_m4k.c:714	LOG_ERROR("Unable to set 16bit breakpoint at address %08" TARGET_PRIxADDR
mips_m4k.c:879	LOG_ERROR("Can not find free FP Comparator");
mips_m4k.c:884	LOG_ERROR("Only watchpoints of length 4 are supported");
mips_m4k.c:889	LOG_ERROR("Watchpoints address should be word aligned");
mips_m4k.c:904	LOG_ERROR("BUG: watchpoint->rw neither read, write nor access");
mips_m4k.c:1040	LOG_ERROR("Out of memory");
mips_m4k.c:1107	LOG_ERROR("Out of memory");
mips_m4k.c:1176	LOG_ERROR("idcode read failed");
mips_m4k.c:1221	LOG_ERROR("No working area available");
mips_m4k.c:1233	LOG_ERROR("fast_data (" TARGET_ADDR_FMT ") is within write area "
mips_m4k.c:1236	LOG_ERROR("Change work-area-phys or load_image address!");
mips_m4k.c:1245	LOG_ERROR("Out of memory");
mips_m4k.c:1257	LOG_ERROR("Fastdata access Failed");
mips_m4k.c:1287	LOG_ERROR("No working area available");
mips_m4k.c:1299	LOG_ERROR("fast_data (" TARGET_ADDR_FMT ") is within read area "
mips_m4k.c:1302	LOG_ERROR("Change work-area-phys or load_image address!");
mips_m4k.c:1310	LOG_ERROR("Out of memory");
mips_m4k.c:1322	LOG_ERROR("Fastdata access Failed");
mips_mips64.c:134	LOG_ERROR("can't request a halt while in reset if nSRST pulls nTRST");
mips_mips64.c:165	LOG_ERROR("Can't assert SRST");
mips_mips64.c:299	LOG_ERROR("Unable to set 32bit breakpoint at address %16" PRIx64,
mips_mips64.c:330	LOG_ERROR("Unable to set 16bit breakpoint at address %16" PRIx64,
mips_mips64.c:366	LOG_ERROR("can't unset breakpoint. Some thing wrong happened");
mips_mips64.c:419	LOG_ERROR("ERROR Can not find free comparator");
mips_mips64.c:424	LOG_ERROR("Only watchpoints of length 4 are supported");
mips_mips64.c:429	LOG_ERROR("Watchpoints address should be word aligned");
mips_mips64.c:444	LOG_ERROR("BUG: watchpoint->rw neither read, write nor access");
mips_mips64.c:586	LOG_ERROR("can't unset breakpoint. Some thing wrong happened");
mips_mips64.c:908	LOG_ERROR("Out of memory");
mips_mips64.c:920	LOG_ERROR("mips64_pracc_read_mem filed");
mips_mips64.c:967	LOG_ERROR("No working area available");
mips_mips64.c:979	LOG_ERROR("fast_data (" TARGET_ADDR_FMT ") is within write area "
mips_mips64.c:982	LOG_ERROR("Change work-area-phys or load_image address!");
mips_mips64.c:992	LOG_ERROR("Out of memory");
mips_mips64.c:1002	LOG_ERROR("Fastdata access Failed");
mips_mips64.c:1048	LOG_ERROR("unable to allocate t for write buffer");
mips_mips64.c:1092	LOG_ERROR("unable to allocate mips_mips64");
mpsse.c:87	LOG_ERROR("libusb_get_string_descriptor_ascii() failed with %s", libusb_error_name(retval));
mpsse.c:162	LOG_ERROR("libusb_get_device_list() failed with %s", libusb_error_name(cnt));
mpsse.c:169	LOG_ERROR("libusb_get_device_descriptor() failed with %s", libusb_error_name(err));
mpsse.c:178	LOG_ERROR("libusb_open() failed with %s",
mpsse.c:211	LOG_ERROR("libusb_get_config_descriptor() failed with %s", libusb_error_name(err));
mpsse.c:220	LOG_ERROR("libusb_get_configuration() failed with %s", libusb_error_name(err));
mpsse.c:227	LOG_ERROR("libusb_set_configuration() failed with %s", libusb_error_name(err));
mpsse.c:242	LOG_ERROR("libusb_claim_interface() failed with %s", libusb_error_name(err));
mpsse.c:251	LOG_ERROR("failed to reset FTDI device: %s", libusb_error_name(err));
mpsse.c:290	LOG_ERROR("unsupported FTDI chip type: 0x%04x", desc.bcdDevice);
mpsse.c:323	LOG_ERROR("unrecognized USB device descriptor");
mpsse.c:362	LOG_ERROR("libusb_init() failed with %s", libusb_error_name(err));
mpsse.c:367	LOG_ERROR("unable to open ftdi device with description '%s', "
mpsse.c:380	LOG_ERROR("unable to set latency timer: %s", libusb_error_name(err));
mpsse.c:393	LOG_ERROR("unable to set MPSSE bitmode: %s", libusb_error_name(err));
mpsse.c:435	LOG_ERROR("unable to purge ftdi rx buffers: %s", libusb_error_name(err));
mpsse.c:442	LOG_ERROR("unable to purge ftdi tx buffers: %s", libusb_error_name(err));
mpsse.c:924	LOG_ERROR("libusb_handle_events() failed with %s", libusb_error_name(retval));
mpsse.c:927	LOG_ERROR("ftdi device did not accept all data: %d, tried %d",
mpsse.c:932	LOG_ERROR("ftdi device did not return all data: %d, expected %d",
mqx.c:111	LOG_ERROR("MQX RTOS - unknown architecture %s", targetname);
mqx.c:133	LOG_ERROR("MQX RTOS - reading target address 0x%" PRIx32" failed", address);
mqx.c:257	LOG_ERROR("MQX RTOS - could not find target \"%s\" in MQX compatibility list", target_type_name(target));
mqx.c:426	LOG_ERROR("MQX RTOS - invalid threadid: 0x%X", (int)thread_id);
mqx.c:475	LOG_ERROR("MQX_RTOS - threadid %" PRId64 " does not match any task", thread_id);
mrvlqspi.c:154	LOG_ERROR("timed out waiting for flash");
mrvlqspi.c:210	LOG_ERROR("timed out waiting for flash");
mrvlqspi.c:238	LOG_ERROR("timed out waiting for flash");
mrvlqspi.c:279	LOG_ERROR("timed out waiting for flash");
mrvlqspi.c:357	LOG_ERROR("timed out waiting for flash");
mrvlqspi.c:529	LOG_ERROR("Target not halted");
mrvlqspi.c:534	LOG_ERROR("Flash sector invalid");
mrvlqspi.c:539	LOG_ERROR("Flash bank not probed");
mrvlqspi.c:545	LOG_ERROR("Flash sector %u protected", sector);
mrvlqspi.c:594	LOG_ERROR("Target not halted");
mrvlqspi.c:611	LOG_ERROR("Flash sector %u protected", sector);
mrvlqspi.c:672	LOG_ERROR("Insufficient working area. You must configure"
mrvlqspi.c:694	LOG_ERROR("Insufficient working area. Please allocate at least"
mrvlqspi.c:738	LOG_ERROR("Error executing flash write algorithm");
mrvlqspi.c:762	LOG_ERROR("Target not halted");
mrvlqspi.c:767	LOG_ERROR("Flash bank not probed");
mrvlqspi.c:832	LOG_ERROR("Target not halted");
mrvlqspi.c:852	LOG_ERROR("Unknown flash device ID 0x%08" PRIx32, id);
mrvlqspi.c:875	LOG_ERROR("not enough memory");
mrvlqspi.c:931	LOG_ERROR("not enough memory");
msp432.c:229	LOG_ERROR("msp432: Flash operation failed: %s",
msp432.c:271	LOG_ERROR(
msp432.c:382	LOG_ERROR("msp432: Failed to start flash helper algorithm");
msp432.c:441	LOG_ERROR("Target not halted");
msp432.c:611	LOG_ERROR("Target not halted");
msp432.c:689	LOG_ERROR("Target not halted");
msp432.c:767	LOG_ERROR("Unable to write data to target memory");
msp432p4.c:250	LOG_ERROR("Cannot init flash controller: %s.", error_name);
msp432p4.c:281	LOG_ERROR("Cannot mass erase: %s.", error_name);
msp432p4.c:312	LOG_ERROR("Cannot erase sector at address: %s.", error_name);
msp432p4.c:407	LOG_ERROR("Target not halted");
msp432p4.c:446	LOG_ERROR("Target not halted");
msp432p4.c:473	LOG_ERROR("Unable to write block write code to target");
msp432p4.c:499	LOG_ERROR("Cannot flash!");
msp432p4.c:508	LOG_ERROR("Cannot write flash program: %s.", error_name);
mx3.c:57	LOG_ERROR("no memory for nand controller");
mx3.c:123	LOG_ERROR("NAND controller have only 1 kb SRAM, "
mx3.c:132	LOG_ERROR("clock gating to EMI disabled");
mx3.c:141	LOG_ERROR("pins mode overridden by GPR");
mx3.c:178	LOG_ERROR(get_status_register_err_msg);
mx3.c:227	LOG_ERROR("write_data() not implemented");
mx3.c:371	LOG_ERROR(data_block_size_err_msg, data_size);
mx3.c:375	LOG_ERROR(data_block_size_err_msg, oob_size);
mx3.c:379	LOG_ERROR("nothing to program");
mx3.c:437	LOG_ERROR(get_status_register_err_msg);
mx3.c:459	LOG_ERROR(data_block_size_err_msg, data_size);
mx3.c:463	LOG_ERROR(data_block_size_err_msg, oob_size);
mx3.c:511	LOG_ERROR("IOMUX for {%s} is bad", text);
mx3.c:542	LOG_ERROR("NAND flash is tight-locked, reset needed");
mx3.c:574	LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
mx3.c:599	LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
mx3.c:619	LOG_ERROR("%s sending timeout", text);
mx3.c:631	LOG_ERROR(target_not_halted_err_msg);
mxc.c:82	LOG_ERROR("no memory for nand controller");
mxc.c:88	LOG_ERROR("use \"nand device mxc target mx25\|mx27\|mx31\|mx35 noecc\|hwecc [biswap]\"");
mxc.c:252	LOG_ERROR("NAND controller have only 1 kb SRAM, so "
mxc.c:258	LOG_ERROR("MXC driver does not have support for 4k pagesize.");
mxc.c:267	LOG_ERROR(get_status_register_err_msg);
mxc.c:295	LOG_ERROR("mxc_read_data : read data failed : '%x'",
mxc.c:310	LOG_ERROR("write_data() not implemented");
mxc.c:461	LOG_ERROR(data_block_size_err_msg, data_size);
mxc.c:465	LOG_ERROR(data_block_size_err_msg, oob_size);
mxc.c:469	LOG_ERROR("nothing to program");
mxc.c:518	LOG_ERROR("Due to NFC Bug, oob is not correctly implemented in mxc driver");
mxc.c:561	LOG_ERROR(get_status_register_err_msg);
mxc.c:588	LOG_ERROR(data_block_size_err_msg, data_size);
mxc.c:592	LOG_ERROR(data_block_size_err_msg, oob_size);
mxc.c:635	LOG_ERROR("MXC_NF : Error reading page %d", i);
mxc.c:734	LOG_ERROR("NAND flash is tight-locked, reset needed");
mxc.c:781	LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
mxc.c:810	LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
mxc.c:826	LOG_ERROR("%s sending timeout", text);
mxc.c:838	LOG_ERROR(target_not_halted_err_msg);
niietcm4.c:158	LOG_ERROR("Bootflash operation timeout");
niietcm4.c:164	LOG_ERROR("Bootflash operation error");
niietcm4.c:195	LOG_ERROR("Userflash operation timeout");
niietcm4.c:201	LOG_ERROR("Userflash operation error");
niietcm4.c:436	LOG_ERROR("Target not halted");
niietcm4.c:492	LOG_ERROR("Target not halted");
niietcm4.c:530	LOG_ERROR("Target not halted");
niietcm4.c:573	LOG_ERROR("Target not halted");
niietcm4.c:664	LOG_ERROR("Target not halted");
niietcm4.c:716	LOG_ERROR("Target not halted");
niietcm4.c:766	LOG_ERROR("Target not halted");
niietcm4.c:843	LOG_ERROR("Target not halted");
niietcm4.c:911	LOG_ERROR("Service mode erase timeout");
niietcm4.c:1164	LOG_ERROR("Target not halted");
niietcm4.c:1212	LOG_ERROR("Target not halted");
niietcm4.c:1344	LOG_ERROR("flash write failed at address 0x%"PRIx32,
niietcm4.c:1367	LOG_ERROR("Target not halted");
niietcm4.c:1372	LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-word alignment", offset);
niietcm4.c:1385	LOG_ERROR("Odd number of words to write and no memory for padding buffer");
non_cfi.c:546	LOG_ERROR("BUG: non-CFI flashes using the Intel commandset are not yet supported");
npcx.c:186	LOG_ERROR("Target not halted");
npcx.c:260	LOG_ERROR("Out of memory");
npcx.c:304	LOG_ERROR("Out of memory");
npcx.c:323	LOG_ERROR("%s is not a valid fiu", fiu);
npcx.c:345	LOG_ERROR("Target not halted");
npcx.c:394	LOG_ERROR("Target not halted");
npcx.c:453	LOG_ERROR("Target not halted");
npcx.c:479	LOG_ERROR("Unable to write data to target memory");
nrf5.c:390	LOG_ERROR("Error waiting NVMC_READY: generic flash write/erase error (check protection etc...)");
nrf5.c:413	LOG_ERROR("Failed to enable erase operation");
nrf5.c:423	LOG_ERROR("Erase enable did not complete");
nrf5.c:436	LOG_ERROR("Failed to enable write operation");
nrf5.c:446	LOG_ERROR("Write enable did not complete");
nrf5.c:459	LOG_ERROR("Failed to disable write/erase operation");
nrf5.c:468	LOG_ERROR("Read only enable did not complete");
nrf5.c:485	LOG_ERROR("Couldn't read code region 0 size[FICR]");
nrf5.c:493	LOG_ERROR("Couldn't read code region 0 size[UICR]");
nrf5.c:561	LOG_ERROR("Code region 0 must start at the beginning of the bank");
nrf5.c:568	LOG_ERROR("Couldn't read PPFC register");
nrf5.c:573	LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings");
nrf5.c:580	LOG_ERROR("Couldn't read code region 0 size from UICR");
nrf5.c:585	LOG_ERROR("You need to perform chip erase before changing the protection settings");
nrf5.c:604	LOG_ERROR("Couldn't write code region 0 size to UICR");
nrf5.c:620	LOG_ERROR("UICR page does not support protection");
nrf5.c:625	LOG_ERROR("Target not halted");
nrf5.c:632	LOG_ERROR("Flash protection setting is not supported on this nRF5 device");
nrf5.c:692	LOG_ERROR("BUG: buffer problem in %s", __func__);
nrf5.c:918	LOG_ERROR("Couldn't read some of FICR INFO registers");
nrf5.c:929	LOG_ERROR("Couldn't read FICR CONFIGID register");
nrf5.c:968	LOG_ERROR("Couldn't read code page size");
nrf5.c:977	LOG_ERROR("Couldn't read code memory size");
nrf5.c:1032	LOG_ERROR("Invalid nRF bank address " TARGET_ADDR_FMT, bank->base);
nrf5.c:1078	LOG_ERROR("Couldn't read PPFC register");
nrf5.c:1089	LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region");
nrf5.c:1229	LOG_ERROR("Target not halted");
nrf5.c:1261	LOG_ERROR("Write refused, sector %d is protected", sector);
nrf5.c:1279	LOG_ERROR("Failed to write to nrf5 flash");
nrf5.c:1289	LOG_ERROR("Target not halted");
nrf5.c:1318	LOG_ERROR("Flash sector %d is protected", s);
nrf5.c:1325	LOG_ERROR("Error erasing sector %d", s);
nrf5.c:1387	LOG_ERROR("Invalid nRF bank address " TARGET_ADDR_FMT, bank->base);
nrf5.c:1434	LOG_ERROR("Target not halted");
nrf5.c:1446	LOG_ERROR("Couldn't read PPFC register");
nrf5.c:1451	LOG_ERROR("Code region 0 size was pre-programmed at the factory, "
nrf5.c:1463	LOG_ERROR("Mass erase failed");
nrf5.c:1469	LOG_ERROR("Mass erase did not complete");
nuc910.c:30	LOG_ERROR("Target not halted");
nuc910.c:163	LOG_ERROR("no memory for nand controller");
nuc910.c:184	LOG_ERROR("nuc910 only supports 8 bit bus width, not %i", bus_width);
numicro.c:603	LOG_ERROR("Target not halted");
numicro.c:788	LOG_ERROR("Error executing NuMicro Flash programming algorithm");
numicro.c:816	LOG_ERROR("Target not halted");
numicro.c:863	LOG_ERROR("Target not halted");
numicro.c:934	LOG_ERROR("Target not halted");
nuttx.c:130	LOG_ERROR("Could not read CPACR register to check FPU state");
nuttx.c:165	LOG_ERROR("Could not find \"%s\" target in NuttX compatibility list", target_type_name(target));
nuttx.c:199	LOG_ERROR("No symbols for nuttx");
nuttx.c:212	LOG_ERROR("Failed to read g_npidhash: ret = %d", ret);
nuttx.c:220	LOG_ERROR("Failed to read g_pidhash address: ret = %d", ret);
nuttx.c:228	LOG_ERROR("Failed to allocate pidhash");
nuttx.c:234	LOG_ERROR("Failed to read tcbhash: ret = %d", ret);
nuttx.c:244	LOG_ERROR("Failed to read tcbinfo: ret = %d", ret);
nuttx.c:262	LOG_ERROR("Failed to read g_readytorun: ret = %d", ret);
nuttx.c:277	LOG_ERROR("Failed to read PID of TCB@0x%x from pidhash[%d]: ret = %d",
nuttx.c:284	LOG_ERROR("Failed to read state of TCB@0x%x from pidhash[%d]: ret = %d",
nuttx.c:324	LOG_ERROR("Failed to read thread's name: ret = %d", ret);
nuttx.c:349	LOG_ERROR("target_get_gdb_reg_list failed %d", ret);
nuttx.c:355	LOG_ERROR("Failed to alloc memory for %d", *num_regs);
nuttx.c:383	LOG_ERROR("Can't find a way to get stacking info");
nuttx.c:392	LOG_ERROR("Failed to read registers' offset: ret = %d", ret);
nuttx.c:398	LOG_ERROR("Failed to read registers' address: ret = %d", ret);
nuttx.c:409	LOG_ERROR("NUTTX: out of memory");
nuttx.c:422	LOG_ERROR("NUTTX: out of memory");
ocl.c:55	LOG_ERROR("target has to be running to communicate with the loader");
ocl.c:85	LOG_ERROR("loader response to OCL_ERASE_ALL 0x%08" PRIx32 "", dcc_buffer[1]);
ocl.c:87	LOG_ERROR("loader response to OCL_ERASE_BLOCK 0x%08" PRIx32 "", dcc_buffer[1]);
ocl.c:111	LOG_ERROR("target has to be running to communicate with the loader");
ocl.c:181	LOG_ERROR("loader response to OCL_FLASH_BLOCK 0x%08" PRIx32 "", dcc_buffer[0]);
ocl.c:220	LOG_ERROR("loader response to OCL_PROBE 0x%08" PRIx32 "", dcc_buffer[0]);
ocl.c:260	LOG_ERROR("number of sectors shall be non zero value");
ocl.c:264	LOG_ERROR("bank size not divisible by number of sectors");
ocl.c:279	LOG_ERROR("buflen shall be non zero value");
ocl.c:284	LOG_ERROR("buflen is not multiple of bufalign");
ocl.c:289	LOG_ERROR("buflen shall be divisible by 4");
opendous.c:308	LOG_ERROR("BUG: unknown JTAG command type encountered");
opendous.c:337	LOG_ERROR("No matching cable found for %s", opendous_type);
opendous.c:351	LOG_ERROR("Cannot find opendous Interface! Please check connection and permissions.");
opendous.c:401	LOG_ERROR("BUG: %i is not a valid end state", state);
opendous.c:430	LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
opendous.c:524	LOG_ERROR("opendous command 0x%02x failed (%d)", command, result);
opendous.c:579	LOG_ERROR("opendous_tap_append_step, overflow");
opendous.c:640	LOG_ERROR("opendous_tap_execute, wrong result %d, expected %d", result, receive);
opendous.c:722	LOG_ERROR("usb_bulk_read failed (requested=%d, result=%d)", in_length, result);
opendous.c:726	LOG_ERROR("usb_bulk_write failed (requested=%d, result=%d)", out_length, result);
opendous.c:737	LOG_ERROR("opendous_jtag_write illegal out_length=%d (max=%d)", out_length, OPENDOUS_OUT_BUFFER_SIZE);
or1k.c:381	LOG_ERROR("Error while restoring context");
or1k.c:393	LOG_ERROR("Error while restoring context");
or1k.c:423	LOG_ERROR("Error while reading spr 0x%08" PRIx32, or1k->arch_info[num].spr_num);
or1k.c:486	LOG_ERROR("Error while writing spr 0x%08" PRIx32, or1k_reg->spr_num);
or1k.c:550	LOG_ERROR("Error while calling or1k_save_context");
or1k.c:584	LOG_ERROR("Can't request a halt while in reset if nSRST pulls nTRST");
or1k.c:594	LOG_ERROR("Impossible to stall the CPU");
or1k.c:636	LOG_ERROR("Could not re-establish communication with target");
or1k.c:647	LOG_ERROR("Error while calling or1k_is_cpu_running");
or1k.c:661	LOG_ERROR("Error while calling or1k_debug_entry");
or1k.c:672	LOG_ERROR("Error while calling or1k_debug_entry");
or1k.c:688	LOG_ERROR("Error while calling or1k_halt");
or1k.c:694	LOG_ERROR("Error while calling or1k_debug_entry");
or1k.c:718	LOG_ERROR("Error while asserting RESET");
or1k.c:734	LOG_ERROR("Error while deasserting RESET");
or1k.c:750	LOG_ERROR("Error while stalling the CPU");
or1k.c:806	LOG_ERROR("Error while calling or1k_restore_context");
or1k.c:814	LOG_ERROR("Error while reading debug registers");
or1k.c:841	LOG_ERROR("Error while writing back debug registers");
or1k.c:863	LOG_ERROR("Error while unstalling the CPU");
or1k.c:921	LOG_ERROR("HW breakpoints not supported for now. Doing SW breakpoint.");
or1k.c:930	LOG_ERROR("Error while reading the instruction at 0x%08" TARGET_PRIxADDR,
or1k.c:950	LOG_ERROR("Error while writing OR1K_TRAP_INSTR at 0x%08" TARGET_PRIxADDR,
or1k.c:960	LOG_ERROR("Error while invalidating the ICACHE");
or1k.c:979	LOG_ERROR("HW breakpoints not supported for now. Doing SW breakpoint.");
or1k.c:989	LOG_ERROR("Error while writing back the instruction at 0x%08" TARGET_PRIxADDR,
or1k.c:999	LOG_ERROR("Error while invalidating the ICACHE");
or1k.c:1009	LOG_ERROR("%s: implement me", __func__);
or1k.c:1016	LOG_ERROR("%s: implement me", __func__);
or1k.c:1035	LOG_ERROR("Bad arguments");
or1k.c:1040	LOG_ERROR("Can't handle unaligned memory access");
or1k.c:1062	LOG_ERROR("Bad arguments");
or1k.c:1067	LOG_ERROR("Can't handle unaligned memory access");
or1k.c:1082	LOG_ERROR("No debug unit selected");
or1k.c:1087	LOG_ERROR("No tap selected");
or1k.c:1134	LOG_ERROR("Couldn't read the CPU state");
or1k.c:1171	LOG_ERROR("Error while calling or1k_save_context");
or1k.c:1222	LOG_ERROR("Error while resuming target");
or1k.c:1232	LOG_ERROR("Error while reading NPC");
or1k.c:1269	LOG_ERROR("%s unknown, no tap selected", CMD_ARGV[0]);
or1k.c:1317	LOG_ERROR("%s unknown, no debug unit selected", CMD_ARGV[0]);
or1k_du_adv.c:156	LOG_ERROR("TAP initialization failed");
or1k_du_adv.c:178	LOG_ERROR("Couldn't start the JSP server");
or1k_du_adv.c:252	LOG_ERROR("Illegal debug chain selected (%i) while selecting control register",
or1k_du_adv.c:289	LOG_ERROR("Error while calling adbg_select_ctrl_reg");
or1k_du_adv.c:310	LOG_ERROR("Illegal debug chain selected (%i) while doing control write",
or1k_du_adv.c:341	LOG_ERROR("Error while calling adbg_select_ctrl_reg");
or1k_du_adv.c:363	LOG_ERROR("Illegal debug chain selected (%i) while doing control read",
or1k_du_adv.c:458	LOG_ERROR("Illegal debug chain selected (%i) while doing burst read",
or1k_du_adv.c:493	LOG_ERROR("Burst read failed");
or1k_du_adv.c:513	LOG_ERROR("Burst read failed");
or1k_du_adv.c:545	LOG_ERROR("Max WB bus errors reached during burst read");
or1k_du_adv.c:612	LOG_ERROR("Illegal debug chain selected (%i) while doing burst write",
or1k_du_adv.c:688	LOG_ERROR("Max WB bus errors reached during burst read");
or1k_du_adv.c:917	LOG_ERROR("Out of memory");
or1k_tap_vjtag.c:260	LOG_ERROR("No VJTAG TAP instance found !");
orion.c:31	LOG_ERROR("NAND flash access requires halted target"); \
orion.c:113	LOG_ERROR("no memory for nand controller");
osbdm.c:33	LOG_ERROR("BUG: sequences with zero length are not allowed");
osbdm.c:63	LOG_ERROR("Not enough memory");
osbdm.c:92	LOG_ERROR("Not enough memory");
osbdm.c:142	LOG_ERROR("OSBDM communication error: can't write");
osbdm.c:156	LOG_ERROR("OSBDM communication error: can't read");
osbdm.c:161	LOG_ERROR("OSBDM communication error: reply too small");
osbdm.c:166	LOG_ERROR("OSBDM communication error: reply size mismatch");
osbdm.c:171	LOG_ERROR("OSBDM communication error: reply command mismatch");
osbdm.c:205	LOG_ERROR("BUG: bit sequence too long");
osbdm.c:210	LOG_ERROR("BUG: bit sequence equal or less than 0");
osbdm.c:262	LOG_ERROR("OSBDM communication error: invalid swap command reply");
osbdm.c:390	LOG_ERROR("BUG: can't allocate bit sequence");
osbdm.c:401	LOG_ERROR("BUG: %s -> %s isn't a valid TAP state transition",
osbdm.c:442	LOG_ERROR("BUG: can't allocate bit sequence");
osbdm.c:457	LOG_ERROR("BUG: current state (%s) is not stable",
osbdm.c:464	LOG_ERROR("BUG: can't allocate bit sequence");
osbdm.c:481	LOG_ERROR("BUG: can't allocate bit sequence");
osbdm.c:514	LOG_ERROR("Can't allocate bit sequence");
osbdm.c:564	LOG_ERROR("BUG: nTRST signal is not supported");
osbdm.c:623	LOG_ERROR("BUG: unknown JTAG command type encountered");
osbdm.c:637	LOG_ERROR("BUG: can't allocate bit queue");
osbdm.c:654	LOG_ERROR("FATAL: can't execute jtag command");
osbdm.c:665	LOG_ERROR("Can't open OSBDM device");
pic32mm.c:276	LOG_ERROR("Target not halted");
pic32mm.c:309	LOG_ERROR("The NVMBWP register is locked and cannot be modified");
pic32mm.c:317	LOG_ERROR("Internal error: trying to permanently lock NVMBWP");
pic32mm.c:343	LOG_ERROR("The NVMPWP register is locked and cannot be modified");
pic32mm.c:351	LOG_ERROR("Internal error: trying to permanently lock NVMPWP");
pic32mm.c:386	LOG_ERROR("Target not halted");
pic32mm.c:428	LOG_ERROR("Target not halted");
pic32mm.c:535	LOG_ERROR("unexpected word count in pic32mm_call_flash_loader(): %d", word_count);
pic32mm.c:550	LOG_ERROR("error executing pic32mm flash write algorithm");
pic32mm.c:557	LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
pic32mm.c:562	LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
pic32mm.c:637	LOG_ERROR("pic32mm: Internal error: invalid post-padding");
pic32mm.c:651	LOG_ERROR("pic32mm: Internal error: multi-row buffer is not properly aligned");
pic32mm.c:703	LOG_ERROR("Target not halted");
pic32mm.c:712	LOG_ERROR("flash writing failed");
pic32mm.c:743	LOG_ERROR("pic32mm: Internal error: invalid post-padding");
pic32mm.c:757	LOG_ERROR("pic32mm: Internal error: multi-row buffer is not properly aligned");
pic32mx.c:266	LOG_ERROR("Target not halted");
pic32mx.c:319	LOG_ERROR("Target not halted");
pic32mx.c:356	LOG_ERROR("Target not halted");
pic32mx.c:507	LOG_ERROR("Out of memory");
pic32mx.c:547	LOG_ERROR("error executing pic32mx flash write algorithm");
pic32mx.c:555	LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
pic32mx.c:561	LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
pic32mx.c:606	LOG_ERROR("Target not halted");
pic32mx.c:628	LOG_ERROR("flash writing failed");
pic32mx.c:645	LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
pic32mx.c:650	LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
pic32mx.c:666	LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
pic32mx.c:671	LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
picoprobe.c:129	LOG_ERROR("Wrong queue id. q->id %d != %d", q->id, i);
picoprobe.c:230	LOG_ERROR("Picoprobe queue full");
picoprobe.c:306	LOG_ERROR("SWD Read data parity mismatch");
picoprobe.c:410	LOG_ERROR("Couldn't set picoprobe speed");
picoprobe.c:460	LOG_ERROR("Sequence %d not supported", seq);
picoprobe.c:502	LOG_ERROR("Failed to open or find the device");
picoprobe.c:507	LOG_ERROR("Failed to claim picoprobe interface");
picoprobe.c:523	LOG_ERROR("Failed to allocate memory");
picoprobe.c:528	LOG_ERROR("Can't find a picoprobe device! Please check device connections and permissions.");
picoprobe.c:535	LOG_ERROR("Failed to allocate memory for the packet buffer");
pld.c:65	LOG_ERROR("Invalid argument");
pld.c:82	LOG_ERROR("pld device has no associated driver");
pld.c:99	LOG_ERROR("pld device has no associated driver");
pld.c:117	LOG_ERROR("pld device has no associated driver");
pld.c:134	LOG_ERROR("pld device has no associated driver");
pld.c:151	LOG_ERROR("pld device has no associated driver");
pld.c:176	LOG_ERROR("pld driver '%s' not found", CMD_ARGV[1]);
pld.c:181	LOG_ERROR("pld device with name '%s' already exists", CMD_ARGV[0]);
pld.c:187	LOG_ERROR("Out of memory");
pld.c:196	LOG_ERROR("'%s' driver rejected pld device",
pld.c:203	LOG_ERROR("Out of memory");
pld.c:212	LOG_ERROR("couldn't register '%s' commands", CMD_ARGV[1]);
pld.c:268	LOG_ERROR("couldn't stat() %s: %s", CMD_ARGV[1], strerror(errno));
pld.c:273	LOG_ERROR("%s is a directory", CMD_ARGV[1]);
pld.c:278	LOG_ERROR("Empty file %s", CMD_ARGV[1]);
program.c:59	LOG_ERROR("Unable to write ebreak");
program.c:61	LOG_ERROR("ram[%02x]: DASM(0x%08" PRIx32 ") [0x%08" PRIx32 "]",
program.c:178	LOG_ERROR("Unable to insert instruction:");
program.c:179	LOG_ERROR(" instruction_count=%d", (int)p->instruction_count);
program.c:180	LOG_ERROR(" buffer size =%d", (int)riscv_debug_buffer_size(p->target));
psoc4.c:314	LOG_ERROR("unable to get armv7m target");
psoc4.c:330	LOG_ERROR("sysreq wait code execution failed");
psoc4.c:343	LOG_ERROR("sysreq error 0x%" PRIx32, sysarg_out_tmp);
psoc4.c:373	LOG_ERROR("sysreq error 0x%" PRIx32, part0);
psoc4.c:414	LOG_ERROR("Unexpected data in ROMTABLE");
psoc4.c:424	LOG_ERROR("ROMTABLE designer is not Cypress");
psoc4.c:439	LOG_ERROR("Target not halted");
psoc4.c:453	LOG_ERROR("Family mismatch");
psoc4.c:471	LOG_ERROR("sysreq error 0x%" PRIx32, sysreq_status);
psoc4.c:530	LOG_ERROR("Only mass erase available! Consider using 'psoc4 flash_autoerase 0 on'");
psoc4.c:562	LOG_ERROR("no memory for row buffer");
psoc4.c:644	LOG_ERROR("no memory for row buffer");
psoc4.c:731	LOG_ERROR("Cannot identify PSoC 4 family.");
psoc5lp.c:265	LOG_ERROR("Device 0x%08" PRIX32 " not supported", device_id);
psoc5lp.c:276	LOG_ERROR("Cannot read PM_ACT_CFG0");
psoc5lp.c:285	LOG_ERROR("Cannot enable SPC clock");
psoc5lp.c:674	LOG_ERROR("NVL can only be written in whole");
psoc5lp.c:724	LOG_ERROR("Failed to load NVL byte %" PRIu32 ": "
psoc5lp.c:766	LOG_ERROR("Target not halted");
psoc5lp.c:860	LOG_ERROR("Writes must be row-aligned, got offset 0x%08" PRIx32,
psoc5lp.c:867	LOG_ERROR("Unable to read Die temperature");
psoc5lp.c:933	LOG_ERROR("Target not halted");
psoc5lp.c:1063	LOG_ERROR("Target not halted");
psoc5lp.c:1111	LOG_ERROR("Can't run erase check - add working memory");
psoc5lp.c:1131	LOG_ERROR("Writing to ECC not supported");
psoc5lp.c:1136	LOG_ERROR("Writes must be row-aligned, got offset 0x%08" PRIx32,
psoc5lp.c:1149	LOG_ERROR("Unable to read Die temperature");
psoc5lp.c:1159	LOG_ERROR("Could not allocate working area for program SRAM");
psoc5lp.c:1168	LOG_ERROR("Could not allocate working area for even row");
psoc5lp.c:1176	LOG_ERROR("Could not allocate working area for odd row");
psoc5lp.c:1315	LOG_ERROR("Target not halted");
psoc5lp.c:1380	LOG_ERROR("Target not halted");
psoc5lp.c:1402	LOG_ERROR("Unable to read Die temperature");
psoc6.c:239	LOG_ERROR("Unable to read IPC Lock Status register");
psoc6.c:254	LOG_ERROR("Timeout polling IPC Lock Status");
psoc6.c:282	LOG_ERROR("Unable to write to IPC Acquire register");
psoc6.c:289	LOG_ERROR("Unable to read IPC Acquire register");
psoc6.c:302	LOG_ERROR("Timeout acquiring IPC structure");
psoc6.c:358	LOG_ERROR("Error reading SROM API Status location");
psoc6.c:364	LOG_ERROR("SROM API execution failed. Status: 0x%08" PRIX32, *data_out);
psoc6.c:589	LOG_ERROR("Invalid Flash Bank base address in config file");
psoc6.c:657	LOG_ERROR("SECTOR @%08" PRIX32 " not erased!", addr);
psoc6.c:686	LOG_ERROR("ROW @%08" PRIX32 " not erased!", addr);
psoc6.c:843	LOG_ERROR("Failed to program Flash at address 0x%08" PRIX32, aligned_addr);
qn908x.c:360	LOG_ERROR("Address " TARGET_ADDR_FMT
qn908x.c:394	LOG_ERROR("Target not halted");
qn908x.c:444	LOG_ERROR("AHB error on block %u", block);
qn908x.c:449	LOG_ERROR("Locked page being accessed error on block %u", block);
qn908x.c:454	LOG_ERROR("Smart write on block %u failed", block);
qn908x.c:460	LOG_ERROR("Smart erase on block %u failed", block);
qn908x.c:478	LOG_ERROR("Timeout waiting to be idle.");
qn908x.c:490	LOG_ERROR("Target not halted");
qn908x.c:582	LOG_ERROR("Target not halted");
qn908x.c:628	LOG_ERROR("Unprotecting the last page is not supported. Issue a "
qn908x.c:678	LOG_ERROR("Target not halted");
qn908x.c:714	LOG_ERROR("The Code Read Protection (CRP) field at bit %d is "
qn908x.c:729	LOG_ERROR("Disabling SWD is not allowed, run "
qn908x.c:865	LOG_ERROR("The flash or memory in this chip is protected and "
qn908x.c:872	LOG_ERROR("Flash information page CRC32 mismatch, found 0x%08"
qn908x.c:889	LOG_ERROR("Unknown Flash size field: 0x%08" PRIx32,
quark_d20xx.c:39	LOG_ERROR("%s out of memory", __func__);
quark_d20xx.c:63	LOG_ERROR("%s core state update fail", __func__);
quark_d20xx.c:70	LOG_ERROR("%s could not resume target", __func__);
raw_bit.c:24	LOG_ERROR("Couldn't open %s: %s", filename, strerror(errno));
raw_bit.c:34	LOG_ERROR("Failed to get length of file %s: %s", filename, strerror(errno));
raw_bit.c:42	LOG_ERROR("Out of memory");
renesas_rpchf.c:182	LOG_ERROR("timeout");
renesas_rpchf.c:209	LOG_ERROR("Mode TEND timeout");
renesas_rpchf.c:273	LOG_ERROR("Xfer TEND timeout");
renesas_rpchf.c:377	LOG_ERROR("Xfer done TEND timeout");
renesas_rpchf.c:447	LOG_ERROR("Write address at base " TARGET_ADDR_FMT
renesas_rpchf.c:455	LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %"
renesas_rpchf.c:478	LOG_ERROR("couldn't write block at base " TARGET_ADDR_FMT
renesas_rpchf.c:504	LOG_ERROR("Target not halted");
renesas_rpchf.c:620	LOG_ERROR("Target not halted");
riot.c:121	LOG_ERROR("No symbols for RIOT");
riot.c:126	LOG_ERROR("Can't find symbol `%s`",
riot.c:144	LOG_ERROR("Can't read symbol `%s`",
riot.c:157	LOG_ERROR("Can't read symbol `%s`",
riot.c:168	LOG_ERROR("Can't read symbol `%s`",
riot.c:173	LOG_ERROR("Thread count is invalid");
riot.c:189	LOG_ERROR("Can't read symbol `%s`",
riot.c:198	LOG_ERROR("RIOT: out of memory");
riot.c:215	LOG_ERROR("Can't parse `%s`",
riot.c:234	LOG_ERROR("Can't parse `%s`",
riot.c:256	LOG_ERROR("RIOT: out of memory");
riot.c:268	LOG_ERROR("Can't parse `%s`",
riot.c:279	LOG_ERROR("Can't parse `%s`",
riot.c:298	LOG_ERROR("RIOT: out of memory");
riot.c:339	LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE].name);
riot.c:349	LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE].name);
riot.c:365	LOG_ERROR("RIOT: out of memory");
riot.c:397	LOG_ERROR("Could not find target in RIOT compatibility list");
riot.c:413	LOG_ERROR("No stacking info for architecture");
riscv-011.c:254	LOG_ERROR("slot_offset called with xlen=%d, slot=%d",
riscv-011.c:302	LOG_ERROR("failed jtag scan: %d", retval);
riscv-011.c:326	LOG_ERROR("failed jtag scan: %d", retval);
riscv-011.c:451	LOG_ERROR("dbus_scan failed jtag scan");
riscv-011.c:483	LOG_ERROR("dbus_read(0x%x) failed!", address);
riscv-011.c:490	LOG_ERROR("failed read from 0x%x; value=0x%" PRIx64 ", status=%d\n", address, value, status);
riscv-011.c:505	LOG_ERROR("failed to write 0x%" PRIx64 " to 0x%x; status=%d\n", value, address, status);
riscv-011.c:581	LOG_ERROR("failed jtag scan: %d", retval);
riscv-011.c:708	LOG_ERROR("TDO seems to be stuck high.");
riscv-011.c:719	LOG_ERROR("Failed to read from 0x%x; status=%d", address_in, status);
riscv-011.c:746	LOG_ERROR("Timed out waiting for debug int to clear."
riscv-011.c:759	LOG_ERROR("Wrote 0x%x to Debug RAM at %d, but read back 0x%x",
riscv-011.c:813	LOG_ERROR("Debug RAM 0x%x: 0x%08x", i, value);
riscv-011.c:903	LOG_ERROR("JTAG execute failed.");
riscv-011.c:915	LOG_ERROR("Debug RAM write failed. Hardware error?");
riscv-011.c:922	LOG_ERROR("Got invalid bus access status: %d", status);
riscv-011.c:944	LOG_ERROR("Debug interrupt didn't clear.");
riscv-011.c:965	LOG_ERROR("Debug interrupt didn't clear.");
riscv-011.c:1030	LOG_ERROR("Timed out waiting for state %d. "
riscv-011.c:1163	LOG_ERROR("Debug interrupt didn't clear.");
riscv-011.c:1187	LOG_ERROR("Timed out waiting for step to complete."
riscv-011.c:1198	LOG_ERROR("TODO: debug_execution is true");
riscv-011.c:1209	LOG_ERROR("Register cache entry for %d is invalid!", number);
riscv-011.c:1250	LOG_ERROR("Don't know how to read register %d", regnum);
riscv-011.c:1323	LOG_ERROR("Don't know how to write register %d", number);
riscv-011.c:1401	LOG_ERROR("cache_write() failed.");
riscv-011.c:1478	LOG_ERROR("dtmcontrol is 0. Check JTAG connectivity/board power.");
riscv-011.c:1482	LOG_ERROR("Unsupported DTM version %d. (dtmcontrol=0x%x)",
riscv-011.c:1515	LOG_ERROR("OpenOCD only supports Debug Module version 1, not %d "
riscv-011.c:1523	LOG_ERROR("Authentication required by RISC-V core but not "
riscv-011.c:1564	LOG_ERROR("Failed to discover xlen; word0=0x%x, word1=0x%x, exception=0x%x",
riscv-011.c:1578	LOG_ERROR("Failed to read misa at 0x%x.", old_csr_misa);
riscv-011.c:1648	LOG_ERROR("JTAG execute failed: %d", retval);
riscv-011.c:1669	LOG_ERROR("Debug access failed. Hardware error?");
riscv-011.c:1675	LOG_ERROR("Got invalid bus access status: %d", status);
riscv-011.c:1788	LOG_ERROR("Got invalid register result %d", result);
riscv-011.c:1840	LOG_ERROR("handle_halt_routine failed");
riscv-011.c:1860	LOG_ERROR("Invalid halt cause %d in DCSR (0x%" PRIx64 ")",
riscv-011.c:1951	LOG_ERROR("Debug interrupt didn't clear.");
riscv-011.c:1991	LOG_ERROR("read_memory with custom increment not implemented");
riscv-011.c:2012	LOG_ERROR("Unsupported size: %d", size);
riscv-011.c:2046	LOG_ERROR("JTAG execute failed: %d", retval);
riscv-011.c:2059	LOG_ERROR("Debug RAM write failed. Hardware error?");
riscv-011.c:2065	LOG_ERROR("Got invalid bus access status: %d", status);
riscv-011.c:2147	LOG_ERROR("Unsupported size: %d", size);
riscv-011.c:2220	LOG_ERROR("JTAG execute failed: %d", retval);
riscv-011.c:2233	LOG_ERROR("Debug RAM write failed. Hardware error?");
riscv-011.c:2239	LOG_ERROR("Got invalid bus access status: %d", status);
riscv-011.c:2274	LOG_ERROR("Core got an exception (0x%x) while writing to 0x%"
riscv-011.c:2277	LOG_ERROR("(It may have failed between 0x%" TARGET_PRIxADDR
riscv-011.c:2328	LOG_ERROR("Timed out after %ds waiting for authbusy to go low (dminfo=0x%x). "
riscv-011.c:2342	LOG_ERROR("Spec 0.11 only has a two authdata registers.");
riscv-011.c:2358	LOG_ERROR("Spec 0.11 only has a two authdata registers.");
riscv-013.c:440	LOG_ERROR("failed jtag scan: %d", retval);
riscv-013.c:521	LOG_ERROR("dmi_scan failed jtag scan");
riscv-013.c:581	LOG_ERROR("Invalid DMI operation: %d", dmi_op);
riscv-013.c:600	LOG_ERROR("failed %s at 0x%x, status=%d", op_name, address, status);
riscv-013.c:609	LOG_ERROR("Failed %s at 0x%x; status=%d", op_name, address, status);
riscv-013.c:628	LOG_ERROR("Failed %s (NOP) at 0x%x; value=0x%x, status=%d",
riscv-013.c:631	LOG_ERROR("Failed %s (NOP) at 0x%x; status=%d", op_name, address,
riscv-013.c:652	LOG_ERROR("DMI operation didn't complete in %d seconds. The target is "
riscv-013.c:691	LOG_ERROR("OpenOCD only supports Debug Module version 2 (0.13) and 3 (1.0), not "
riscv-013.c:696	LOG_ERROR("Debugger is not authenticated to target Debug Module. "
riscv-013.c:730	LOG_ERROR("Unsupported register width: %d", width);
riscv-013.c:759	LOG_ERROR("Abstract command ended in error '%s' (abstractcs=0x%x)",
riscv-013.c:763	LOG_ERROR("Timed out after %ds waiting for busy to go low (abstractcs=0x%x). "
riscv-013.c:818	LOG_ERROR("Unsupported size: %d bits", size_bits);
riscv-013.c:837	LOG_ERROR("Unsupported size: %d bits", size_bits);
riscv-013.c:863	LOG_ERROR("%d-bit register %s not supported.", size,
riscv-013.c:985	LOG_ERROR("Unsupported memory width: %d", width);
riscv-013.c:1190	LOG_ERROR("Couldn't find %d bytes of scratch RAM to use. Please configure "
riscv-013.c:1368	LOG_ERROR("Unsupported register (enum gdb_regno)(%d)", number);
riscv-013.c:1460	LOG_ERROR("Unsupported register: %s", gdb_regno_name(number));
riscv-013.c:1507	LOG_ERROR("Timed out after %ds waiting for authbusy to go low (dmstatus=0x%x). "
riscv-013.c:1574	LOG_ERROR("dtmcontrol is 0. Check JTAG connectivity/board power.");
riscv-013.c:1578	LOG_ERROR("Unsupported DTM version %d. (dtmcontrol=0x%x)",
riscv-013.c:1607	LOG_ERROR("Debug Module did not become active. dmcontrol=0x%x",
riscv-013.c:1644	LOG_ERROR("Debugger is not authenticated to target Debug Module. "
riscv-013.c:1677	LOG_ERROR("set_enable_virtual is not available on this target. It "
riscv-013.c:1708	LOG_ERROR("No harts found!");
riscv-013.c:1721	LOG_ERROR("Fatal: Hart %d failed to halt during examine()", r->current_hartid);
riscv-013.c:1737	LOG_ERROR("Fatal: Failed to read MISA from hart %d.", r->current_hartid);
riscv-013.c:1785	LOG_ERROR("Spec 0.13 only has a single authdata register.");
riscv-013.c:1798	LOG_ERROR("Spec 0.13 only has a single authdata register.");
riscv-013.c:1868	LOG_ERROR("Unable to determine supported data bits on this target. Assuming 32 bits.");
riscv-013.c:1921	LOG_ERROR("Unsupported xlen: %d", riscv_xlen(target));
riscv-013.c:2134	LOG_ERROR("Memory sampling is only implemented for sbasize <= 64.");
riscv-013.c:2139	LOG_ERROR("Memory sampling is only implemented for SBA version 1.");
riscv-013.c:2177	LOG_ERROR("Hardware does not support SBA access for %d-byte memory sampling.",
riscv-013.c:2422	LOG_ERROR("Hart %d didn't complete a DMI read coming out of "
riscv-013.c:2438	LOG_ERROR("Hart %d didn't leave reset in %ds; "
riscv-013.c:2549	LOG_ERROR("Timed out after %ds waiting for sbbusy to go low (sbcs=0x%x). "
riscv-013.c:2592	LOG_ERROR("sba v0 reads only support size==increment");
riscv-013.c:2681	LOG_ERROR("sba v1 reads only support increment of size or 0");
riscv-013.c:2706	LOG_ERROR("Failed to scan idle sequence");
riscv-013.c:2723	LOG_ERROR("DMI keeps being busy in while reading memory just past " TARGET_ADDR_FMT,
riscv-013.c:2751	LOG_ERROR("DMI keeps being busy in while reading memory just past " TARGET_ADDR_FMT,
riscv-013.c:2934	LOG_ERROR("Skipping mem read via abstract access - "
riscv-013.c:2977	LOG_ERROR("Failed to write arg1 during read_memory_abstract().");
riscv-013.c:3051	LOG_ERROR("Failed to write arg0 during write_memory_abstract().");
riscv-013.c:3060	LOG_ERROR("Failed to write arg1 during write_memory_abstract().");
riscv-013.c:3374	LOG_ERROR("Unsupported size: %d", size);
riscv-013.c:3420	LOG_ERROR("XLEN (%d) is too short for %d-bit memory read.",
riscv-013.c:3477	LOG_ERROR("Unsupported size: %d", size);
riscv-013.c:3539	LOG_ERROR("BUG: Unsupported size for memory read: %d", size);
riscv-013.c:3591	LOG_ERROR("Target %s: Failed to read memory (addr=0x%" PRIx64 ")", target_name(target), address);
riscv-013.c:3592	LOG_ERROR(" progbuf=%s, sysbus=%s, abstract=%s", progbuf_result, sysbus_result, abstract_result);
riscv-013.c:3731	LOG_ERROR("Timed out after %ds waiting for sbbusy to go low (sbcs=0x%x). "
riscv-013.c:3795	LOG_ERROR("XLEN (%d) is too short for %d-bit memory write.",
riscv-013.c:3840	LOG_ERROR("write_memory_progbuf(): Unsupported size: %d", size);
riscv-013.c:3955	LOG_ERROR("error when writing memory, abstractcs=0x%08lx", (long)abstractcs);
riscv-013.c:3985	LOG_ERROR("BUG: Unsupported size for memory write: %d", size);
riscv-013.c:4037	LOG_ERROR("Target %s: Failed to write memory (addr=0x%" PRIx64 ")", target_name(target), address);
riscv-013.c:4038	LOG_ERROR(" progbuf=%s, sysbus=%s, abstract=%s", progbuf_result, sysbus_result, abstract_result);
riscv-013.c:4111	LOG_ERROR("Written PC (0x%" PRIx64 ") does not match read back "
riscv-013.c:4233	LOG_ERROR("unable to halt hart %d", r->current_hartid);
riscv-013.c:4234	LOG_ERROR(" dmcontrol=0x%08x", dmcontrol);
riscv-013.c:4235	LOG_ERROR(" dmstatus =0x%08x", dmstatus);
riscv-013.c:4294	LOG_ERROR("Hart %d is unavailable.", riscv_current_hartid(target));
riscv-013.c:4296	LOG_ERROR("Hart %d doesn't exist.", riscv_current_hartid(target));
riscv-013.c:4344	LOG_ERROR("Unknown DCSR cause field: 0x%" PRIx64, get_field(dcsr, CSR_DCSR_CAUSE));
riscv-013.c:4345	LOG_ERROR(" dcsr=0x%016lx", (long)dcsr);
riscv-013.c:4443	LOG_ERROR("Hart %d is not halted!", r->current_hartid);
riscv-013.c:4473	LOG_ERROR("unable to resume hart %d", r->current_hartid);
riscv-013.c:4476	LOG_ERROR(" dmstatus =0x%08x", dmstatus);
riscv-013.c:4479	LOG_ERROR(" was stepping, halting");
riscv-013.c:4497	LOG_ERROR("abstractcs.busy is not going low after %d seconds "
riscv.c:366	LOG_ERROR("failed jtag scan: %d", retval);
riscv.c:401	LOG_ERROR("failed jtag scan: %d", retval);
riscv.c:414	LOG_ERROR("Target has not been initialized");
riscv.c:425	LOG_ERROR("Unsupported DTM version: %d", info->dtm_version);
riscv.c:435	LOG_ERROR("Failed to allocate RISC-V target structure.");
riscv.c:740	LOG_ERROR("Couldn't find an available hardware trigger.");
riscv.c:872	LOG_ERROR("Invalid breakpoint length %d", breakpoint->length);
riscv.c:877	LOG_ERROR("Invalid breakpoint alignment for address 0x%" TARGET_PRIxADDR, breakpoint->address);
riscv.c:884	LOG_ERROR("Failed to read original instruction at 0x%" TARGET_PRIxADDR,
riscv.c:893	LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%"
riscv.c:926	LOG_ERROR("Couldn't find the hardware resources used by hardware "
riscv.c:952	LOG_ERROR("Failed to restore instruction for %d-byte breakpoint at "
riscv.c:1041	LOG_ERROR("Failed to read instruction at dpc 0x%" PRIx64, dpc);
riscv.c:1535	LOG_ERROR("Failed to read priv register.");
riscv.c:1541	LOG_ERROR("Failed to read mstatus register.");
riscv.c:1599	LOG_ERROR("No translation or protection." \
riscv.c:1603	LOG_ERROR("The translation mode is not supported." \
riscv.c:1614	LOG_ERROR("Virtual address 0x%" TARGET_PRIxADDR " is not sign-extended "
riscv.c:1656	LOG_ERROR("Couldn't find the PTE.");
riscv.c:1755	LOG_ERROR("Unsupported xlen: %d", riscv_xlen(target));
riscv.c:1768	LOG_ERROR("Target not initialized. Return ERROR_FAIL.");
riscv.c:1783	LOG_ERROR("Unsupported reg_class: %d", reg_class);
riscv.c:1838	LOG_ERROR("Memory parameters are not supported for RISC-V algorithms.");
riscv.c:1859	LOG_ERROR("Couldn't find register named '%s'", reg_params[i].reg_name);
riscv.c:1864	LOG_ERROR("Register %s is %d bits instead of %d bits.",
riscv.c:1870	LOG_ERROR("Only GPRs can be use as argument registers.");
riscv.c:1893	LOG_ERROR("Couldn't find mstatus!");
riscv.c:1915	LOG_ERROR("Algorithm timed out after %" PRId64 " ms.", now - start);
riscv.c:1935	LOG_ERROR("%s = 0x%" PRIx64, gdb_regno_name(regno), reg_value);
riscv.c:1953	LOG_ERROR("PC ended up at 0x%" PRIx64 " instead of 0x%"
riscv.c:1974	LOG_ERROR("get(%s) failed", r->name);
riscv.c:1983	LOG_ERROR("set(%s) failed", r->name);
riscv.c:2043	LOG_ERROR("Failed to write code to " TARGET_ADDR_FMT ": %d",
riscv.c:2065	LOG_ERROR("error executing RISC-V CRC algorithm");
riscv.c:2317	LOG_ERROR("unable to step rtos hart");
riscv.c:2338	LOG_ERROR("Command takes exactly 1 parameter");
riscv.c:2343	LOG_ERROR("%s is not a valid integer argument for command.", CMD_ARGV[0]);
riscv.c:2355	LOG_ERROR("Command takes exactly 1 parameter");
riscv.c:2360	LOG_ERROR("%s is not a valid integer argument for command.", CMD_ARGV[0]);
riscv.c:2377	LOG_ERROR("Command takes 1 to %d parameters", RISCV_NUM_MEM_ACCESS_METHODS);
riscv.c:2390	LOG_ERROR("Unknown argument '%s'. "
riscv.c:2396	LOG_ERROR("Syntax error - duplicate arguments to `riscv set_mem_access`.");
riscv.c:2423	LOG_ERROR("Command takes exactly 1 parameter");
riscv.c:2450	LOG_ERROR("Failed to parse single register number from '%s'.", arg);
riscv.c:2459	LOG_ERROR("Failed to parse single register number from '%s'.", arg);
riscv.c:2464	LOG_ERROR("Failed to parse single register number from '%s'.", dash);
riscv.c:2469	LOG_ERROR("Incorrect range encountered [%u, %u].", low, high);
riscv.c:2478	LOG_ERROR("Failed to parse single register number from '%s'.", arg);
riscv.c:2485	LOG_ERROR("Failed to allocate register name.");
riscv.c:2495	LOG_ERROR("Failed to parse register name from '%s'.", equals);
riscv.c:2501	LOG_ERROR("Invalid argument '%s'.", arg);
riscv.c:2509	LOG_ERROR("Cannot expose %s register number %u, maximum allowed value is %u.", reg_type, high, max_val);
riscv.c:2528	LOG_ERROR("Duplicate register name \"%s\" found.", name);
riscv.c:2537	LOG_ERROR("Failed to allocate range list.");
riscv.c:2558	LOG_ERROR("Command expects parameters");
riscv.c:2578	LOG_ERROR("Command expects parameters");
riscv.c:2603	LOG_ERROR("Command takes at most one parameter");
riscv.c:2609	LOG_ERROR("target is NULL!");
riscv.c:2615	LOG_ERROR("riscv_info is NULL!");
riscv.c:2626	LOG_ERROR("authdata_read is not implemented for this target.");
riscv.c:2650	LOG_ERROR("authdata_write is not implemented for this target.");
riscv.c:2660	LOG_ERROR("Command takes 1 parameter");
riscv.c:2666	LOG_ERROR("target is NULL!");
riscv.c:2672	LOG_ERROR("riscv_info is NULL!");
riscv.c:2684	LOG_ERROR("dmi_read is not implemented for this target.");
riscv.c:2693	LOG_ERROR("Command takes exactly 2 arguments");
riscv.c:2707	LOG_ERROR("dmi_write is not implemented for this target.");
riscv.c:2717	LOG_ERROR("Command takes at most one argument");
riscv.c:2733	LOG_ERROR("Command takes exactly 2 arguments");
riscv.c:2755	LOG_ERROR("Command takes at most one argument");
riscv.c:2764	LOG_ERROR("Unsupported resume order: %s", CMD_ARGV[0]);
riscv.c:2777	LOG_ERROR("Command takes at most two arguments");
riscv.c:2800	LOG_ERROR("Command takes exactly 1 parameter");
riscv.c:2810	LOG_ERROR("Command takes exactly 1 parameter");
riscv.c:2820	LOG_ERROR("Command takes exactly 1 parameter");
riscv.c:2830	LOG_ERROR("Command takes exactly 1 parameter");
riscv.c:3178	LOG_ERROR("Hart isn't halted before single step!");
riscv.c:3188	LOG_ERROR("Hart was not halted after single step!");
riscv.c:3385	LOG_ERROR("Hart is not halted!");
riscv.c:3705	LOG_ERROR("Reading register %s not supported on this RISC-V target.",
riscv.c:3759	LOG_ERROR("Writing register %s not supported on this RISC-V target.",
riscv_semihosting.c:134	LOG_ERROR("Failed semihosting operation (0x%02X)", semihosting->op);
rlink.c:310	LOG_ERROR("Malformed DTC image");
rlink.c:319	LOG_ERROR("Malformed DTC image");
rlink.c:382	LOG_ERROR("Invalid DTC image record type: 0x%02x", header->type);
rlink.c:512	LOG_ERROR("too many retries waiting for DTC status");
rlink.c:528	LOG_ERROR("Read of endpoint 2 returned %d, expected %d",
rlink.c:651	LOG_ERROR("dtc_run_download: %s", libusb_error_name(usb_err));
rlink.c:850	LOG_ERROR("BUG: %i is not a valid end state", state);
rlink.c:883	LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
rlink.c:935	LOG_ERROR("%s", libusb_error_name(usb_err));
rlink.c:946	LOG_ERROR("%s", libusb_error_name(usb_err));
rlink.c:971	LOG_ERROR("%s", libusb_error_name(usb_err));
rlink.c:982	LOG_ERROR("%s", libusb_error_name(usb_err));
rlink.c:1002	LOG_ERROR("%s", libusb_error_name(usb_err));
rlink.c:1013	LOG_ERROR("%s", libusb_error_name(usb_err));
rlink.c:1034	LOG_ERROR("scan_size cannot be less than 1 bit");
rlink.c:1138	LOG_ERROR("enqueuing DTC reply entry: %s", strerror(errno));
rlink.c:1195	LOG_ERROR("enqueuing DTC reply entry: %s", strerror(errno));
rlink.c:1244	LOG_ERROR("enqueuing DTC reply entry: %s", strerror(errno));
rlink.c:1345	LOG_ERROR("BUG: unknown JTAG command type encountered");
rlink.c:1385	LOG_ERROR(
rlink.c:1393	LOG_ERROR("starting DTC: %s", libusb_error_name(ret));
rlink.c:1401	LOG_ERROR("%d is not a supported speed", speed);
rlink.c:1416	LOG_ERROR("%d is not a supported speed", speed);
rlink.c:1425	LOG_ERROR("RCLK not supported");
rlink.c:1456	LOG_ERROR("error %d getting device descriptor", r);
rlink.c:1461	LOG_ERROR("Whoops! NumConfigurations is not 1, don't know what to do...");
rlink.c:1467	LOG_ERROR("Whoops! NumInterfaces is not 1, don't know what to do...");
rlink.c:1480	LOG_ERROR("usb_claim_interface: %s", libusb_error_name(i));
rlink.c:1483	LOG_ERROR("detach kernel driver: %s", libusb_error_name(j));
rlink.c:1491	LOG_ERROR("Initialisation failed.");
rlink.c:1495	LOG_ERROR("Failed to set interface.");
rlink.c:1514	LOG_ERROR("USB write error: %s", libusb_error_name(j));
rlink.c:1528	LOG_ERROR("USB read error: %s", libusb_error_name(j));
rp2040.c:67	LOG_ERROR("Incorrect RP2040 BOOT ROM version");
rp2040.c:69	LOG_ERROR("RP2040 BOOT ROM not found");
rp2040.c:101	LOG_ERROR("no stack for flash programming code");
rp2040.c:142	LOG_ERROR("Failed to invoke ROM function @0x%" PRIx16, func_offset);
rp2040.c:164	LOG_ERROR("Failed to flush flash cache");
rp2040.c:171	LOG_ERROR("Failed to set SSI to XIP mode");
rp2040.c:193	LOG_ERROR("Could not allocate stack for flash programming code");
rp2040.c:200	LOG_ERROR("Failed to connect internal flash");
rp2040.c:207	LOG_ERROR("Failed to exit flash XIP mode");
rp2040.c:222	LOG_ERROR("Target not halted");
rp2040.c:239	LOG_ERROR("Could not allocate bounce buffer for flash programming. Can't continue");
rp2040.c:250	LOG_ERROR("Could not load data into target bounce buffer");
rp2040.c:261	LOG_ERROR("Failed to invoke flash programming code on target");
rp2040.c:284	LOG_ERROR("Target not halted");
rp2040.c:374	LOG_ERROR("SSEL inactive failed");
rp2040.c:385	LOG_ERROR("Target not halted");
rp2040.c:391	LOG_ERROR("Debug trampoline not found in RP2040 ROM.");
rp2040.c:398	LOG_ERROR("Debug trampoline end not found in RP2040 ROM.");
rp2040.c:405	LOG_ERROR("Function FUNC_FLASH_EXIT_XIP not found in RP2040 ROM.");
rp2040.c:411	LOG_ERROR("Function FUNC_CONNECT_INTERNAL_FLASH not found in RP2040 ROM.");
rp2040.c:417	LOG_ERROR("Function FUNC_FLASH_RANGE_ERASE not found in RP2040 ROM.");
rp2040.c:423	LOG_ERROR("Function FUNC_FLASH_RANGE_PROGRAM not found in RP2040 ROM.");
rp2040.c:429	LOG_ERROR("Function FUNC_FLASH_FLUSH_CACHE not found in RP2040 ROM.");
rp2040.c:435	LOG_ERROR("Function FUNC_FLASH_ENTER_CMD_XIP not found in RP2040 ROM.");
rp2040.c:466	LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", device_id);
rs14100.c:74	LOG_ERROR("not enough memory");
rs14100.c:93	LOG_ERROR("Target not halted");
rs14100.c:174	LOG_ERROR("Error executing flash init algorithm");
rs14100.c:193	LOG_ERROR("Target not halted");
rs14100.c:199	LOG_ERROR("Flash sector invalid");
rs14100.c:205	LOG_ERROR("Flash bank not probed");
rs14100.c:287	LOG_ERROR("Error executing flash erase algorithm");
rs14100.c:361	LOG_ERROR("In Auto-Probe...");
rs14100.c:428	LOG_ERROR("Target not halted");
rs14100.c:546	LOG_ERROR("Error executing flash write algorithm");
rsl10.c:143	LOG_ERROR("Target not halted");
rsl10.c:268	LOG_ERROR("This is not supported (RSL10) device, use other flash driver!!!");
rsl10.c:349	LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
rsl10.c:384	LOG_ERROR("RSL10 ERASE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
rsl10.c:412	LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
rsl10.c:427	LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
rsl10.c:481	LOG_ERROR("RSL10 WRITE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
rsl10.c:507	LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
rsl10.c:541	LOG_ERROR("RSL10 MASS ERASE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
rsl10.c:634	LOG_ERROR("Invalid bank address " TARGET_ADDR_FMT, bank->base);
rtkernel.c:109	LOG_ERROR("Error growing memory to %d threads", new_thread_count);
rtkernel.c:121	LOG_ERROR("Could not read task name pointer from target");
rtkernel.c:127	LOG_ERROR("Error reading task name from target");
rtkernel.c:142	LOG_ERROR("Could not read task state from target");
rtkernel.c:196	LOG_ERROR("Could not read task magic from target");
rtkernel.c:200	LOG_ERROR("Invalid task found (magic=0x%" PRIx32 ")", magic);
rtkernel.c:214	LOG_ERROR("No symbols for rt-kernel");
rtkernel.c:224	LOG_ERROR("Error reading current task");
rtkernel.c:231	LOG_ERROR("Current task is invalid");
rtkernel.c:243	LOG_ERROR("Could not read rt-kernel data structure from target");
rtkernel.c:256	LOG_ERROR("Invalid task found");
rtkernel.c:262	LOG_ERROR("Could not add task to rtos system");
rtkernel.c:288	LOG_ERROR("Error reading stack pointer from rtkernel thread");
rtkernel.c:308	LOG_ERROR("Could not read CPACR register to check FPU state");
rtkernel.c:371	LOG_ERROR("Could not find target in rt-kernel compatibility list");
rtos.c:312	LOG_ERROR("ERROR: RTOS symbol '%s%s' name is too long for GDB!", next_sym->symbol_name, next_suffix);
rtos.c:527	LOG_ERROR("RTOS: failed to get register %d", reg_num);
rtos.c:536	LOG_ERROR("RTOS: failed to get register list");
rtos.c:576	LOG_ERROR("RTOS: failed to get register list");
rtos.c:611	LOG_ERROR("Error: null stack pointer in thread");
rtos.c:626	LOG_ERROR("Error reading stack frame from thread");
rtt.c:93	LOG_ERROR("rtt: Invalid control block ID");
rtt.c:170	LOG_ERROR("rtt: Not configured");
rtt.c:193	LOG_ERROR("rtt: Failed to read down-channel %u description",
rtt.c:296	LOG_ERROR("rtt: Failed to read channel %u description",
rtt.c:385	LOG_ERROR("rtt: Failed to read up-channel %zu description", i);
rtt.c:403	LOG_ERROR("rtt: Failed to read from up-channel %zu", i);
rtt_server.c:45	LOG_ERROR("Failed to write data to socket.");
rtt_server.c:100	LOG_ERROR("error during read: %s", strerror(errno));
rtt_server.c:140	LOG_ERROR("Out of memory");
s3c2410.c:50	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c2410.c:63	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c2410.c:77	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c2440.c:56	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c2440.c:85	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c2440.c:119	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c24xx.c:27	LOG_ERROR("no memory for nand controller");
s3c24xx.c:43	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c24xx.c:58	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c24xx.c:72	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c24xx.c:86	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
s3c24xx.c:100	LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
semihosting_common.c:111	LOG_ERROR("out of memory");
semihosting_common.c:119	LOG_ERROR("out of memory");
semihosting_common.c:205	LOG_ERROR("No connected TCP client for semihosting");
semihosting_common.c:235	LOG_ERROR("No connected TCP client for semihosting");
semihosting_common.c:1087	LOG_ERROR("SYS_READC not supported by semihosting fileio");
semihosting_common.c:1514	LOG_ERROR("Failed to read fields for user defined command"
semihosting_common.c:1523	LOG_ERROR("The maximum length for user defined command "
semihosting_common.c:1539	LOG_ERROR("Failed to read from target, semihosting op=0x%x (%s)",
semihosting_common.c:1638	LOG_ERROR("Failed to post semihosting result");
semihosting_common.c:1792	LOG_ERROR("error during read: %s", strerror(errno));
semihosting_common.c:1839	LOG_ERROR("No target selected");
semihosting_common.c:1855	LOG_ERROR("Target not examined yet");
semihosting_common.c:1860	LOG_ERROR("Failed to Configure semihosting");
semihosting_common.c:1880	LOG_ERROR("No target selected");
semihosting_common.c:1931	LOG_ERROR("Failed to allocate semihosting TCP service.");
semihosting_common.c:1939	LOG_ERROR("Out of memory");
semihosting_common.c:1948	LOG_ERROR("failed to initialize %s", service->name);
semihosting_common.c:1965	LOG_ERROR("No target selected");
semihosting_common.c:1996	LOG_ERROR("No target selected");
semihosting_common.c:2028	LOG_ERROR("No target selected");
semihosting_common.c:2062	LOG_ERROR("semihosting not yet enabled for current target");
semihosting_common.c:2067	LOG_ERROR("This command is usable only from a registered user "
semihosting_common.c:2085	LOG_ERROR("No target selected");
server.c:95	LOG_ERROR("attempted '%s' connection rejected", service->name);
server.c:115	LOG_ERROR("attempted '%s' connection rejected", service->name);
server.c:129	LOG_ERROR("could not open %s", service->port);
server.c:138	LOG_ERROR("attempted '%s' connection rejected", service->name);
server.c:237	LOG_ERROR("error creating socket: %s", strerror(errno));
server.c:258	LOG_ERROR("couldn't resolve bindto address: %s", bindto_name);
server.c:268	LOG_ERROR("couldn't bind %s to socket on port %d: %s", c->name, c->portnumber, strerror(errno));
server.c:288	LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
server.c:318	LOG_ERROR("Named pipes currently not supported under this os");
server.c:496	LOG_ERROR("error during select: %s", strerror(errno));
server.c:646	LOG_ERROR("Failed to Open Winsock");
sfdp.c:82	LOG_ERROR("access protocol 0x%02x not implemented",
sfdp.c:92	LOG_ERROR("not enough memory");
sfdp.c:112	LOG_ERROR("not enough memory");
sfdp.c:128	LOG_ERROR("id=0x%04" PRIx16 " invalid length %d", id, words);
sfdp.c:190	LOG_ERROR("device needs paging - not implemented");
sfdp.c:231	LOG_ERROR("parameter table id=0x%04" PRIx16 " invalid length %d", id, words);
sfdp.c:243	LOG_ERROR("incomplete/invalid SFDP");
sh_qspi.c:288	LOG_ERROR("timeout");
sh_qspi.c:409	LOG_ERROR("timeout");
sh_qspi.c:451	LOG_ERROR("Target not halted");
sh_qspi.c:456	LOG_ERROR("Flash sector invalid");
sh_qspi.c:461	LOG_ERROR("Flash bank not probed");
sh_qspi.c:470	LOG_ERROR("Flash sector %u protected", sector);
sh_qspi.c:502	LOG_ERROR("Target not halted");
sh_qspi.c:512	LOG_ERROR("sh_qspi_write_page: unaligned write address: %08" PRIx32,
sh_qspi.c:526	LOG_ERROR("Flash sector %u protected", sector);
sh_qspi.c:535	LOG_ERROR("Target not halted");
sh_qspi.c:571	LOG_ERROR("error executing SH QSPI flash IO algorithm");
sh_qspi.c:606	LOG_ERROR("Target not halted");
sh_qspi.c:639	LOG_ERROR("error executing SH QSPI flash IO algorithm");
sh_qspi.c:669	LOG_ERROR("Target not halted");
sh_qspi.c:680	LOG_ERROR("No SPI flash found");
sh_qspi.c:769	LOG_ERROR("Device ID 0x%" PRIx32 " is not known",
sh_qspi.c:799	LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
sh_qspi.c:820	LOG_ERROR("not enough memory");
sh_qspi.c:884	LOG_ERROR("Unknown arg: %s", CMD_ARGV[6]);
sh_qspi.c:890	LOG_ERROR("not enough memory");
sim3x.c:266	LOG_ERROR("timed out waiting for FLASHCTRL0_CONFIG_BUSYF");
sim3x.c:280	LOG_ERROR("Target not halted");
sim3x.c:290	LOG_ERROR("Failed to init MCU");
sim3x.c:325	LOG_ERROR("timed out waiting for FLASHCTRL0_CONFIG_BUSYF");
sim3x.c:449	LOG_ERROR("flash write failed at address 0x%"PRIx32,
sim3x.c:476	LOG_ERROR("Target not halted");
sim3x.c:483	LOG_ERROR("Flash is locked");
sim3x.c:495	LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
sim3x.c:505	LOG_ERROR("odd number of bytes to write and no memory "
sim3x.c:529	LOG_ERROR("Can not read Lock Word");
sim3x.c:546	LOG_ERROR("Target not halted");
sim3x.c:574	LOG_ERROR("Target not halted");
sim3x.c:579	LOG_ERROR("Flash does not support finer granularity");
sim3x.c:613	LOG_ERROR("Flash lock error");
sim3x.c:618	LOG_ERROR("Flash unlock error");
sim3x.c:703	LOG_ERROR("Unknown Part number %d", sim3x_info->part_number);
sim3x.c:722	LOG_ERROR("Unsupported MCU family %c", sim3x_info->part_family);
sim3x.c:741	LOG_ERROR("Failed to read CPU ID");
sim3x.c:746	LOG_ERROR("Target is not Cortex-M3");
sim3x.c:755	LOG_ERROR("Failed to parse info from MCU");
sim3x.c:763	LOG_ERROR("Flash size not set in the flash bank command");
sim3x.c:943	LOG_ERROR("mass_erase can't be used by this debug interface");
sim3x.c:952	LOG_ERROR("Wrong SIM3X_AP_ID");
sim3x.c:996	LOG_ERROR("Target is not ARM Cortex-M3 or is already locked");
sim3x.c:1006	LOG_ERROR("Wrong SIM3X_AP_ID");
sim3x.c:1023	LOG_ERROR("Target doesn't seem to be locked but memory was not read correct");
sim3x.c:1052	LOG_ERROR("Target is unlocked by firmware and can't by locked again without the lock page erase or mass erase");
sim3x.c:1055	LOG_ERROR("Unexpected lock word value");
stellaris.c:836	LOG_ERROR("Target not halted");
stellaris.c:893	LOG_ERROR("Target not halted");
stellaris.c:898	LOG_ERROR("Hardware doesn't support page-level unprotect. "
stellaris.c:909	LOG_ERROR("DustDevil A0 parts can't be unprotected, see errata; refusing to proceed");
stellaris.c:914	LOG_ERROR("Can't protect unaligned pages");
stellaris.c:1088	LOG_ERROR("error %d executing stellaris flash write algorithm", retval);
stellaris.c:1114	LOG_ERROR("Target not halted");
stellaris.c:1156	LOG_ERROR("flash writing failed with CRIS: 0x%" PRIx32 "", flash_cris);
stellaris.c:1259	LOG_ERROR("Target not halted");
stellaris.c:1353	LOG_ERROR("Can't recover Stellaris flash without SRST");
stlink_usb.c:869	LOG_ERROR("bulk trace read failed");
stlink_usb.c:925	LOG_ERROR("failed to send USB CMD");
stlink_usb.c:960	LOG_ERROR("failed to receive USB CMD response");
stlink_usb.c:972	LOG_ERROR("TCP error status 0x%X", tcp_ss);
stlink_usb.c:1013	LOG_ERROR("STLINK_TCP command buffer overflow");
stlink_usb.c:1020	LOG_ERROR("STLINK_TCP data buffer overflow");
stlink_usb.c:1754	LOG_ERROR("voltage check failed");
stlink_usb.c:1760	LOG_ERROR("target voltage may be too low for reliable debugging");
stlink_usb.c:1770	LOG_ERROR("selected mode (transport) not supported");
stlink_usb.c:2267	LOG_ERROR("Tracing is not supported by this version.");
stlink_usb.c:3032	LOG_ERROR("Unable to set adapter speed");
stlink_usb.c:3095	LOG_ERROR("Unable to set adapter speed");
stlink_usb.c:3118	LOG_ERROR("Unable to set adapter speed");
stlink_usb.c:3142	LOG_ERROR("Unknown command");
stlink_usb.c:3176	LOG_ERROR("Unknown command");
stlink_usb.c:3205	LOG_ERROR("Unable to set adapter speed");
stlink_usb.c:3281	LOG_ERROR("cannot close the STLINK");
stlink_usb.c:3285	LOG_ERROR("error closing the socket, errno: %s", strerror(errno));
stlink_usb.c:3338	LOG_ERROR("libusb_get_string_descriptor() failed: %s(%d)",
stlink_usb.c:3343	LOG_ERROR("could not get the LANGID");
stlink_usb.c:3356	LOG_ERROR("libusb_get_string_descriptor() failed: %s(%d)",
stlink_usb.c:3360	LOG_ERROR("invalid string in ST-LINK USB serial descriptor");
stlink_usb.c:3369	LOG_ERROR("unexpected serial length (%d) in descriptor", len);
stlink_usb.c:3411	LOG_ERROR("open failed");
stlink_usb.c:3470	LOG_ERROR("read version failed");
stlink_usb.c:3475	LOG_ERROR("release interface failed");
stlink_usb.c:3481	LOG_ERROR("reset device failed");
stlink_usb.c:3506	LOG_ERROR("stlink-server does not support SWIM mode");
stlink_usb.c:3530	LOG_ERROR("error creating the socket, errno: %s", strerror(errno));
stlink_usb.c:3544	LOG_ERROR("cannot set sock option 'TCP_NODELAY', errno: %s", strerror(errno));
stlink_usb.c:3550	LOG_ERROR("cannot set sock option 'SO_RCVBUF', errno: %s", strerror(errno));
stlink_usb.c:3556	LOG_ERROR("cannot set sock option 'SO_SNDBUF', errno: %s", strerror(errno));
stlink_usb.c:3561	LOG_ERROR("cannot connect to stlink server, errno: %s", strerror(errno));
stlink_usb.c:3575	LOG_ERROR("cannot get the stlink-server version");
stlink_usb.c:3610	LOG_ERROR("no ST-LINK detected");
stlink_usb.c:3683	LOG_ERROR("ST-LINK open failed (vid/pid mismatch)");
stlink_usb.c:3688	LOG_ERROR("ST-LINK open failed (serial mismatch)");
stlink_usb.c:3694	LOG_ERROR("the selected device is already used");
stlink_usb.c:3779	LOG_ERROR("mode (transport) not supported by device");
stlink_usb.c:3787	LOG_ERROR("init mode failed (unable to connect to the target)");
stlink_usb.c:3794	LOG_ERROR("stlink_swim_enter_failed (unable to connect to the target)");
stlink_usb.c:3845	LOG_ERROR("The attached ST-LINK version doesn't support trace");
stlink_usb.c:3858	LOG_ERROR("The attached ST-LINK version doesn't support this trace mode");
stlink_usb.c:3867	LOG_ERROR("ST-LINK doesn't support SWO frequency higher than %u",
stlink_usb.c:3877	LOG_ERROR("SWO frequency is not suitable. Please choose a different "
stlink_usb.c:3886	LOG_ERROR("SWO frequency is not suitable. Please choose a different "
stlink_usb.c:4263	LOG_ERROR("Banked DP registers not supported in current STLink FW");
stlink_usb.c:4291	LOG_ERROR("Banked DP registers not supported in current STLink FW");
stlink_usb.c:4320	LOG_ERROR("ADIv6 dap not supported by stlink dap-direct mode");
stlink_usb.c:4346	LOG_ERROR("ADIv6 dap not supported by stlink dap-direct mode");
stlink_usb.c:4427	LOG_ERROR("unknown/unexpected STLINK status code 0x%x", errcode);
stlink_usb.c:4436	LOG_ERROR("unknown/unexpected STLINK status code 0x%x", errcode);
stlink_usb.c:4448	LOG_ERROR("unknown/unexpected STLINK status code 0x%x", errcode);
stlink_usb.c:4653	LOG_ERROR("ST-Link: Unknown queue command %d", q->cmd);
stlink_usb.c:4692	LOG_ERROR("Fail reading CTRL/STAT register. Force reconnect");
stlink_usb.c:4730	LOG_ERROR("Error closing APs");
stlink_usb.c:4811	LOG_ERROR("ST-Link: Unsupported CSW size %d", ap->csw_value & CSW_SIZE_MASK);
stlink_usb.c:4877	LOG_ERROR("ST-Link: Unsupported CSW size %d", ap->csw_value & CSW_SIZE_MASK);
stlink_usb.c:5050	LOG_ERROR("max %x byte sent and %d received", STLINK_SG_SIZE, STLINK_DATA_SIZE);
stlink_usb.c:5064	LOG_ERROR("Error %d", retval);
stlink_usb.c:5136	LOG_ERROR("Unsupported transport");
stlink_usb.c:5146	LOG_ERROR("ST-Link version does not support DAP direct transport");
stlink_usb.c:5173	LOG_ERROR("RTCK not supported. Set nonzero adapter_khz.");
stlink_usb.c:5186	LOG_ERROR("RCLK not supported");
stm32f1x.c:177	LOG_ERROR("timed out waiting for flash");
stm32f1x.c:184	LOG_ERROR("stm32x device protected");
stm32f1x.c:189	LOG_ERROR("stm32x device programming failed / flash not erased");
stm32f1x.c:211	LOG_ERROR("Option byte operations must use bank 0");
stm32f1x.c:372	LOG_ERROR("Target not halted");
stm32f1x.c:421	LOG_ERROR("Target not halted");
stm32f1x.c:431	LOG_ERROR("stm32x failed to erase options");
stm32f1x.c:530	LOG_ERROR("flash write failed just before address 0x%"PRIx32,
stm32f1x.c:616	LOG_ERROR("Failed to execute algorithm at 0x%" TARGET_PRIxADDR ": %d",
stm32f1x.c:626	LOG_ERROR("flash write failed at address 0x%"PRIx32,
stm32f1x.c:698	LOG_ERROR("Target not halted");
stm32f1x.c:742	LOG_ERROR("Target not examined yet");
stm32f1x.c:777	LOG_ERROR("Cannot identify target as a stm32x");
stm32f1x.c:1341	LOG_ERROR("Target not halted");
stm32f1x.c:1382	LOG_ERROR("Target not halted");
stm32f1x.c:1426	LOG_ERROR("Target not halted");
stm32f1x.c:1493	LOG_ERROR("Target not halted");
stm32f1x.c:1580	LOG_ERROR("Command not applicable to stm32f1x devices - power cycle is "
stm32f1x.c:1588	LOG_ERROR("Target not halted");
stm32f1x.c:1619	LOG_ERROR("Target not halted");
stm32f2x.c:288	LOG_ERROR("timed out waiting for flash");
stm32f2x.c:296	LOG_ERROR("stm32x device protected");
stm32f2x.c:341	LOG_ERROR("flash not unlocked STM32_FLASH_CR: 0x%" PRIx32, ctrl);
stm32f2x.c:373	LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: 0x%" PRIx32, ctrl);
stm32f2x.c:599	LOG_ERROR("Cannot erase OTP memory");
stm32f2x.c:606	LOG_ERROR("Target not halted");
stm32f2x.c:661	LOG_ERROR("Target not halted");
stm32f2x.c:667	LOG_ERROR("OTP protection can only be enabled");
stm32f2x.c:712	LOG_ERROR("OTP memory bank is disabled for write commands.");
stm32f2x.c:772	LOG_ERROR("error executing stm32x flash write algorithm");
stm32f2x.c:777	LOG_ERROR("flash memory write protected");
stm32f2x.c:780	LOG_ERROR("flash write failed = 0x%08" PRIx32, error);
stm32f2x.c:810	LOG_ERROR("Target not halted");
stm32f2x.c:1013	LOG_ERROR("Target not examined yet");
stm32f2x.c:1516	LOG_ERROR("Target not halted");
stm32g0x.c:211	LOG_ERROR("timed out waiting for flash");
stm32g0x.c:218	LOG_ERROR("stm32x device protected");
stm32g0x.c:223	LOG_ERROR("stm32x device programming failed");
stm32g0x.c:319	LOG_ERROR("working area required to erase options bytes");
stm32g0x.c:427	LOG_ERROR("Target not halted");
stm32g0x.c:447	LOG_ERROR("Target not halted");
stm32g0x.c:452	LOG_ERROR("Invalid memory range");
stm32g0x.c:531	LOG_ERROR("flash write failed at address 0x%"PRIx32,
stm32g0x.c:535	LOG_ERROR("flash memory not erased before writing");
stm32g0x.c:541	LOG_ERROR("flash memory write protected");
stm32g0x.c:567	LOG_ERROR("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
stm32g0x.c:579	LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
stm32g0x.c:645	LOG_ERROR("Target not halted");
stm32g0x.c:674	LOG_ERROR("Cannot identify target as a stm32g0x");
stm32g0x.c:699	LOG_ERROR("Cannot identify target as a stm32g0x");
stm32g0x.c:881	LOG_ERROR("Target not halted");
stm32g0x.c:913	LOG_ERROR("Target not halted");
stm32g0x.c:947	LOG_ERROR("Target not halted");
stm32g0x.c:1000	LOG_ERROR("Target not halted");
stm32g0x.c:1112	LOG_ERROR("Target not halted");
stm32g0x.c:1175	LOG_ERROR("Target not halted");
stm32g4x.c:391	LOG_ERROR("timed out waiting for flash");
stm32g4x.c:399	LOG_ERROR("stm32x device protected");
stm32g4x.c:444	LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
stm32g4x.c:476	LOG_ERROR("options not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
stm32g4x.c:571	LOG_ERROR("Target not halted");
stm32g4x.c:625	LOG_ERROR("Target not halted");
stm32g4x.c:723	LOG_ERROR("error executing stm32l4 flash write algorithm");
stm32g4x.c:728	LOG_ERROR("flash memory write protected");
stm32g4x.c:731	LOG_ERROR("flash write failed = %08" PRIx32, error);
stm32g4x.c:756	LOG_ERROR("Target not halted");
stm32g4x.c:884	LOG_ERROR("failed to allocate bank sectors");
stm32g4x.c:951	LOG_ERROR("Target not halted");
stm32g4x.c:1107	LOG_ERROR("Target not halted");
stm32g4x.c:1135	LOG_ERROR("Target not halted");
stm32h7x.c:242	LOG_ERROR("error while reading from address 0x%" PRIx32, reg_addr);
stm32h7x.c:253	LOG_ERROR("error while writing to address 0x%" PRIx32, reg_addr);
stm32h7x.c:278	LOG_ERROR("wait_flash_op_queue, time out expired, status: 0x%" PRIx32, status);
stm32h7x.c:285	LOG_ERROR("wait_flash_op_queue, WRPERR detected");
stm32h7x.c:327	LOG_ERROR("flash not unlocked STM32_FLASH_CRx: 0x%" PRIx32, ctrl);
stm32h7x.c:358	LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: 0x%" PRIx32, ctrl);
stm32h7x.c:405	LOG_ERROR("stm32x_options_program: failed to read FLASH_OPTSR_CUR");
stm32h7x.c:412	LOG_ERROR("waiting for OBL launch, time out expired, OPTSR: 0x%" PRIx32, status);
stm32h7x.c:421	LOG_ERROR("error changing option bytes (OPTCHANGEERR=1)");
stm32h7x.c:428	LOG_ERROR("error during the lock of flash options");
stm32h7x.c:494	LOG_ERROR("Error erase sector %u", i);
stm32h7x.c:500	LOG_ERROR("Error erase sector %u", i);
stm32h7x.c:506	LOG_ERROR("erase time-out or operation error sector %u", i);
stm32h7x.c:514	LOG_ERROR("error during the lock of flash");
stm32h7x.c:527	LOG_ERROR("Target not halted");
stm32h7x.c:634	LOG_ERROR("error executing stm32h7x flash write algorithm");
stm32h7x.c:639	LOG_ERROR("flash memory write protected");
stm32h7x.c:642	LOG_ERROR("flash write failed, FLASH_SR = 0x%08" PRIx32, flash_sr);
stm32h7x.c:670	LOG_ERROR("Target not halted");
stm32h7x.c:735	LOG_ERROR("error during the lock of flash");
stm32h7x.c:760	LOG_ERROR("Target not examined yet");
stm32h7x.c:833	LOG_ERROR("unsupported device");
stm32h7x.c:840	LOG_ERROR("STM32H7 flash bank base address config is incorrect. "
stm32h7x.c:848	LOG_ERROR("this device has a single bank only");
stm32h7x.c:851	LOG_ERROR("STM32H7 flash bank base address config is incorrect. "
stm32h7x.c:887	LOG_ERROR("failed to allocate bank sectors");
stm32h7x.c:904	LOG_ERROR("failed to allocate bank prot_block");
stm32h7x.c:966	LOG_ERROR("Target not halted");
stm32h7x.c:1050	LOG_ERROR("Target not halted");
stm32h7x.c:1076	LOG_ERROR("error during the lock of flash");
stm32l4x.c:882	LOG_ERROR("timed out waiting for flash");
stm32l4x.c:889	LOG_ERROR("stm32x device protected");
stm32l4x.c:985	LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
stm32l4x.c:1018	LOG_ERROR("options not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
stm32l4x.c:1241	LOG_ERROR("cannot erase OTP memory");
stm32l4x.c:1246	LOG_ERROR("Target not halted");
stm32l4x.c:1380	LOG_ERROR("cannot set the requested protection "
stm32l4x.c:1407	LOG_ERROR("cannot protect/unprotect OTP memory");
stm32l4x.c:1412	LOG_ERROR("Target not halted");
stm32l4x.c:1483	LOG_ERROR("allocating working area failed");
stm32l4x.c:1531	LOG_ERROR("error executing stm32l4 flash write algorithm");
stm32l4x.c:1538	LOG_ERROR("flash memory write protected");
stm32l4x.c:1541	LOG_ERROR("flash write failed = %08" PRIx32, error);
stm32l4x.c:1612	LOG_ERROR("OTP memory is disabled for write commands");
stm32l4x.c:1617	LOG_ERROR("Target not halted");
stm32l4x.c:1655	LOG_ERROR("write into gap from " TARGET_ADDR_FMT " to " TARGET_ADDR_FMT,
stm32l4x.c:1710	LOG_ERROR("block write failed");
stm32l4x.c:1736	LOG_ERROR("Flash requires Cortex-M target");
stm32l4x.c:1761	LOG_ERROR("can't get the device id");
stm32l4x.c:1796	LOG_ERROR("Target not examined yet");
stm32l4x.c:1802	LOG_ERROR("Flash requires Cortex-M target");
stm32l4x.c:1863	LOG_ERROR("BUG: device supported incomplete");
stm32l4x.c:1888	LOG_ERROR("failed to allocate bank sectors");
stm32l4x.c:1895	LOG_ERROR("invalid bank base address");
stm32l4x.c:2090	LOG_ERROR("unsupported device");
stm32l4x.c:2097	LOG_ERROR("The specified flash size is less than page size");
stm32l4x.c:2099	LOG_ERROR("Flash pages count cannot be zero");
stm32l4x.c:2137	LOG_ERROR("failed to allocate bank sectors");
stm32l4x.c:2210	LOG_ERROR("cannot erase OTP memory");
stm32l4x.c:2220	LOG_ERROR("Target not halted");
stm32l4x.c:2353	LOG_ERROR("This device does not have a TrustZone");
stm32l4x.c:2379	LOG_ERROR("TZEN can be set only when RDP level is 0");
stm32l4x.c:2388	LOG_ERROR("Deactivation of TZEN is only possible when the RDP is changing to level 0");
stm32l4x.c:2437	LOG_ERROR("cannot lock/unlock OTP memory");
stm32l4x.c:2444	LOG_ERROR("Target not halted");
stm32l4x.c:2472	LOG_ERROR("cannot lock/unlock OTP memory");
stm32l4x.c:2479	LOG_ERROR("Target not halted");
stm32l4x.c:2504	LOG_ERROR("OTP memory does not have write protection areas");
stm32l4x.c:2521	LOG_ERROR("this device has no second bank");
stm32l4x.c:2524	LOG_ERROR("this device is configured in single bank mode");
stm32l5x.c:251	LOG_ERROR("timed out waiting for flash");
stm32l5x.c:259	LOG_ERROR("stm32x device protected");
stm32l5x.c:305	LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
stm32l5x.c:338	LOG_ERROR("options not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
stm32l5x.c:436	LOG_ERROR("Target not halted");
stm32l5x.c:493	LOG_ERROR("Target not halted");
stm32l5x.c:576	LOG_ERROR("unknown STM32 family.");
stm32l5x.c:617	LOG_ERROR("error executing stm32l4 flash write algorithm");
stm32l5x.c:622	LOG_ERROR("flash memory write protected");
stm32l5x.c:625	LOG_ERROR("flash write failed = %08" PRIx32, error);
stm32l5x.c:651	LOG_ERROR("Target not halted");
stm32l5x.c:926	LOG_ERROR("Target not halted");
stm32l5x.c:1084	LOG_ERROR("Target not halted");
stm32l5x.c:1112	LOG_ERROR("Target not halted");
stm32lx.c:283	LOG_ERROR("failed to allocate bank structure");
stm32lx.c:394	LOG_ERROR("Target not halted");
stm32lx.c:433	LOG_ERROR("The offset must be %" PRIu32 "B-aligned but it is %" PRIi32 "B)", hp_nb, offset);
stm32lx.c:437	LOG_ERROR("The byte count must be %" PRIu32 "B-aligned but count is %" PRIu32 "B)", hp_nb, count);
stm32lx.c:504	LOG_ERROR("unable to get armv7m target");
stm32lx.c:620	LOG_ERROR("Target not halted");
stm32lx.c:625	LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-byte alignment", offset);
stm32lx.c:758	LOG_ERROR("Cannot identify target as an STM32 L0 or L1 family device.");
stm32lx.c:847	LOG_ERROR("failed to allocate bank sectors");
stm32lx.c:993	LOG_ERROR("PELOCK is not cleared :(");
stm32lx.c:1013	LOG_ERROR("PRGLOCK is not cleared :(");
stm32lx.c:1212	LOG_ERROR("timed out waiting for flash");
stm32lx.c:1219	LOG_ERROR("access denied / write protected");
stm32lx.c:1224	LOG_ERROR("invalid program address");
stm32lx.c:1263	LOG_ERROR("Target not halted");
stm32lx.c:1285	LOG_ERROR("Target not halted");
stm32lx.c:1313	LOG_ERROR("Target not halted");
stm8.c:311	LOG_ERROR("data hw breakpoints must be of same type");
stm8.c:673	LOG_ERROR("BUG: wrong mem_type %d", type);
stm8.c:1225	LOG_ERROR("unable to allocate reg type list");
stm8.c:1240	LOG_ERROR("unable to allocate feature list");
stm8.c:1386	LOG_ERROR("Can not find free breakpoint register (bpid: %" PRIu32 ")",
stm8.c:1419	LOG_ERROR("Unable to set breakpoint at address " TARGET_ADDR_FMT
stm8.c:1550	LOG_ERROR("Can not find free hw breakpoint");
stm8.c:1555	LOG_ERROR("Only watchpoints of length 1 are supported");
stm8.c:1572	LOG_ERROR("BUG: watchpoint->rw neither read, write nor access");
stm8.c:1696	LOG_ERROR("reconnect failed");
stm8.c:1703	LOG_ERROR("state query failed");
stm8.c:1730	LOG_ERROR("Erase value 0x%02" PRIx8 " not yet supported for STM8",
stm8.c:1836	LOG_ERROR("current target isn't a STM8 target");
stm8.c:1869	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
stm8.c:1874	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
stm8.c:1902	LOG_ERROR("BUG: register '%s' not found",
stm8.c:1908	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
stmqspi.c:219	LOG_ERROR("not enough memory");
stmqspi.c:257	LOG_ERROR("Timeout while polling BUSY");
stmqspi.c:414	LOG_ERROR("timeout");
stmqspi.c:467	LOG_ERROR("Cannot write enable flash1. Status=0x%02x",
stmqspi.c:476	LOG_ERROR("Cannot write enable flash2. Status=0x%02x",
stmqspi.c:509	LOG_ERROR("Target not halted");
stmqspi.c:514	LOG_ERROR("Flash bank not probed");
stmqspi.c:519	LOG_ERROR("Mass erase not available for this device");
stmqspi.c:525	LOG_ERROR("Flash sector %u protected", sector);
stmqspi.c:560	LOG_ERROR("Mass erase command not accepted by flash1. Status=0x%02x",
stmqspi.c:571	LOG_ERROR("Mass erase command not accepted by flash2. Status=0x%02x",
stmqspi.c:733	LOG_ERROR("FSIZE in DCR(1) doesn't match actual capacity.");
stmqspi.c:740	LOG_ERROR("not enough memory");
stmqspi.c:788	LOG_ERROR("at most %d bytes may be sent", max);
stmqspi.c:801	LOG_ERROR("Target not halted");
stmqspi.c:813	LOG_ERROR("number of data bytes to write must be even in dual mode");
stmqspi.c:821	LOG_ERROR("number of bytes to read must be even in dual mode");
stmqspi.c:826	LOG_ERROR("one cmd and up to four addr bytes must be send when reading");
stmqspi.c:967	LOG_ERROR("Sector erase command not accepted by flash1. Status=0x%02x",
stmqspi.c:979	LOG_ERROR("Sector erase command not accepted by flash2. Status=0x%02x",
stmqspi.c:1005	LOG_ERROR("Target not halted");
stmqspi.c:1010	LOG_ERROR("Flash bank not probed");
stmqspi.c:1015	LOG_ERROR("Sector erase not available for this device");
stmqspi.c:1020	LOG_ERROR("Flash sector invalid");
stmqspi.c:1026	LOG_ERROR("Flash sector %u protected", sector);
stmqspi.c:1040	LOG_ERROR("Flash sector_erase failed on sector %u", sector);
stmqspi.c:1079	LOG_ERROR("Target not halted");
stmqspi.c:1084	LOG_ERROR("Flash bank not probed");
stmqspi.c:1133	LOG_ERROR("Not enough working area, can't do QSPI blank check");
stmqspi.c:1142	LOG_ERROR("allocating working area failed");
stmqspi.c:1213	LOG_ERROR("corrupted blank check info");
stmqspi.c:1299	LOG_ERROR("Not enough working area, can't do QSPI verify");
stmqspi.c:1472	LOG_ERROR("not enough working area, can't do QSPI page reads/writes");
stmqspi.c:1482	LOG_ERROR("allocating working area failed");
stmqspi.c:1549	LOG_ERROR("flash %s failed at address 0x%" PRIx32 ", remaining 0x%" PRIx32,
stmqspi.c:1580	LOG_ERROR("Target not halted");
stmqspi.c:1585	LOG_ERROR("Flash bank not probed");
stmqspi.c:1623	LOG_ERROR("Target not halted");
stmqspi.c:1628	LOG_ERROR("Flash bank not probed");
stmqspi.c:1644	LOG_ERROR("Flash sector %u protected", sector);
stmqspi.c:1650	LOG_ERROR("In dual-QSPI and octal-DTR modes writes must be two byte aligned: "
stmqspi.c:1684	LOG_ERROR("Target not halted");
stmqspi.c:1689	LOG_ERROR("Flash bank not probed");
stmqspi.c:1699	LOG_ERROR("In dual-QSPI and octal-DTR modes reads must be two byte aligned: "
stmqspi.c:1950	LOG_ERROR("Target not halted");
stmqspi.c:2121	LOG_ERROR("No QSPI, no OCTOSPI at 0x%08" PRIx32, io_base);
stmqspi.c:2147	LOG_ERROR("No OCTOSPI at io_base 0x%08" PRIx32, io_base);
stmqspi.c:2156	LOG_ERROR("Only regular SPI protocol supported in OCTOSPI");
stmqspi.c:2173	LOG_ERROR("No QSPI at io_base 0x%08" PRIx32, io_base);
stmqspi.c:2261	LOG_ERROR("Incompatible flash1/flash2 devices");
stmqspi.c:2305	LOG_ERROR("Incompatible flash1/flash2 devices");
stmqspi.c:2331	LOG_ERROR("FSIZE in DCR(1) doesn't match actual capacity.");
stmqspi.c:2344	LOG_ERROR("not enough memory");
stmsmi.c:137	LOG_ERROR("not enough memory");
stmsmi.c:163	LOG_ERROR("Timeout while polling TFF");
stmsmi.c:216	LOG_ERROR("timeout");
stmsmi.c:250	LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32, status);
stmsmi.c:315	LOG_ERROR("Target not halted");
stmsmi.c:320	LOG_ERROR("Flash sector invalid");
stmsmi.c:325	LOG_ERROR("Flash bank not probed");
stmsmi.c:331	LOG_ERROR("Flash sector %u protected", sector);
stmsmi.c:397	LOG_ERROR("Target not halted");
stmsmi.c:414	LOG_ERROR("Flash sector %u protected", sector);
stmsmi.c:479	LOG_ERROR("Target not halted");
stmsmi.c:528	LOG_ERROR("Device ID 0x%" PRIx32 " is not known as SMI capable",
stmsmi.c:547	LOG_ERROR("Invalid SMI base address " TARGET_ADDR_FMT, bank->base);
stmsmi.c:570	LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
stmsmi.c:593	LOG_ERROR("not enough memory");
str7x.c:147	LOG_ERROR("BUG: unknown bank->size encountered");
str7x.c:209	LOG_ERROR("unknown STR7x variant: '%s'", CMD_ARGV[6]);
str7x.c:247	LOG_ERROR("Timed out waiting for str7x flash");
str7x.c:263	LOG_ERROR("str7x hw write protection set");
str7x.c:267	LOG_ERROR("str7x suspended program erase not resumed");
str7x.c:271	LOG_ERROR("str7x trying to set bit to 1 when it is already 0");
str7x.c:275	LOG_ERROR("str7x program error");
str7x.c:279	LOG_ERROR("str7x erase error");
str7x.c:285	LOG_ERROR("str7x write operation failed / bad setup");
str7x.c:301	LOG_ERROR("Target not halted");
str7x.c:331	LOG_ERROR("Target not halted");
str7x.c:380	LOG_ERROR("Target not halted");
str7x.c:558	LOG_ERROR("Target not halted");
str7x.c:725	LOG_ERROR("Target not halted");
str9x.c:97	LOG_ERROR("BUG: unknown bank->size encountered");
str9x.c:161	LOG_ERROR("Target not halted");
str9x.c:222	LOG_ERROR("Target not halted");
str9x.c:268	LOG_ERROR("erase timed out");
str9x.c:283	LOG_ERROR("error erasing flash bank, status: 0x%x", status);
str9x.c:303	LOG_ERROR("Target not halted");
str9x.c:417	LOG_ERROR("error executing str9x flash write algorithm");
str9x.c:457	LOG_ERROR("Target not halted");
str9x.c:493	LOG_ERROR("flash writing failed");
str9x.c:521	LOG_ERROR("write timed out");
str9x.c:562	LOG_ERROR("write timed out");
str9x.c:612	LOG_ERROR("Target not halted");
str9xpec.c:229	LOG_ERROR("BUG: unknown bank->size encountered");
svf.c:346	LOG_ERROR("SVF: can not move to %s", tap_state_name(state_to));
svf.c:493	LOG_ERROR("not enough memory");
svf.c:590	LOG_ERROR("fail to run command at line %d", svf_line_number);
svf.c:755	LOG_ERROR("not enough memory");
svf.c:789	LOG_ERROR("fail to parse svf command");
svf.c:844	LOG_ERROR("not enough memory");
svf.c:870	LOG_ERROR("fail to adjust length of array");
svf.c:894	LOG_ERROR("invalid hex string");
svf.c:920	LOG_ERROR("value exceeds length");
svf.c:937	LOG_ERROR("tdo check error at line %d",
svf.c:957	LOG_ERROR("toooooo many operation undone");
svf.c:1015	LOG_ERROR("invalid parameter of %s", argus[0]);
svf.c:1032	LOG_ERROR("%s: %s is not a stable state",
svf.c:1039	LOG_ERROR("invalid parameter of %s", argus[0]);
svf.c:1047	LOG_ERROR("HZ not found in FREQUENCY command");
svf.c:1099	LOG_ERROR("invalid parameter of %s", argus[0]);
svf.c:1122	LOG_ERROR("data section error");
svf.c:1144	LOG_ERROR("unknown parameter: %s", argus[i]);
svf.c:1150	LOG_ERROR("fail to parse hex value");
svf.c:1163	LOG_ERROR("fail to adjust length of array");
svf.c:1174	LOG_ERROR("fail to adjust length of array");
svf.c:1182	LOG_ERROR("fail to adjust length of array");
svf.c:1196	LOG_ERROR("not enough memory");
svf.c:1289	LOG_ERROR("not enough memory");
svf.c:1377	LOG_ERROR("PIO and PIOMAP are not supported");
svf.c:1385	LOG_ERROR("invalid parameter of %s", argus[0]);
svf.c:1406	LOG_ERROR("%s: %s is not a stable state", argus[0], tap_state_name(i_tmp));
svf.c:1418	LOG_ERROR("%s not supported for clock", argus[i + 1]);
svf.c:1445	LOG_ERROR("%s: %s is not a stable state", argus[0], tap_state_name(i_tmp));
svf.c:1487	LOG_ERROR("fail to parse parameter of RUNTEST, %d out of %d is parsed",
svf.c:1496	LOG_ERROR("invalid parameter of %s", argus[0]);
svf.c:1503	LOG_ERROR("not enough memory");
svf.c:1511	LOG_ERROR("%s: %s is not a valid state", argus[0], argus[i_tmp]);
svf.c:1537	LOG_ERROR("%s: %s is not a stable state",
svf.c:1556	LOG_ERROR("%s: %s is not a stable state",
svf.c:1565	LOG_ERROR("invalid parameter of %s", argus[0]);
svf.c:1587	LOG_ERROR("unknown TRST mode: %s", argus[1]);
svf.c:1593	LOG_ERROR("can not accept TRST command if trst_mode is ABSENT");
svf.c:1598	LOG_ERROR("invalid svf command: %s", argus[0]);
swim.c:65	LOG_ERROR("Out of memory");
swim.c:73	LOG_ERROR("Out of memory");
swm050.c:37	LOG_ERROR("Target not halted");
swm050.c:69	LOG_ERROR("Target not halted");
swm050.c:102	LOG_ERROR("Target not halted");
target.c:254	LOG_ERROR("Invalid debug reason: %d", (int)(t->debug_reason));
target.c:265	LOG_ERROR("Invalid target state: %d", (int)(t->state));
target.c:280	LOG_ERROR("Invalid target event: %d", (int)(event));
target.c:291	LOG_ERROR("Invalid target reset mode: %d", (int)(reset_mode));
target.c:463	LOG_ERROR("BUG: current_target out of bounds");
target.c:512	LOG_ERROR("Target not examined yet");
target.c:563	LOG_ERROR("Target not examined yet");
target.c:600	LOG_ERROR("invalid reset mode");
target.c:744	LOG_ERROR("Target not examined yet");
target.c:748	LOG_ERROR("Target %s does not support soft_reset_halt",
target.c:782	LOG_ERROR("Target not examined yet");
target.c:786	LOG_ERROR("Target type '%s' does not support %s",
target.c:823	LOG_ERROR("Target not examined yet");
target.c:827	LOG_ERROR("Target type '%s' does not support %s",
target.c:832	LOG_ERROR("Target is already running an algorithm");
target.c:867	LOG_ERROR("Target type '%s' does not support %s",
target.c:872	LOG_ERROR("Target is not running an algorithm");
target.c:971	LOG_ERROR("error starting target flash write algorithm");
target.c:982	LOG_ERROR("failed to get read pointer");
target.c:990	LOG_ERROR("flash write algorithm aborted by target");
target.c:996	LOG_ERROR("corrupted fifo read pointer 0x%" PRIx32, rp);
target.c:1021	LOG_ERROR("timeout waiting for algorithm, a target reset is recommended");
target.c:1074	LOG_ERROR("error waiting for target flash write algorithm");
target.c:1082	LOG_ERROR("flash write algorithm aborted by target");
target.c:1130	LOG_ERROR("error starting target flash read algorithm");
target.c:1137	LOG_ERROR("failed to get write pointer");
target.c:1145	LOG_ERROR("flash read algorithm aborted by target");
target.c:1151	LOG_ERROR("corrupted fifo write pointer 0x%" PRIx32, wp);
target.c:1173	LOG_ERROR("timeout waiting for algorithm, a target reset is recommended");
target.c:1228	LOG_ERROR("error waiting for target flash write algorithm");
target.c:1236	LOG_ERROR("flash read algorithm aborted by target");
target.c:1248	LOG_ERROR("Target not examined yet");
target.c:1252	LOG_ERROR("Target %s doesn't support read_memory", target_name(target));
target.c:1262	LOG_ERROR("Target not examined yet");
target.c:1266	LOG_ERROR("Target %s doesn't support read_phys_memory", target_name(target));
target.c:1276	LOG_ERROR("Target not examined yet");
target.c:1280	LOG_ERROR("Target %s doesn't support write_memory", target_name(target));
target.c:1290	LOG_ERROR("Target not examined yet");
target.c:1294	LOG_ERROR("Target %s doesn't support write_phys_memory", target_name(target));
target.c:1382	LOG_ERROR("Target not examined yet");
target.c:1502	LOG_ERROR("target '%s' init failed", target_name(target));
target.c:1511	LOG_ERROR("type '%s' is missing virt2phys", target_name(target));
target.c:1634	LOG_ERROR("error allocating buffer for reset callback entry");
target.c:1656	LOG_ERROR("error allocating buffer for trace callback entry");
target.c:1994	LOG_ERROR("No working memory available. "
target.c:2005	LOG_ERROR("No working memory available. "
target.c:2088	LOG_ERROR("failed to restore %" PRIu32 " bytes of working area at address " TARGET_ADDR_FMT,
target.c:2358	LOG_ERROR("Target not examined yet");
target.c:2367	LOG_ERROR("address + size wrapped (" TARGET_ADDR_FMT ", 0x%08" PRIx32 ")",
target.c:2423	LOG_ERROR("Target not examined yet");
target.c:2432	LOG_ERROR("address + size wrapped (" TARGET_ADDR_FMT ", 0x%08" PRIx32 ")",
target.c:2484	LOG_ERROR("Target not examined yet");
target.c:2488	LOG_ERROR("Target %s doesn't support checksum_memory", target_name(target));
target.c:2496	LOG_ERROR("error allocating buffer for section (%" PRIu32 " bytes)", size);
target.c:2526	LOG_ERROR("Target not examined yet");
target.c:2540	LOG_ERROR("Target not examined yet");
target.c:2564	LOG_ERROR("Target not examined yet");
target.c:2588	LOG_ERROR("Target not examined yet");
target.c:2611	LOG_ERROR("Target not examined yet");
target.c:2635	LOG_ERROR("Target not examined yet");
target.c:2656	LOG_ERROR("Target not examined yet");
target.c:2677	LOG_ERROR("Target not examined yet");
target.c:2697	LOG_ERROR("Target not examined yet");
target.c:2716	LOG_ERROR("Target not examined yet");
target.c:2737	LOG_ERROR("Target not examined yet");
target.c:2758	LOG_ERROR("Target not examined yet");
target.c:2778	LOG_ERROR("Target not examined yet");
target.c:3037	LOG_ERROR("Target not examined yet");
target.c:3128	LOG_ERROR("Could not read register '%s'", reg->name);
target.c:3142	LOG_ERROR("Failed to allocate memory");
target.c:3154	LOG_ERROR("Could not write to register '%s'", reg->name);
target.c:3251	LOG_ERROR("timed out while waiting for target %s",
target.c:3382	LOG_ERROR("invalid memory read size: %u", size);
target.c:3464	LOG_ERROR("Failed to allocate md read buffer");
target.c:3499	LOG_ERROR("Out of memory");
target.c:3887	LOG_ERROR("no target selected");
target.c:3941	LOG_ERROR("checksum mismatch");
target.c:3951	LOG_ERROR("checksum mismatch - attempting binary compare");
target.c:4296	LOG_ERROR("failed to write %zu bytes: %s", len, strerror(errno));
target.c:4452	LOG_ERROR("No memory to store samples.");
target.c:4574	LOG_ERROR("Failed to allocate memory");
target.c:4713	LOG_ERROR("Failed to allocate memory");
target.c:4756	LOG_ERROR("write_memory: write at " TARGET_ADDR_FMT " with width=%u and count=%zu failed",
target.c:4884	LOG_ERROR("Failed to allocate memory");
target.c:4893	LOG_ERROR("Failed to allocate memory");
target.c:4944	LOG_ERROR("Failed to allocate memory");
target.c:5845	LOG_ERROR("The selected transport doesn't support this target");
target.c:5878	LOG_ERROR("Out of memory");
target.c:5888	LOG_ERROR("Out of memory");
target.c:5918	LOG_ERROR("Out of memory");
target.c:5973	LOG_ERROR("Out of memory");
target.c:6000	LOG_ERROR("unable to register '%s' commands", cp);
target.c:6091	LOG_ERROR("Out of memory");
target.c:6134	LOG_ERROR("Out of memory");
target.c:6348	LOG_ERROR("No image in memory");
target.c:6457	LOG_ERROR("FLASH bank probe failed for %s", bank->name);
target.c:6524	LOG_ERROR("Not enough working area");
target.c:6535	LOG_ERROR("Test pattern write failed");
target.c:6602	LOG_ERROR("Not enough working area");
target_request.c:139	LOG_ERROR("unknown target request: %2.2x", target_req_cmd);
target_request.c:249	LOG_ERROR("Target %s does not support target requests", target_name(target));
tcl.c:512	LOG_ERROR("invalid target %s", CMD_ARGV[1]);
tcl.c:523	LOG_ERROR("End of memory");
tcl.c:541	LOG_ERROR("'%s' driver rejected nand flash. Usage: %s",
tcl.c:569	LOG_ERROR("No valid NAND flash driver found (%s)", driver_name);
tcl.c:145	LOG_ERROR("error retrieving flash info");
tcl.c:424	LOG_ERROR("no target selected");
tcl.c:476	LOG_ERROR("no target selected");
tcl.c:563	LOG_ERROR("Cannot cross flash bank borders");
tcl.c:608	LOG_ERROR("BUG: can't happen");
tcl.c:648	LOG_ERROR(
tcl.c:755	LOG_ERROR("Offset 0x%8.8" PRIx32 " is out of range of the flash bank",
tcl.c:793	LOG_ERROR("Out of memory");
tcl.c:815	LOG_ERROR("Short read");
tcl.c:872	LOG_ERROR("Offset 0x%8.8" PRIx32 " is out of range of the flash bank",
tcl.c:883	LOG_ERROR("Length of %" PRIu32 " bytes with offset 0x%8.8" PRIx32
tcl.c:890	LOG_ERROR("Out of memory");
tcl.c:896	LOG_ERROR("Read error");
tcl.c:903	LOG_ERROR("Could not open file");
tcl.c:912	LOG_ERROR("Could not write file");
tcl.c:953	LOG_ERROR("Offset 0x%8.8" PRIx32 " is out of range of the flash bank",
tcl.c:960	LOG_ERROR("Could not open file");
tcl.c:984	LOG_ERROR("Out of memory");
tcl.c:992	LOG_ERROR("File read failure");
tcl.c:998	LOG_ERROR("Short read");
tcl.c:1005	LOG_ERROR("Out of memory");
tcl.c:1012	LOG_ERROR("Flash read error");
tcl.c:1246	LOG_ERROR("usage: flash bank <name> <driver> "
tcl.c:1256	LOG_ERROR("target '%s' not defined", CMD_ARGV[5]);
tcl.c:1264	LOG_ERROR("flash driver '%s' not found", driver_name);
tcl.c:1271	LOG_ERROR("flash bank name '%s' already exists", bank_name);
tcl.c:1279	LOG_ERROR("couldn't register '%s' commands",
tcl.c:1299	LOG_ERROR("'%s' driver rejected flash bank at " TARGET_ADDR_FMT
tcl.c:87	LOG_ERROR("Out of memory");
tcl.c:147	LOG_ERROR("Out of memory");
tcl.c:286	LOG_ERROR("Out of memory");
tcl.c:398	LOG_ERROR("Out of memory");
tcl.c:435	LOG_ERROR("Out of memory");
tcl.c:518	LOG_ERROR("Out of memory");
tcl.c:955	LOG_ERROR("Specify a single value for tap");
tcl.c:979	LOG_ERROR("Out of memory");
tcl.c:1080	LOG_ERROR("Timeout must be an integer between 0 and 100000");
tcl.c:1089	LOG_ERROR("Timed out");
tcl.c:1097	LOG_ERROR("Timed out");
tcl_server.c:126	LOG_ERROR("error during write: %d != %d", (int)wlen, (int)len);
tcl_server.c:179	LOG_ERROR("error during read: %s", strerror(errno));
tcl_server.c:304	LOG_ERROR("%s: can only be called from the tcl server", CMD_NAME);
tcl_server.c:321	LOG_ERROR("%s: can only be called from the tcl server", CMD_NAME);
telnet_server.c:218	LOG_ERROR("Failed to allocate telnet connection.");
telnet_server.c:640	LOG_ERROR("Out of memory");
telnet_server.c:688	LOG_ERROR("Out of memory");
telnet_server.c:762	LOG_ERROR("error during read: %s", strerror(errno));
telnet_server.c:889	LOG_ERROR("BUG: unexpected value in t_con->last_escape");
telnet_server.c:895	LOG_ERROR("unknown telnet state");
telnet_server.c:953	LOG_ERROR("Failed to allocate telnet service.");
ti_icdi_usb.c:99	LOG_ERROR("Received too much data from the target.");
ti_icdi_usb.c:111	LOG_ERROR("Unmatched escape character in target response.");
ti_icdi_usb.c:127	LOG_ERROR("packet buffer too small");
ti_icdi_usb.c:324	LOG_ERROR("Invalid Reply Received");
ti_icdi_usb.c:355	LOG_ERROR("query supported failed: 0x%x", result);
ti_icdi_usb.c:369	LOG_ERROR("invalid max packet, using defaults");
ti_icdi_usb.c:381	LOG_ERROR("unable to reallocate memory");
ti_icdi_usb.c:394	LOG_ERROR("unable to enable extended mode: 0x%x", result);
ti_icdi_usb.c:425	LOG_ERROR("continue failed: 0x%x", result);
ti_icdi_usb.c:444	LOG_ERROR("halt failed: 0x%x", result);
ti_icdi_usb.c:463	LOG_ERROR("step failed: 0x%x", result);
ti_icdi_usb.c:490	LOG_ERROR("register read failed: 0x%x", result);
ti_icdi_usb.c:497	LOG_ERROR("failed to convert result");
ti_icdi_usb.c:522	LOG_ERROR("register write failed: 0x%x", result);
ti_icdi_usb.c:543	LOG_ERROR("memory read failed: 0x%x", result);
ti_icdi_usb.c:550	LOG_ERROR("read more bytes than expected: actual 0x%x expected 0x%" PRIx32, read_len, len);
ti_icdi_usb.c:570	LOG_ERROR("memory buffer too small: requires 0x%x actual 0x%" PRIx32, out_len, len);
ti_icdi_usb.c:581	LOG_ERROR("memory write failed: 0x%x", result);
ti_icdi_usb.c:676	LOG_ERROR("unable to allocate memory");
ti_icdi_usb.c:689	LOG_ERROR("open failed");
ti_icdi_usb.c:714	LOG_ERROR("mode (transport) not supported by device");
tms470.c:155	LOG_ERROR("No %s flash bank contains base address "
tms470.c:195	LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".",
tms470.c:235	LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".",
tms470.c:290	LOG_ERROR("could not process flash key %s", CMD_ARGV[i]);
tms470.c:338	LOG_ERROR("osc_megahertz must be positive and non-zero!");
tms470.c:795	LOG_ERROR("Target not halted");
tms470.c:803	LOG_ERROR("Sector range %u to %u invalid.", first, last);
tms470.c:817	LOG_ERROR("tms470 could not erase flash sector.");
tms470.c:836	LOG_ERROR("Target not halted");
tms470.c:844	LOG_ERROR("Sector range %u to %u invalid.", first, last);
tms470.c:884	LOG_ERROR("Target not halted");
tms470.c:943	LOG_ERROR("fmstat = 0x%04" PRIx32 "", fmmstat);
tms470.c:944	LOG_ERROR(
tms470.c:997	LOG_ERROR("Target not halted");
tms470.c:1071	LOG_ERROR("Target not halted");
transport.c:72	LOG_ERROR("Error selecting '%s' as transport", t->name);
transport.c:77	LOG_ERROR("No transport named '%s' is available.", name);
transport.c:99	LOG_ERROR("Can't modify the set of allowed transports.");
transport.c:135	LOG_ERROR("transport name already used");
transport.c:141	LOG_ERROR("invalid transport %s", new_transport->name);
transport.c:202	LOG_ERROR("no such transport '%s'", CMD_ARGV[i]);
transport.c:221	LOG_ERROR("session transport was not selected. Use 'transport select <transport>'");
transport.c:224	LOG_ERROR("Transports available:");
transport.c:227	LOG_ERROR("%s", *vector);
uCOS-III.c:135	LOG_ERROR("uCOS-III: failed to find thread address");
uCOS-III.c:157	LOG_ERROR("uCOS-III: failed to read thread list address");
uCOS-III.c:171	LOG_ERROR("uCOS-III: failed to read next thread address");
uCOS-III.c:225	LOG_ERROR("uCOS-III: failed to read thread offset");
uCOS-III.c:258	LOG_ERROR("uCOS-III: out of memory");
uCOS-III.c:270	LOG_ERROR("uCOS-III: target not supported: %s", target_type_name(target));
uCOS-III.c:280	LOG_ERROR("uCOS-III: symbol list not loaded");
uCOS-III.c:294	LOG_ERROR("uCOS-III: failed to read RTOS running");
uCOS-III.c:299	LOG_ERROR("uCOS-III: invalid RTOS running value");
uCOS-III.c:306	LOG_ERROR("uCOS-III: out of memory");
uCOS-III.c:321	LOG_ERROR("uCOS-III: failed to update thread offsets");
uCOS-III.c:334	LOG_ERROR("uCOS-III: failed to read current thread address");
uCOS-III.c:343	LOG_ERROR("uCOS-III: failed to read thread count");
uCOS-III.c:349	LOG_ERROR("uCOS-III: out of memory");
uCOS-III.c:361	LOG_ERROR("uCOS-III: failed to find last thread address");
uCOS-III.c:372	LOG_ERROR("uCOS-III: failed to find or create thread");
uCOS-III.c:390	LOG_ERROR("uCOS-III: failed to name address");
uCOS-III.c:399	LOG_ERROR("uCOS-III: failed to read thread name");
uCOS-III.c:414	LOG_ERROR("uCOS-III: failed to read thread state");
uCOS-III.c:422	LOG_ERROR("uCOS-III: failed to read thread priority");
uCOS-III.c:444	LOG_ERROR("uCOS-III: failed to read previous thread address");
uCOS-III.c:463	LOG_ERROR("uCOS-III: failed to find thread address");
uCOS-III.c:476	LOG_ERROR("uCOS-III: failed to read stack address");
uCOS-III.c:491	LOG_ERROR("uCOS-III: out of memory");
ublast2_access_libusb.c:123	LOG_ERROR("No firmware path specified");
ublast2_access_libusb.c:128	LOG_ERROR("unable to claim interface");
ublast2_access_libusb.c:137	LOG_ERROR("Could not load firmware image");
ublast2_access_libusb.c:166	LOG_ERROR("Error while downloading the firmware");
ublast2_access_libusb.c:220	LOG_ERROR("Altera USB-Blaster II not found");
ublast2_access_libusb.c:231	LOG_ERROR("Altera USB-Blaster II not found");
ublast2_access_libusb.c:237	LOG_ERROR("unable to claim interface");
ublast2_access_libusb.c:262	LOG_ERROR("usb release interface failed");
ulink.c:388	LOG_ERROR("Could not halt ULINK CPU");
ulink.c:397	LOG_ERROR("Could not load firmware image");
ulink.c:412	LOG_ERROR("Could not restart ULINK CPU");
ulink.c:521	LOG_ERROR("Could not allocate OpenULINK command payload: out of memory");
ulink.c:528	LOG_ERROR("BUG: Duplicate payload allocation for OpenULINK command");
ulink.c:538	LOG_ERROR("BUG: Duplicate payload allocation for OpenULINK command");
ulink.c:870	LOG_ERROR("BUG: Tried to create CMD_SCAN_IO OpenULINK command with too"
ulink.c:906	LOG_ERROR("BUG: ulink_append_scan_cmd() encountered an unknown scan type");
ulink.c:1401	LOG_ERROR("BUG: %s is not a valid end state", tap_state_name(endstate));
ulink.c:1733	LOG_ERROR("BUG: %s -> %s isn't a valid TAP state transition",
ulink.c:1781	LOG_ERROR("JTAG_STABLECLOCKS: state not stable");
ulink.c:1835	LOG_ERROR("BUG: ulink_post_process_scan() encountered an unknown"
ulink.c:1880	LOG_ERROR("BUG: ulink_post_process_queue() encountered unknown JTAG "
ulink.c:1939	LOG_ERROR("BUG: encountered unknown JTAG command type");
ulink.c:1977	LOG_ERROR("RCLK not supported");
ulink.c:2117	LOG_ERROR("Could not open ULINK device");
ulink.c:2140	LOG_ERROR("Could not download firmware and re-numerate ULINK");
ulink.c:2176	LOG_ERROR("Cannot communicate with ULINK device. Disconnect ULINK from "
usb_blaster.c:418	LOG_ERROR("buggy code, should never queue more that %d bytes",
usb_blaster.c:806	LOG_ERROR("BUG: unknown JTAG command type 0x%X",
usb_blaster.c:835	LOG_ERROR("Error registering lowlevel driver \"%s\"",
usb_blaster.c:852	LOG_ERROR("No lowlevel driver available");
usb_blaster.c:934	LOG_ERROR("%s takes exactly one or two arguments", CMD_NAME);
usb_blaster.c:943	LOG_ERROR("%s: pin name must be \"pin6\" or \"pin8\"",
usb_blaster.c:973	LOG_ERROR("%s: pin value must be 0, 1, s (SRST) or t (TRST)",
usbprog.c:136	LOG_ERROR("BUG: unknown JTAG command type encountered");
usbprog.c:152	LOG_ERROR("Can't find USB JTAG Interface! Please check connection and permissions.");
usbprog.c:176	LOG_ERROR("BUG: %i is not a valid end state", state);
usbprog.c:211	LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
usbprog.c:287	LOG_ERROR("unknown scan type: %i", type);
usbtoxxx.c:146	LOG_ERROR(ERRMSG_NOT_SUPPORT_BY,
usbtoxxx.c:152	LOG_ERROR("%s command 0x%02x failed with 0x%02x",
usbtoxxx.c:215	LOG_ERROR(ERRMSG_INVALID_TARGET, "length of return data");
versaloon.c:132	LOG_ERROR(ERRMSG_NOT_ENOUGH_MEMORY);
versaloon.c:204	LOG_ERROR(ERRMSG_FAILURE_OPERATION, "send usb data");
versaloon.c:217	LOG_ERROR(ERRMSG_FAILURE_OPERATION, "receive usb data");
versaloon.c:234	LOG_ERROR(ERRMSG_NOT_ENOUGH_MEMORY);
versaloon.c:251	LOG_ERROR(ERRMSG_FAILURE_OPERATION, "communicate with versaloon");
versaloon.c:267	LOG_ERROR(ERRMSG_NOT_ENOUGH_MEMORY);
versaloon.c:273	LOG_ERROR(ERRMSG_NOT_ENOUGH_MEMORY);
versaloon.c:277	LOG_ERROR(ERRMSG_FAILURE_OPERATION, "initialize usbtoxxx");
versaloon.c:329	LOG_ERROR(ERRMSG_FAILURE_OPERATION, "communicate with versaloon");
versaloon_include.h:22	#define LOG_BUG LOG_ERROR
virtex2.c:38	LOG_ERROR("Out of memory");
virtex2.c:63	LOG_ERROR("Out of memory");
virtex2.c:321	LOG_ERROR("device has only user register 1 to %d", pld_device_info->command_set.num_user);
virtex2.c:336	LOG_ERROR("code for command 'select user1' is unknown");
virtex2.c:416	LOG_ERROR("Out of memory");
virtual.c:20	LOG_ERROR("master flash bank '%s' does not exist", (char *)bank->driver_priv);
virtual.c:57	LOG_ERROR("master flash bank '%s' does not exist", bank_name);
vsllink.c:184	LOG_ERROR("jtag_add_clocks() "
vsllink.c:201	LOG_ERROR("BUG: unknown JTAG command type "
vsllink.c:275	LOG_ERROR("unable to allocate memory");
vsllink.c:282	LOG_ERROR("Can't find USB JTAG Interface!"
vsllink.c:354	LOG_ERROR("BUG: %i is not a valid end state", state);
vsllink.c:382	LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
vsllink.c:655	LOG_ERROR("vsllink_jtag_execute failure");
vsllink.c:732	LOG_ERROR("Sequence %d not supported", seq);
vsllink.c:831	LOG_ERROR("unable to claim interface");
w600.c:157	LOG_ERROR("timed out waiting for flash");
w600.c:202	LOG_ERROR("Target not halted");
w600.c:206	LOG_ERROR("can not erase protected area");
w600.c:227	LOG_ERROR("Target not halted");
w600.c:296	LOG_ERROR("flash_id not supported for w600");
w600.c:308	LOG_ERROR("w600 flash size failed, probe inaccurate");
x86_32_common.c:68	LOG_ERROR("%s out of memory", __func__);
x86_32_common.c:88	LOG_ERROR("%s out of memory", __func__);
x86_32_common.c:127	LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
x86_32_common.c:171	LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=0x%08" PRIx32,
x86_32_common.c:180	LOG_ERROR("%s could not disable paging", __func__);
x86_32_common.c:198	LOG_ERROR("%s invalid read size", __func__);
x86_32_common.c:208	LOG_ERROR("%s could not enable paging", __func__);
x86_32_common.c:228	LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
x86_32_common.c:238	LOG_ERROR("%s out of memory", __func__);
x86_32_common.c:274	LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=0x%08" PRIx32,
x86_32_common.c:288	LOG_ERROR("%s could not disable paging", __func__);
x86_32_common.c:313	LOG_ERROR("%s could not enable paging", __func__);
x86_32_common.c:329	LOG_ERROR("%s error write EAX", __func__);
x86_32_common.c:353	LOG_ERROR("%s invalid read mem size", __func__);
x86_32_common.c:367	LOG_ERROR("%s error read EDX", __func__);
x86_32_common.c:375	LOG_ERROR("%s error on mem read", __func__);
x86_32_common.c:397	LOG_ERROR("%s error write EAX", __func__);
x86_32_common.c:406	LOG_ERROR("%s error write EDX", __func__);
x86_32_common.c:429	LOG_ERROR("%s invalid write mem size", __func__);
x86_32_common.c:438	LOG_ERROR("%s error on mem write", __func__);
x86_32_common.c:472	LOG_ERROR("%s couldn't read page directory pointer table entry at 0x%08" PRIx32,
x86_32_common.c:478	LOG_ERROR("%s page directory pointer table entry at 0x%08" PRIx32 " is not present",
x86_32_common.c:487	LOG_ERROR("%s couldn't read page directory entry at 0x%08" PRIx32,
x86_32_common.c:493	LOG_ERROR("%s page directory entry at 0x%08" PRIx32 " is not present",
x86_32_common.c:512	LOG_ERROR("%s couldn't read page table entry at 0x%08" PRIx32, __func__, pt_addr);
x86_32_common.c:517	LOG_ERROR("%s page table entry at 0x%08" PRIx32 " is not present", __func__, pt_addr);
x86_32_common.c:531	LOG_ERROR("%s couldn't read page directory entry at 0x%08" PRIx32, __func__, pd_addr);
x86_32_common.c:536	LOG_ERROR("%s page directory entry at 0x%08" PRIx32 " is not present", __func__, pd_addr);
x86_32_common.c:553	LOG_ERROR("%s couldn't read page table entry at 0x%08" PRIx32, __func__, pt_addr);
x86_32_common.c:558	LOG_ERROR("%s page table entry at 0x%08" PRIx32 " is not present", __func__, pt_addr);
x86_32_common.c:577	LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
x86_32_common.c:588	LOG_ERROR("%s could not disable paging", __func__);
x86_32_common.c:593	LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
x86_32_common.c:604	LOG_ERROR("%s failed to read memory from physical address " TARGET_ADDR_FMT,
x86_32_common.c:610	LOG_ERROR("%s could not enable paging", __func__);
x86_32_common.c:616	LOG_ERROR("%s failed to read memory from address " TARGET_ADDR_FMT,
x86_32_common.c:634	LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
x86_32_common.c:644	LOG_ERROR("%s could not disable paging", __func__);
x86_32_common.c:649	LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
x86_32_common.c:659	LOG_ERROR("%s failed to write memory to physical address " TARGET_ADDR_FMT,
x86_32_common.c:665	LOG_ERROR("%s could not enable paging", __func__);
x86_32_common.c:672	LOG_ERROR("%s failed to write memory to address " TARGET_ADDR_FMT,
x86_32_common.c:691	LOG_ERROR("%s invalid params buf=%p, addr=%08" PRIx32, __func__, buf, addr);
x86_32_common.c:696	LOG_ERROR("%s error EDX write", __func__);
x86_32_common.c:703	LOG_ERROR("%s could not disable paging", __func__);
x86_32_common.c:728	LOG_ERROR("%s invalid read io size", __func__);
x86_32_common.c:736	LOG_ERROR("%s could not enable paging", __func__);
x86_32_common.c:747	LOG_ERROR("%s error on read EAX", __func__);
x86_32_common.c:754	LOG_ERROR("%s error on io read", __func__);
x86_32_common.c:771	LOG_ERROR("%s invalid params buf=%p, addr=0x%08" PRIx32, __func__, buf, addr);
x86_32_common.c:777	LOG_ERROR("%s error on EDX write", __func__);
x86_32_common.c:785	LOG_ERROR("%s error on EAX write", __func__);
x86_32_common.c:792	LOG_ERROR("%s could not disable paging", __func__);
x86_32_common.c:817	LOG_ERROR("%s invalid write io size", __func__);
x86_32_common.c:825	LOG_ERROR("%s could not enable paging", __func__);
x86_32_common.c:835	LOG_ERROR("%s error on io write", __func__);
x86_32_common.c:897	LOG_ERROR("%s dr7 error, already enabled, val=%08" PRIx32, __func__, dr7);
x86_32_common.c:914	LOG_ERROR("%s unsupported feature bp_type=%d", __func__, bp_type);
x86_32_common.c:923	LOG_ERROR("%s invalid request [only 0-3] bp_type=%d", __func__, bp_type);
x86_32_common.c:952	LOG_ERROR("%s dr7 error, not enabled, val=0x%08" PRIx32, __func__, dr7);
x86_32_common.c:982	LOG_ERROR("%s no free hw breakpoint bpid=0x%" PRIx32, __func__, bp->unique_id);
x86_32_common.c:1002	LOG_ERROR("%s invalid breakpoint number=%d, bpid=%" PRIu32,
x86_32_common.c:1041	LOG_ERROR("%s software breakpoint error at " TARGET_ADDR_FMT ", check memory",
x86_32_common.c:1043	LOG_ERROR("%s readback=0x%02" PRIx8 " orig=0x%02" PRIx8 "",
x86_32_common.c:1052	LOG_ERROR("%s out of memory", __func__);
x86_32_common.c:1090	LOG_ERROR("%s software breakpoint remove error at " TARGET_ADDR_FMT ", check memory",
x86_32_common.c:1092	LOG_ERROR("%s current=0x%02" PRIx8 " orig=0x%02" PRIx8 "",
x86_32_common.c:1127	LOG_ERROR("breakpoint already set");
x86_32_common.c:1133	LOG_ERROR("%s error setting hardware breakpoint at " TARGET_ADDR_FMT,
x86_32_common.c:1141	LOG_ERROR("%s error setting software breakpoint at " TARGET_ADDR_FMT,
x86_32_common.c:1146	LOG_ERROR("%s core doesn't support SW breakpoints", __func__);
x86_32_common.c:1163	LOG_ERROR("%s error removing hardware breakpoint at " TARGET_ADDR_FMT,
x86_32_common.c:1169	LOG_ERROR("%s error removing software breakpoint at " TARGET_ADDR_FMT,
x86_32_common.c:1186	LOG_ERROR("%s watchpoint already set", __func__);
x86_32_common.c:1191	LOG_ERROR("%s no support for 'read' watchpoints, use 'access' or 'write'"
x86_32_common.c:1199	LOG_ERROR("%s no debug registers left", __func__);
x86_32_common.c:1204	LOG_ERROR("%s only watchpoints of length 1, 2 or 4 are supported", __func__);
x86_32_common.c:1222	LOG_ERROR("%s only 'access' or 'write' watchpoints are supported", __func__);
x86_32_common.c:1307	LOG_ERROR("%s fail for %s", x86_32->cache->reg_list[num].name, __func__);
x86_32_common.c:1323	LOG_ERROR("%s fail for %s", x86_32->cache->reg_list[num].name, __func__);
x86_32_common.c:1355	LOG_ERROR("%s invalid memory read size: %u", __func__, size);
x86_32_common.c:1398	LOG_ERROR("%s IA-32 I/O space is 2^16, 0x%08" PRIx32 " exceeds max", __func__, address);
xcf.c:162	LOG_ERROR("*** XCF: FAILED to enter ISC mode");
xcf.c:192	LOG_ERROR("*** XCF: FAILED to leave ISC mode");
xcf.c:565	LOG_ERROR("no memory for flash bank info");
xcf.c:595	LOG_ERROR("Target has no JTAG tap");
xcf.c:616	LOG_ERROR("Unknown flash device ID 0x%" PRIX32, id);
xcf.c:622	LOG_ERROR("No memory for sector table");
xds110.c:433	LOG_ERROR("XDS110: failed to connect");
xds110.c:1098	LOG_ERROR("Sequence SWD line reset (%d) not supported", seq);
xds110.c:1130	LOG_ERROR("Sequence %d not supported", seq);
xds110.c:1186	LOG_ERROR("XDS110: failed to read DAP register");
xds110.c:1236	LOG_ERROR("XDS110: failed to write DAP register");
xds110.c:1586	LOG_ERROR("BUG: unknown JTAG command type 0x%x encountered",
xds110.c:1682	LOG_ERROR("XDS110: unable to allocate memory");
xds110.c:1695	LOG_ERROR("XDS110: the firmware does not support pathmove command");
xds110.c:1696	LOG_ERROR(OCD_FIRMWARE_UPGRADE);
xds110.c:1734	LOG_ERROR("BUG: JTAG scan request is too large to handle (%" PRIu32 " bits)",
xds110.c:1835	LOG_ERROR("BUG: unknown JTAG command type 0x%x encountered",
xds110.c:2013	LOG_ERROR("XDS110: voltage must be 0 or between %d and %d "
xilinx_bit.c:27	LOG_ERROR("BUG: length_size neither 2 nor 4");
xilinx_bit.c:69	LOG_ERROR("couldn't open %s: %s", filename, strerror(errno));
xilinx_bit.c:81	LOG_ERROR("couldn't read unknown_header from file '%s'", filename);
xmc1xxx.c:107	LOG_ERROR("No working area available.");
xmc1xxx.c:135	LOG_ERROR("Error executing flash sector erase "
xmc1xxx.c:176	LOG_ERROR("No working area available.");
xmc1xxx.c:210	LOG_ERROR("Error executing flash sector erase check "
xmc1xxx.c:221	LOG_ERROR("Couldn't read NVMSTATUS");
xmc1xxx.c:258	LOG_ERROR("offset 0x%" PRIx32 " breaks required block alignment",
xmc1xxx.c:275	LOG_ERROR("No working area available for write code.");
xmc1xxx.c:288	LOG_ERROR("No working area available for write data.");
xmc1xxx.c:314	LOG_ERROR("Error writing data buffer");
xmc1xxx.c:324	LOG_ERROR("Error writing data padding");
xmc1xxx.c:347	LOG_ERROR("Error executing flash write "
xmc1xxx.c:391	LOG_ERROR("Cannot read NVMCONF register.");
xmc1xxx.c:418	LOG_ERROR("Cannot read CS0 register %i.", i);
xmc1xxx.c:425	LOG_ERROR("Cannot read DBGROMID register.");
xmc1xxx.c:458	LOG_ERROR("Cannot read IDCHIP register.");
xmc1xxx.c:463	LOG_ERROR("IDCHIP register does not match XMC1xxx.");
xmc1xxx.c:471	LOG_ERROR("Cannot read FLSIZE register.");
xmc4xxx.c:288	LOG_ERROR("Unexpected number of sectors, %u\n",
xmc4xxx.c:338	LOG_ERROR("Cannot read device identification register.");
xmc4xxx.c:344	LOG_ERROR("Platform ID doesn't match XMC4xxx: 0x%08" PRIx32, devid);
xmc4xxx.c:354	LOG_ERROR("Cannot read Flash bank configuration.");
xmc4xxx.c:380	LOG_ERROR("XMC4xxx: Unexpected flash ID. got %02" PRIx8,
xmc4xxx.c:392	LOG_ERROR("Unable to load bank information.");
xmc4xxx.c:420	LOG_ERROR("Unable to write erase command sequence");
xmc4xxx.c:434	LOG_ERROR("Cannot read flash status register.");
xmc4xxx.c:455	LOG_ERROR("Timed out waiting for flash");
xmc4xxx.c:463	LOG_ERROR("XMC4xxx flash protected");
xmc4xxx.c:508	LOG_ERROR("Cannot read flash status register.");
xmc4xxx.c:514	LOG_ERROR("Error with flash erase sequence");
xmc4xxx.c:520	LOG_ERROR("Flash failed to erase");
xmc4xxx.c:537	LOG_ERROR("Unable to erase, target is not halted");
xmc4xxx.c:552	LOG_ERROR("Invalid sector %u", i);
xmc4xxx.c:560	LOG_ERROR("Unable to write erase command sequence");
xmc4xxx.c:584	LOG_ERROR("Unable to write enter page mode command");
xmc4xxx.c:595	LOG_ERROR("Unable to enter page mode");
xmc4xxx.c:601	LOG_ERROR("Sequence error while entering page mode");
xmc4xxx.c:673	LOG_ERROR("Error loading page buffer");
xmc4xxx.c:682	LOG_ERROR("Unable to enter write command sequence");
xmc4xxx.c:693	LOG_ERROR("Error with flash write sequence");
xmc4xxx.c:699	LOG_ERROR("Failed to write flash page");
xmc4xxx.c:719	LOG_ERROR("Unable to erase, target is not halted");
xmc4xxx.c:731	LOG_ERROR("Attempting to write past the end of flash");
xmc4xxx.c:778	LOG_ERROR("Unable to write flash page");
xmc4xxx.c:808	LOG_ERROR("Cannot read device identification register.");
xmc4xxx.c:955	LOG_ERROR("Invalid user level, must be 0-2");
xmc4xxx.c:969	LOG_ERROR("Unable to write temp unprotect sequence");
xmc4xxx.c:1001	LOG_ERROR("Invalid user level. Must be 0-1");
xmc4xxx.c:1008	LOG_ERROR("Error erasing user configuration block");
xmc4xxx.c:1030	LOG_ERROR("Read protection is for user level 0 only!");
xmc4xxx.c:1059	LOG_ERROR("Flash protection is installed for user %d"
xmc4xxx.c:1124	LOG_ERROR("Error writing user configuration block 0");
xmc4xxx.c:1139	LOG_ERROR("Flash passwords not set, use xmc4xxx flash_password to set them");
xmc4xxx.c:1165	LOG_ERROR("Unable to read flash User0 protection register");
xmc4xxx.c:1171	LOG_ERROR("Unable to read flash User1 protection register");
xmc4xxx.c:1177	LOG_ERROR("Unable to read flash User2 protection register");
xscale.c:200	LOG_ERROR("JTAG error while reading DCSR");
xscale.c:294	LOG_ERROR("JTAG error while receiving data from debug handler");
xscale.c:312	LOG_ERROR(
xscale.c:391	LOG_ERROR("JTAG error while reading TX");
xscale.c:397	LOG_ERROR("time out reading TX register");
xscale.c:461	LOG_ERROR("JTAG error while writing RX");
xscale.c:468	LOG_ERROR("time out writing RX register");
xscale.c:487	LOG_ERROR("JTAG error while writing RX");
xscale.c:535	LOG_ERROR("BUG: size neither 4, 2 nor 1");
xscale.c:550	LOG_ERROR("JTAG error while sending data to debug handler");
xscale.c:612	LOG_ERROR("JTAG error while writing DCSR");
xscale.c:786	LOG_ERROR("BUG: called for a non-ARMv4/5 target");
xscale.c:883	LOG_ERROR("cpsr contains invalid mode value - communication failure");
xscale.c:959	LOG_ERROR("Method of Entry is 'Reserved'");
xscale.c:1020	LOG_ERROR("target was in unknown state when halt was requested");
xscale.c:1048	LOG_ERROR(
xscale.c:1164	LOG_ERROR(
xscale.c:1298	LOG_ERROR(
xscale.c:1612	LOG_ERROR("not implemented");
xscale.c:1620	LOG_ERROR("not implemented");
xscale.c:1833	LOG_ERROR("invalid read size");
xscale.c:1866	LOG_ERROR("%s: %s is not implemented. Disable MMU?",
xscale.c:1948	LOG_ERROR("data abort writing memory");
xscale.c:1965	LOG_ERROR("%s: %s is not implemented. Disable MMU?",
xscale.c:2098	LOG_ERROR("BUG: no hardware comparator available");
xscale.c:2144	LOG_ERROR("no breakpoint unit available for hardware breakpoint");
xscale.c:2149	LOG_ERROR("only breakpoints of two (Thumb) or four (ARM) bytes length supported");
xscale.c:2250	LOG_ERROR("BUG: watchpoint->rw neither read, write nor access");
xscale.c:2257	LOG_ERROR("BUG: sufficient hardware comparators unavailable");
xscale.c:2282	LOG_ERROR("BUG: no hardware comparator available");
xscale.c:2295	LOG_ERROR("no more watchpoint registers available");
xscale.c:2305	LOG_ERROR("xscale requires that watchpoint length is a power of two");
xscale.c:2317	LOG_ERROR("insufficient watchpoint registers available");
xscale.c:2322	LOG_ERROR("xscale does not support watchpoints with length "
xscale.c:2605	LOG_ERROR("error while reading instruction");
xscale.c:2616	LOG_ERROR("error while reading instruction");
xscale.c:2622	LOG_ERROR("BUG: unknown core state encountered");
xscale.c:3020	LOG_ERROR("debug_handler.bin: larger than 2kb");
xscale.c:3043	LOG_ERROR("target '%s' not defined", CMD_ARGV[0]);
xscale.c:3058	LOG_ERROR(
xscale.c:3078	LOG_ERROR("target '%s' not defined", CMD_ARGV[0]);
xscale.c:3089	LOG_ERROR("xscale cache_clean_address <address> must be 64kb aligned");
xscale.c:3116	LOG_ERROR(xscale_not);
xscale.c:3261	LOG_ERROR("No vector '%s'", CMD_ARGV[CMD_ARGC]);
xsvf.c:169	LOG_ERROR("UNKNOWN XSVF STATE 0x%02X", xsvf_state);
xsvf.c:284	LOG_ERROR("XSVF: path too long");
xsvf.c:339	LOG_ERROR("XSVF: pathmove error %d", result);
xsvf.c:525	LOG_ERROR("unsupported XSETSDRMASKS");
xsvf.c:530	LOG_ERROR("unsupported XSDRINC");
xsvf.c:535	LOG_ERROR("unsupported XSDRB");
xsvf.c:540	LOG_ERROR("unsupported XSDRC");
xsvf.c:545	LOG_ERROR("unsupported XSDRE");
xsvf.c:550	LOG_ERROR("unsupported XSDRTDOB");
xsvf.c:555	LOG_ERROR("unsupported XSDRTDOC");
xsvf.c:560	LOG_ERROR("unsupported XSDRTDOE");
xsvf.c:578	LOG_ERROR("XSVF: bad XSTATE %02x", uc);
xsvf.c:622	LOG_ERROR("illegial XENDIR argument: 0x%02X", uc);
xsvf.c:643	LOG_ERROR("illegial XENDDR argument: 0x%02X", uc);
xsvf.c:821	LOG_ERROR("illegal XWAITSTATE wait_state: \"%s\"",
xsvf.c:971	LOG_ERROR("XTRST mode argument (0x%02X) out of range", trst_mode);
xsvf.c:978	LOG_ERROR("unknown xsvf command (0x%02X)", uc);
xtensa.c:506	LOG_ERROR("Error: can't convert register %d to non-windowbased register!", reg_idx);
xtensa.c:894	LOG_ERROR("XTensa core not configured; is xtensa-core-openocd.cfg missing?");
xtensa.c:906	LOG_ERROR("Unexpected OCD_ID = %08" PRIx32, xtensa->dbg_mod.device_id);
xtensa.c:1298	LOG_ERROR("Failed to read ARs (%d)!", res);
xtensa.c:1377	LOG_ERROR("Failed to fetch AR regs!");
xtensa.c:1393	LOG_ERROR("Exception reading %s!", reg_list[i].name);
xtensa.c:1499	LOG_ERROR("reg_class %d unhandled; 'xtgregs' not found", reg_class);
xtensa.c:1532	LOG_ERROR("eps_dbglevel_idx not set\n");
xtensa.c:1553	LOG_ERROR("SPARSE GDB reg list full (size %d)", k);
xtensa.c:2170	LOG_ERROR("Error issuing unaligned memory write context instruction(s): %d", res);
xtensa.c:2485	LOG_ERROR("Error issuing cache invaldate instruction(s): %d", ret);
xtensa.c:2738	LOG_ERROR("BUG: arch_info not specified");
xtensa.c:2761	LOG_ERROR("BUG: not supported register size (%d)", reg_params[i].size);
xtensa.c:2766	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
xtensa.c:2770	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
xtensa.c:2834	LOG_ERROR("failed algorithm halted at 0x%" PRIx32 ", expected " TARGET_ADDR_FMT, pc, exit_point);
xtensa.c:2842	LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
xtensa.c:2846	LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
xtensa.c:2906	LOG_ERROR("Failed to write dirty regs (%d)!", retval);
xtensa.c:2947	LOG_ERROR("Failed to alloc reg cache!");
xtensa.c:2956	LOG_ERROR("Failed to alloc reg list!");
xtensa.c:2970	LOG_ERROR("Failed to alloc reg list value!");
xtensa.c:3017	LOG_ERROR("Failed to alloc empty reg list value!");
xtensa.c:3056	LOG_ERROR("Failed to alloc mem for algorithm context backup!");
xtensa.c:3063	LOG_ERROR("Failed to alloc mem for algorithm context!");
xtensa.c:3137	LOG_ERROR("Spill location not specified. Try 'target remote <host>:3333 &spill_location0'");
xtensa.c:3145	LOG_ERROR("Malformed qxtreg packet");
xtensa.c:3151	LOG_ERROR("Malformed qxtreg packet");
xtensa.c:3159	LOG_ERROR("TIE register too large");
xtensa.c:3172	LOG_ERROR("Spill memory save");
xtensa.c:3181	LOG_ERROR("Malformed Qxtreg packet");
xtensa.c:3193	LOG_ERROR("Malformed Qxtreg packet");
xtensa.c:3200	LOG_ERROR("TIE value store");
xtensa.c:3248	LOG_ERROR("Spill memory restore");
xtensa.c:3253	LOG_ERROR("TIE execution");
xtensa.c:3338	LOG_ERROR("Malformed Qxtspill packet");
xtensa.c:3348	LOG_ERROR("Spill buf alloc");
xtensa.c:3385	LOG_ERROR("Xtensa configuration alloc failed\n");
xtensa.c:3402	LOG_ERROR("Xtensa scratch AR alloc failed\n");
xtensa.c:3426	LOG_ERROR("Failed to alloc memory for HW breakpoints!");
xtensa.c:3432	LOG_ERROR("Failed to alloc memory for HW watchpoints!");
xtensa.c:3439	LOG_ERROR("Failed to alloc memory for SW breakpoints!");
xtensa.c:3494	LOG_ERROR("Failed to queue OCDDCR_ENABLEOCD clear operation!");
xtensa.c:3500	LOG_ERROR("Failed to clear OCDDCR_ENABLEOCD!");
xtensa.c:3625	LOG_ERROR("xtopt %s (%d) out of range [%d..%d]\n", opt, val, min, max);
xtensa.c:3889	LOG_ERROR("Failed to allocate xtensa->optregs!");
xtensa.c:3902	LOG_ERROR("Failed to allocate xtensa->contiguous_regs_desc!");
xtensa.h:333	LOG_ERROR("Can not access %u reg when Trace Port option disabled!", reg);
xtensa.h:345	LOG_ERROR("Can not access %u reg when Trace Port option disabled!", reg);
xtensa_chip.c:112	LOG_ERROR("Failed to alloc chip-level memory!");
xtensa_chip.c:118	LOG_ERROR("Failed to init arch info!");
xtensa_debug_module.c:79	LOG_ERROR("Xtensa DM APB offset must be aligned to a %dKB multiple",
xtensa_debug_module.c:130	LOG_ERROR("Could not find MEM-AP to control the core");
xtensa_debug_module.c:146	LOG_ERROR("MEM-AP init failed: %d", retval);
xtensa_debug_module.c:165	LOG_ERROR("Invalid DBG reg ID %d!", reg);
xtensa_debug_module.c:184	LOG_ERROR("Invalid DBG reg ID %d!", reg);
xtensa_debug_module.c:203	LOG_ERROR("Invalid PWR reg ID %d!", reg);
xtensa_debug_module.c:229	LOG_ERROR("Invalid PWR reg ID %d!", reg);
xtensa_debug_module.c:382	LOG_ERROR("Failed to stop tracing (0x%x)!", trace_status.stat);
xtensa_fileio.c:58	LOG_ERROR("Failed to read break instruction!");
xtensa_fileio.c:73	LOG_ERROR("File-I/O data structure uninitialized");
zephyr.c:278	LOG_ERROR("Basic registers offsets are missing, check <arc_cpu_saved> struct");
zephyr.c:453	LOG_ERROR("Could not find target in Zephyr compatibility list");
zephyr.c:480	LOG_ERROR("Out of memory");
zephyr.c:579	LOG_ERROR("Could not fetch current thread pointer");
zephyr.c:646	LOG_ERROR("No symbols for Zephyr");
zephyr.c:651	LOG_ERROR("Can't obtain kernel struct from Zephyr");
zephyr.c:656	LOG_ERROR("Please build Zephyr with CONFIG_OPENOCD option set");
zephyr.c:664	LOG_ERROR("Couldn't determine size of size_t from host");
zephyr.c:669	LOG_ERROR("Only size_t of 4 bytes are supported");
zephyr.c:678	LOG_ERROR("Couldn't not fetch number of offsets from Zephyr");
zephyr.c:683	LOG_ERROR("Number of offsets too small");
zephyr.c:691	LOG_ERROR("Couldn't not fetch offsets from Zephyr");
zephyr.c:696	LOG_ERROR("Unexpected OpenOCD support version %" PRIu32,
zephyr.c:721	LOG_ERROR("Could not fetch offsets from Zephyr");
zephyr.c:733	LOG_ERROR("Could not obtain current thread ID");
zephyr.c:739	LOG_ERROR("Could not obtain thread list");
zephyr.c:780	LOG_ERROR("Out of memory");

LOG_ERROR macro

Syntax

Arguments

expr

References