ST32H457ZG dual core debugging not work

Sysprogs forums Forums VisualGDB ST32H457ZG dual core debugging not work

This topic contains 3 replies, has 2 voices, and was last updated by  support 2 weeks, 6 days ago.

Viewing 4 posts - 1 through 4 (of 4 total)
  • Author
    Posts
  • #33035

    Birgit
    Participant

    Hi,

    So far I have worked with an evaluation board with an STM32H745ZI controller. Everything works fine.

    Now I’ve switched to a board with an STM32H745ZG controller. Unfortunately I can neither flash nor debug the CM4 core here. Only the CM7 core works.

    There is no error message. But in the VisualGDB output the 2nd flash bank with base address 0x8100000 is missing.

    By default, the CM4 code is in the 2nd flash bank.

    <span class=”VIiyi” lang=”en”><span class=”JLqJ4b ChMk0b” data-language-for-alternatives=”en” data-language-to-translate-into=”de” data-phrase-index=”0″ data-number-of-phrases=”1″><span class=”Q4iAWc”>Thanks in advance</span></span></span>

    Attachments:
    You must be logged in to view attached files.
    #33040

    support
    Keymaster

    Hi,

    Sorry, this looks like something specific to your hardware and not a VisualGDB issue. If you need help getting debug interfaces working on your board, we can gladly provide it at our consulting rate.

    Otherwise, please consider trying other debug methods (e.g. Segger J-Link or running OpenOCD manually). If you can get debugging working outside VisualGDB, we can help you configure VisualGDB to replicate the same results.

    #33116

    Birgit
    Participant

    Hi,

    with a small change in the file stm32h7x_dual_core.cfg at line 122 (use {stm32h7.5….} instead of {stm32h7.5.i..}), the 2nd flash bank is added and debugging is possible.

    if { [regexp -nocase {stm32h7.5….} $_CHIPNAME] || [regexp -nocase {stm32h7.7.i..} $_CHIPNAME]} {
    global _CHIPNAME_CPU1_ACTIVATED

    if { [expr ($_CHIPNAME_CPU1_ACTIVATED == 1)] } {
    # Add the second flash bank
    flash bank $_CHIPNAME.flash1 stm32h7x 0x08100000 0 0 0 $_CHIPNAME.cpu1
    }
    }

    Unfortunately it only works with an empty controller, i.e. I always have to do a full chip erase before. Otherwise I get the error “target not examined yet” or “timed out while waiting for target halted”.

    I’m grateful for every idea. Thanks.

    PS: With the STM32CubeIDE and the ST-Link GDB server, debugging works with your hardware.

     

    Attachments:
    You must be logged in to view attached files.
    #33121

    support
    Keymaster

    Hi,

    This looks like something between OpenOCD and your chip and not specific to VisualGDB. If using STM32CubeIDE works, please try extracting an OpenOCD configuration script from it and manually specifying it in VisualGDB settings. You can also try selecting the ST fork of OpenOCD instead of the default fork to minimize the differences between them.

Viewing 4 posts - 1 through 4 (of 4 total)

You must be logged in to reply to this topic.