ESP32 Problem with enabling BT stack

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  • #9611
    Lanrets
    Participant

    Hello all,

    I have problem with enabling BT_stack for ESP32.

    When I try to call: bt_controller_init(); I get:

    Error undefined reference to `bt_controller_init’

    So I added to: sdkconfig.h

    #define CONFIG_ESP32_ENABLE_STACK_BT 1
    #define CONFIG_BT_ENABLED 1

    Now I get :

    Error undefined reference to `btdm_osi_funcs_register’
    Error undefined reference to `btdm_controller_init’
    Error undefined reference to `btdm_osi_funcs_register’

    Error undefined reference to `btdm_controller_init’
    Error ld returned 1 exit status  

     

    What I am missing?

     

    • This topic was modified 7 years, 4 months ago by Lanrets.
    #9618
    support
    Keymaster

    Hi,

    Sorry about that. Looks like our BSP is missing a reference to the library that provides those functions.

    Please add the <SysGCC>\esp32\esp32-bsp\esp-idf\components\bt\lib\libbtdm_app.a file to your project manually and the Bluetooth functions should get linked properly.

    #9645
    Lanrets
    Participant

    Great! It worked 🙂 (I have edited BSP.xml and recreated project)

    So now I am able to compile and load binary into ESP32. But I get “Double Exception” when I try to call function: “btdm_controller_init(void);”

    Any idea why?

    #9646
    support
    Keymaster

    Hi,

    Have you tried setting optimization to -Og like the tutorial suggests?

    #9668
    Lanrets
    Participant

    Hey,

    Yes, I run debugger with software compiled using ‘-Og’ flag.

    #9669
    support
    Keymaster

    Hi,

    Thanks, we have rechecked this. The ESP32 Bluetooth LE support requires some extra macros to be set in your project configuration file. Please replace your sdkconfig.h file with the following one:

    /*
     *
     * Automatically generated file; DO NOT EDIT.
     * Espressif IoT Development Framework Configuration
     *
     */
    #define CONFIG_TRACEMEM_RESERVE_DRAM 0x0
    #define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE 1
    #define CONFIG_MEMMAP_BT 1
    #define CONFIG_SECURE_BOOTLOADER_DISABLED 1
    #define CONFIG_ESPTOOLPY_FLASHFREQ "40m"
    #define CONFIG_NEWLIB_STDOUT_ADDCR 1
    #define CONFIG_TASK_WDT_CHECK_IDLE_TASK 1
    #define CONFIG_ESPTOOLPY_FLASHSIZE "2MB"
    #define CONFIG_INT_WDT 1
    #define CONFIG_ESPTOOLPY_FLASHFREQ_40M 1
    #define CONFIG_ESPTOOLPY_FLASHSIZE_2MB 1
    #define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
    #define CONFIG_LOG_DEFAULT_LEVEL_INFO 1
    #define CONFIG_BT_RESERVE_DRAM 0x10000
    #define CONFIG_ESP32_PANIC_PRINT_REBOOT 1
    #define CONFIG_LWIP_MAX_SOCKETS 4
    #define CONFIG_ESP32_ENABLE_STACK_BT 1
    #define CONFIG_ULP_COPROC_RESERVE_MEM 0
    #define CONFIG_ESPTOOLPY_BAUD 115200
    #define CONFIG_INT_WDT_CHECK_CPU1 1
    #define CONFIG_TOOLPREFIX "xtensa-esp32-elf-"
    #define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1
    #define CONFIG_ESPTOOLPY_BAUD_115200B 1
    #define CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX 0
    #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
    #define CONFIG_LOG_BOOTLOADER_LEVEL_WARN 1
    #define CONFIG_TASK_WDT 1
    #define CONFIG_MAIN_TASK_STACK_SIZE 4096
    #define CONFIG_TASK_WDT_TIMEOUT_S 5
    #define CONFIG_INT_WDT_TIMEOUT_MS 300
    #define CONFIG_ESPTOOLPY_FLASHMODE "dio"
    #define CONFIG_LOG_DEFAULT_LEVEL 3
    #define CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION 1
    #define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
    #define CONFIG_PYTHON "python"
    #define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 1
    #define CONFIG_ESPTOOLPY_COMPRESSED 1
    #define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
    #define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
    #define CONFIG_PARTITION_TABLE_SINGLE_APP 1
    #define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 2048
    #define CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET 0x10000
    #define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 1
    #define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 240
    #define CONFIG_FREERTOS_HZ 100
    #define CONFIG_LOG_COLORS 1
    #define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
    #define CONFIG_LOG_BOOTLOADER_LEVEL 2
    #define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
    #define CONFIG_ESP32_DEFAULT_CPU_FREQ_240 1
    #define CONFIG_ESP32_DEBUG_OCDAWARE 1
    #define CONFIG_FREERTOS_BREAK_ON_SCHEDULER_START_JTAG 1
    #define CONFIG_BT_ENABLED 1
    #define CONFIG_FREERTOS_CORETIMER_0 1
    #define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
    #define CONFIG_FREERTOS_ISR_STACKSIZE 1536
    #define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1
    #define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32
    #define CONFIG_APP_OFFSET 0x10000
    #define CONFIG_MEMMAP_SMP 1
    #define CONFIG_ESPTOOLPY_PORT "/dev/ttyUSB0"

    Then please use the following linker script to link your Bluetooth LE code:

    MEMORY
    {
      /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
      of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
      are connected to the data port of the CPU and eg allow bytewise access. */
      /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
      iram0_0_seg (RX) : org = 0x40080000, len = 0x20000
      /* Even though the segment name is iram, it is actually mapped to flash */
      iram0_2_seg (RX) : org = 0x400D0018, len = 0x330000
      /* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
    
         Enabling Bluetooth & Trace Memory features in menuconfig will decrease
         the amount of RAM available.
      */
      dram0_0_seg (RW) : org = 0x3FFB0000 + 0x10000,
                                         len = 0x50000 - 0x0 - 0x10000
      /* Flash mapped constant data */
      drom0_0_seg (R) : org = 0x3F400010, len = 0x800000
      /* RTC fast memory (executable). Persists over deep sleep.
       */
      rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000
      /* RTC slow memory (data accessible). Persists over deep sleep.
    
         Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
      */
      rtc_slow_seg(RW) : org = 0x50000000 + 0,
                                         len = 0x1000 - 0
    }
    /* Heap ends at top of dram0_0_seg */
    _heap_end = 0x40000000 - 0x0;
    
    
    INCLUDE esp32.common.ld
    INCLUDE esp32.rom.ld
    INCLUDE esp32.peripherals.ld
    #9672
    Lanrets
    Participant

    Great! It worked 🙂

    Thanks…

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