Hi,
No problem. The ESP32 register definitions are not 100% precise, as they are computed from parsing the ESP-IDF header files. We have updated the code responsible for parsing them to handle some of the previously missing registers (see the R11 toolchain release here).
However, other registers (e.g. SPI, UART) that use non-trivial rules for computing the base addresses are still not included. As a workaround, please consider editing the <SysGCC>\esp32\esp-bsp\registers.xml file manually or hardcoding the rules for the missing register groups in our header file parser.