ESP32 Debugger not halting

[Frank]

Hello,

I’m having trouble debugging my esp32 with visualgdb.
I am able to insert a breakpoint in my entry function app_main(), or functions called from app_main.
When I put a breakpoint in a task or in the event handler the cpu halts but visualgdb isn’t aware that the cpu has halted at that breakpoint and thinks its still running.
From the serial output I can see it has halted before executing the breakpoint line, and when I stop debugging and resume the program it continues from that point.

Any suggestions?

[support]

Hi,

We have encountered similar behavior with ESP8266 – some firmware (specifically AT commands) triggered some undocumented hardware mode that prevented the breakpoints from being handled properly. Unfortunately this is something beyond our control so the only advice we could give here is to experiment with moving the functions to RAM and setting explicit breakpoints (asm(“break 1,1”)) in various functions to understand what triggers this mode.

[Frank]

it seems the breakpoint is being hit but the debugger resets.
This issue is caused by OpenOCD resetting the debug controller??

GDB:

esp32.cpu0: Target halted, pc=0x401074B8
esp32.cpu0: Debug controller was reset (pwrstat=0xFC, after clear 0xFC).
esp32.cpu0: Core was reset (pwrstat=0xFC, after clear 0xFC).
esp32.cpu1: Debug controller was reset (pwrstat=0xFE, after clear 0xFE).
esp32.cpu1: Core was reset (pwrstat=0xFE, after clear 0xFE).

http://pastebin.com/fbiSrjRg for the full gdb output

OpenOCD:

Info : esp32.cpu0: Target halted, pc=0x401074B8
Warn : esp32.cpu1: target not halted

Info : esp32.cpu1: Target halted, pc=0x40080340
esp32.cpu1: target state: halted
Info : esp32.cpu1: placed hw breakpoint 0 at 0x401070FC
Info : esp32.cpu0: placed hw breakpoint 0 at 0x401070FC
Info : esp32.cpu0: Debug controller was reset (pwrstat=0xFC, after clear 0xFC).
Info : esp32.cpu0: Core was reset (pwrstat=0xFC, after clear 0xFC).
Info : esp32.cpu1: Debug controller was reset (pwrstat=0xFE, after clear 0xFE).
Info : esp32.cpu1: Core was reset (pwrstat=0xFE, after clear 0xFE).

http://pastebin.com/zdzytQCt for the full openocd output

[support]

Hi,

ESP32 has 3 different watchdogs that could be restarting the CPU once it is stopped and we experienced similar behavior before we modified the ESP32 OpenOCD to explicitly disable them:

            xtensa_write_hwreg(target, 0x3FF5F064, 0x50d83aa1); //TIMG1 WDT
            xtensa_write_hwreg(target, 0x3FF5F048, 0);
            xtensa_write_hwreg(target, 0x3FF60064, 0x50d83aa1); //TIMG2 WDT
            xtensa_write_hwreg(target, 0x3FF60048, 0);
            xtensa_write_hwreg(target, 0x3ff480a4, 0x50d83aa1); //RTC WDT
            xtensa_write_hwreg(target, 0x3ff4808c, 0);

Our best guess is that in your case this mechanism does not work. Unfortunately the ESP32 tools are currently not very reliable and do not provide good troubleshooting mechanisms, so the only advice we could give is to do some black box experiments to understand what triggers the problem.

[Author]

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