Hello,

I’m having a bit of a nightmare trying to set up a project for STM32L0 devices using openOCD with an ST-Link debugger.

I’m trying to use the 0.8.0-r6 openOCD release that is listed within the “install debugger packages” window. With automatic settings I’ve been getting device ID errors. Using the manual options for openOCD I tried having a play around with the tcl scripts to see if I could fix it.

I went into the “stm32lx_stlink.cfg” file that is automatically selected by default. In there I changed the “CPUTAPID” value to 0x0bc11477. This was the device ID that the output console say it had detected.

After this openOCD was able to get a little further. Now I get a GDB error:

Info : This adapter doesn't support configurable speed
Info : STLINK v2 JTAG v17 API v2 SWIM v0 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 2.892453
Info : stm32lx.cpu: hardware has 4 breakpoints, 2 watchpoints
Info : accepting 'gdb' connection from 3333
Error: attempted 'gdb' connection rejected

So various other things I’ve tried include using the newer openOCD source files but that was getting messy, I’ve tried both STlink-v2 and v2.1. I don’t think theres a problem with these as I’m able to manually upload .bin files to my devices using the STlink utility.

I’ve tried multiple boards, one custom board as well as an STM32L053 discovery board. I’ve also tried using the texane ST-link debug package but that’s not working.

I suspect it’s a problem with GDB now, I have a setting wrong somewhere for the debugger? Am I correct in thinking that the STM32L0 series only supports SWD? This is my stm32lx_stlink.cfg file:

if { [info exists CHIPNAME] == 0 } {
   set CHIPNAME stm32lx
}

if { [info exists CPUTAPID] == 0 } {
   set CPUTAPID 0x0bc11477
}

if { [info exists WORKAREASIZE] == 0 } {
   set WORKAREASIZE 0x2800
}

source [find target/stm32_stlink.cfg]

# Flash base address is known by driver. Flash size will be probed.
#
# Please note that the larger stm32lx targets (256Kb and 384Kb) uses dual
# bank flash. For such targets use target/stm32lx_dual_bank.cfg.
#
# Some samples of ST's stm32lx chips are known to have incorrect flash size
# values programmed in their FLASH_SIZE register. The driver will warn
# for strange values. It is possible to override the flash size probe by
# defining the correct size here. Notice though that it is the size of
# the flash bank
#
# flash bank stm32lx <base> <size> 0 0 <target#> <variant>
set _FLASHNAME $_CHIPNAME.flash
#flash bank $_FLASHNAME stm32lx 0 0 0 0 $_TARGETNAME
flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME

proc stm32l_enable_HSI {} {
 # Enable HSI as clock source
 echo "STM32L: Enabling HSI"

 # Set HSION in RCC_CR
 mww 0x40023800 0x00000101

 # Set HSI as SYSCLK
 mww 0x40023808 0x00000001
}

$_TARGETNAME configure -event reset-init {
 stm32l_enable_HSI
}

$_TARGETNAME configure -event reset-start {
 adapter_khz 300
}

• This topic was modified 9 years, 6 months ago by hammerfet.
• This topic was modified 9 years, 6 months ago by hammerfet.