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Hi, I am trying STM32G431 on VisualGDB but noticed that timer registers CR2, SMCR, CCMR1, CCMR2 and CCMR3 are partially incomplete.
I’ve traced the problem back and noticed that the issue happens because some bit-fields where expanded on this series, when compared to previous STM32 devices. And happens because these bit-fields are now split in different bit positions, instead of a consecutive range of bits. And stm32_bsp_generator handles only consecutive bit ranges.
I am finalizing a patch on this tools, but I still have to make some tests before I send you a Pull Request.
By the way, the StdPeriph Library for STM32F0, STM32F1, STM32F2, STM32F3, STM32F4 and STM32L1 are outdated and some of the XML receipts require update, which I also provided. So, for this I will send a separate PR.
Hi,
Thanks, this looks great! Our parser indeed only handles about 90% of the registers that are defined in a consistent way (getting it to 100% would require exponentially increasing amount of workarounds and special cases). However, this looks like a solid fix that covers several registers at once.
We will review the patches this week and will post an update here once done.
OK, we have reviewed the patches and integrated them into our repository. Thanks again for the pull request.
We have also updated the BSP generator to handle the latest SDKs and are working on an updated BSP.
You can download a preview of the BSP with the latest SDKs here, or simply wait until the next week when we finish running all tests on it and release it officially.
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