Hi,

I’m running the RTOS Http Demo for the ESP8266, using a Segger J-Link to debug.

uart.h includes a uart_init_new() function, which I am calling in user_init(). As far as I can tell, this is all that should be necessary to then have printf() calls logged in the UART output.

I do have some UART output (even without calling uart_init_new()), as far as I can tell, as logged by VisGDB:

c:\sysgcc\esp8266\esp8266-bsp\OpenOCD\bin\openocd.exe -c "gdb_port 53681" -c "telnet_port 53682" -f interface/jlink.cfg -f target/esp8266.cfg -c "adapter_khz 3000" -c "echo VisualGDB_OpenOCD_Ready"
Open On-Chip Debugger 0.9.0 (2015-11-04-20:38)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain connect_deassert_srst
adapter speed: 1000 kHz
stop_wdt
adapter speed: 3000 kHz
VisualGDB_OpenOCD_Ready
Info : J-Link V10 compiled Jan 11 2018 10:41:05
Info : J-Link caps 0xb9ff7bbf
Info : J-Link hw version 101000
Info : J-Link hw type J-Link
Info : J-Link max mem block 14576
Info : J-Link configuration
Info : USB-Address: 0x0
Info : Kickstart power on JTAG-pin 19: 0xffffffff
Info : Vref = 3.367 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 1
Info : J-Link JTAG Interface ready
Info : clock speed 3000 kHz
Info : TAP esp8266.cpu does not have IDCODE
Info : halted: PC: 0x4010278e
Info : debug cause: 0x20
Info : accepting 'gdb' connection on tcp/53681
Info : TAP esp8266.cpu does not have IDCODE
Warn : xtensa_poll: DOSR has set InOCDMode without the Exception flag. Unexpected. DOSR=0x04
target state: halted
Info : halted: PC: 0x4010278e
Info : debug cause: 0x20
Warn : xtensa_deassert_reset: 'reset halt' is not supported for Xtensa. Have halted some time after resetting (not the same thing!)
Info : TAP esp8266.cpu does not have IDCODE
Warn : xtensa_poll: DOSR has set InOCDMode without the Exception flag. Unexpected. DOSR=0x04
target state: halted
Info : halted: PC: 0x4010278e
Info : debug cause: 0x20
Warn : xtensa_deassert_reset: 'reset halt' is not supported for Xtensa. Have halted some time after resetting (not the same thing!)
Info : halted: PC: 0x40102791
Info : debug cause: 0x1
Info : halted: PC: 0x4010013c
Info : debug cause: 0x8
Info : halted: PC: 0x4010013c
Info : debug cause: 0x8
Info : halted: PC: 0x4010013c
Info : debug cause: 0x8
Info : halted: PC: 0x4010013c
Info : debug cause: 0x8
Info : halted: PC: 0x4010013c
Info : debug cause: 0x8
Info : halted: PC: 0x4010013c
Info : debug cause: 0x8
Info : halted: PC: 0x4010013c
Info : debug cause: 0x8
Info : halted: PC: 0x4010013c
Info : debug cause: 0x8
Interrupt suppression during single-stepping is now enabled
Watchdog feeding during stops is now enabled
Info : halted: PC: 0x40100004
Info : debug cause: 0x2

Does this mean the UART connection is working, but printf() somehow isn’t being logged there?

I have left uart_init_new() as implemented by default:

UART_WaitTxFifoEmpty(UART0);
UART_WaitTxFifoEmpty(UART1);

UART_ConfigTypeDef uart_config;
uart_config.baud_rate = BIT_RATE_74880;
uart_config.data_bits = UART_WordLength_8b;
uart_config.parity = USART_Parity_None;
uart_config.stop_bits = USART_StopBits_1;
uart_config.flow_ctrl = USART_HardwareFlowControl_None;
uart_config.UART_RxFlowThresh = 120;
uart_config.UART_InverseMask = UART_None_Inverse;
UART_ParamConfig(UART0, &uart_config);

UART_IntrConfTypeDef uart_intr;
uart_intr.UART_IntrEnMask = UART_RXFIFO_TOUT_INT_ENA | UART_FRM_ERR_INT_ENA | UART_RXFIFO_FULL_INT_ENA | UART_TXFIFO_EMPTY_INT_ENA;
uart_intr.UART_RX_FifoFullIntrThresh = 10;
uart_intr.UART_RX_TimeOutIntrThresh = 2;
uart_intr.UART_TX_FifoEmptyIntrThresh = 20;
UART_IntrConfig(UART0, &uart_intr);

UART_SetPrintPort(UART0);
UART_intr_handler_register(uart0_rx_intr_handler, NULL);
ETS_UART_INTR_ENABLE();

Any advice on how to get logging to work properly?