HAL
TIM_HandleTypeDef::ChannelState is only used within HAL.
 
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CodeScopeSTM32 Libraries and SamplesHALTIM_HandleTypeDef::ChannelState

TIM_HandleTypeDef::ChannelState field

TIM channel operation state

Syntax

__IO HAL_TIM_ChannelStateTypeDef ChannelState[4];

References

LocationReferrerText
stm32f4xx_hal_tim.h:347
__IO HAL_TIM_ChannelStateTypeDef ChannelState[4]; /*!< TIM channel operation state */
stm32f4xx_hal_tim.c:312HAL_TIM_Base_Init()
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:352HAL_TIM_Base_DeInit()
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim.c:696HAL_TIM_OC_Init()
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:736HAL_TIM_OC_DeInit()
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim.c:797HAL_TIM_OC_Start()
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
stm32f4xx_hal_tim.c:803HAL_TIM_OC_Start()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:861HAL_TIM_OC_Stop()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:887HAL_TIM_OC_Start_IT()
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
stm32f4xx_hal_tim.c:893HAL_TIM_OC_Start_IT()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:1028HAL_TIM_OC_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:1058HAL_TIM_OC_Start_DMA()
if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
stm32f4xx_hal_tim.c:1062HAL_TIM_OC_Start_DMA()
else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
stm32f4xx_hal_tim.c:1070HAL_TIM_OC_Start_DMA()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:1273HAL_TIM_OC_Stop_DMA()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:1361HAL_TIM_PWM_Init()
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:1401HAL_TIM_PWM_DeInit()
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim.c:1462HAL_TIM_PWM_Start()
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
stm32f4xx_hal_tim.c:1468HAL_TIM_PWM_Start()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:1526HAL_TIM_PWM_Stop()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:1552HAL_TIM_PWM_Start_IT()
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
stm32f4xx_hal_tim.c:1558HAL_TIM_PWM_Start_IT()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:1693HAL_TIM_PWM_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:1723HAL_TIM_PWM_Start_DMA()
if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
stm32f4xx_hal_tim.c:1727HAL_TIM_PWM_Start_DMA()
else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
stm32f4xx_hal_tim.c:1735HAL_TIM_PWM_Start_DMA()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:1937HAL_TIM_PWM_Stop_DMA()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2025HAL_TIM_IC_Init()
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2065HAL_TIM_IC_DeInit()
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim.c:2121HAL_TIM_IC_Start()
HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
stm32f4xx_hal_tim.c:2135HAL_TIM_IC_Start()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:2182HAL_TIM_IC_Stop()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2205HAL_TIM_IC_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
stm32f4xx_hal_tim.c:2219HAL_TIM_IC_Start_IT()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:2343HAL_TIM_IC_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2369HAL_TIM_IC_Start_DMA()
HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
stm32f4xx_hal_tim.c:2391HAL_TIM_IC_Start_DMA()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:2579HAL_TIM_IC_Stop_DMA()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2681HAL_TIM_OnePulse_Init()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2682HAL_TIM_OnePulse_Init()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2723HAL_TIM_OnePulse_DeInit()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim.c:2724HAL_TIM_OnePulse_DeInit()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim.c:2779HAL_TIM_OnePulse_Start()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim.c:2780HAL_TIM_OnePulse_Start()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim.c:2797HAL_TIM_OnePulse_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:2798HAL_TIM_OnePulse_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:2858HAL_TIM_OnePulse_Stop()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2859HAL_TIM_OnePulse_Stop()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2879HAL_TIM_OnePulse_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim.c:2880HAL_TIM_OnePulse_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim.c:2897HAL_TIM_OnePulse_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:2898HAL_TIM_OnePulse_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:2969HAL_TIM_OnePulse_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:2970HAL_TIM_OnePulse_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3117HAL_TIM_Encoder_Init()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3118HAL_TIM_Encoder_Init()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3160HAL_TIM_Encoder_DeInit()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim.c:3161HAL_TIM_Encoder_DeInit()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim.c:3216HAL_TIM_Encoder_Start()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim.c:3217HAL_TIM_Encoder_Start()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim.c:3234HAL_TIM_Encoder_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3247HAL_TIM_Encoder_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3262HAL_TIM_Encoder_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3263HAL_TIM_Encoder_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3343HAL_TIM_Encoder_Stop()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3348HAL_TIM_Encoder_Stop()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3349HAL_TIM_Encoder_Stop()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3370HAL_TIM_Encoder_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim.c:3371HAL_TIM_Encoder_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim.c:3388HAL_TIM_Encoder_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3401HAL_TIM_Encoder_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3416HAL_TIM_Encoder_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3417HAL_TIM_Encoder_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3505HAL_TIM_Encoder_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3510HAL_TIM_Encoder_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3511HAL_TIM_Encoder_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3536HAL_TIM_Encoder_Start_DMA()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim.c:3537HAL_TIM_Encoder_Start_DMA()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim.c:3561HAL_TIM_Encoder_Start_DMA()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3586HAL_TIM_Encoder_Start_DMA()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3615HAL_TIM_Encoder_Start_DMA()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3616HAL_TIM_Encoder_Start_DMA()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim.c:3787HAL_TIM_Encoder_Stop_DMA()
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3792HAL_TIM_Encoder_Stop_DMA()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:3793HAL_TIM_Encoder_Stop_DMA()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6424HAL_TIM_GetChannelState()
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
stm32f4xx_hal_tim.c:6466TIM_DMAError()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6471TIM_DMAError()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6476TIM_DMAError()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6481TIM_DMAError()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6512TIM_DMADelayPulseCplt()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6521TIM_DMADelayPulseCplt()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6530TIM_DMADelayPulseCplt()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6539TIM_DMADelayPulseCplt()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6610TIM_DMACaptureCplt()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6620TIM_DMACaptureCplt()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6630TIM_DMACaptureCplt()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim.c:6640TIM_DMACaptureCplt()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:224HAL_TIMEx_HallSensor_Init()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:225HAL_TIMEx_HallSensor_Init()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:266HAL_TIMEx_HallSensor_DeInit()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim_ex.c:267HAL_TIMEx_HallSensor_DeInit()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
stm32f4xx_hal_tim_ex.c:318HAL_TIMEx_HallSensor_Start()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim_ex.c:319HAL_TIMEx_HallSensor_Start()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim_ex.c:336HAL_TIMEx_HallSensor_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:337HAL_TIMEx_HallSensor_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:383HAL_TIMEx_HallSensor_Stop()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:384HAL_TIMEx_HallSensor_Stop()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:400HAL_TIMEx_HallSensor_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim_ex.c:401HAL_TIMEx_HallSensor_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim_ex.c:418HAL_TIMEx_HallSensor_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:419HAL_TIMEx_HallSensor_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:471HAL_TIMEx_HallSensor_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:472HAL_TIMEx_HallSensor_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:490HAL_TIMEx_HallSensor_Start_DMA()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim_ex.c:511HAL_TIMEx_HallSensor_Start_DMA()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:583HAL_TIMEx_HallSensor_Stop_DMA()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:1573HAL_TIMEx_OnePulseN_Start()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim_ex.c:1574HAL_TIMEx_OnePulseN_Start()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim_ex.c:1591HAL_TIMEx_OnePulseN_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:1592HAL_TIMEx_OnePulseN_Start()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:1637HAL_TIMEx_OnePulseN_Stop()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:1638HAL_TIMEx_OnePulseN_Stop()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:1661HAL_TIMEx_OnePulseN_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
stm32f4xx_hal_tim_ex.c:1662HAL_TIMEx_OnePulseN_Start_IT()
HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
stm32f4xx_hal_tim_ex.c:1679HAL_TIMEx_OnePulseN_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:1680HAL_TIMEx_OnePulseN_Start_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
stm32f4xx_hal_tim_ex.c:1737HAL_TIMEx_OnePulseN_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
stm32f4xx_hal_tim_ex.c:1738HAL_TIMEx_OnePulseN_Stop_IT()
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);

Data Use

Type of TIM_HandleTypeDef::ChannelState
TIM_HandleTypeDef::ChannelState
all items filtered out