OpenOCD
log_levels::LOG_LVL_WARNING is only used within OpenOCD.
 
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CodeScopeDevelopment ToolsOpenOCDlog_levels::LOG_LVL_WARNING

log_levels::LOG_LVL_WARNING

Syntax

LOG_LVL_WARNING = 1;

References

LocationReferrerText
log.h:45
LOG_LVL_WARNING = 1,
FLASHPlugin.c:186loaded_plugin_load()
LOG_WARNING("Invalid size of timeouts structure: %d\n", timeout_struct_size);
aarch64.c:1255aarch64_set_breakpoint()
LOG_WARNING("breakpoint already set");
aarch64.c:1376aarch64_set_context_breakpoint()
LOG_WARNING("breakpoint already set");
aarch64.c:1429aarch64_set_hybrid_breakpoint()
LOG_WARNING("breakpoint already set");
aarch64.c:1509aarch64_unset_breakpoint()
LOG_WARNING("breakpoint not set");
aarch64.c:1715aarch64_set_watchpoint()
LOG_WARNING("watchpoint already set");
aarch64.c:1747aarch64_set_watchpoint()
LOG_WARNING("Adjust watchpoint match inside 8-byte boundary");
aarch64.c:1797aarch64_unset_watchpoint()
LOG_WARNING("watchpoint not set");
aarch64.c:1979aarch64_assert_reset()
LOG_WARNING("%s: Error enabling Reset Catch debug event; the CPU will not halt immediately after reset!",
aarch64.c:1982aarch64_assert_reset()
LOG_WARNING("%s: Target not examined, will not halt immediately after reset!",
aarch64.c:2032aarch64_deassert_reset()
LOG_WARNING("%s: Clearing Reset Catch debug event failed",
aarch64.c:2038aarch64_deassert_reset()
LOG_WARNING("%s: Disabling Reset Catch debug event failed",
aarch64.c:2042aarch64_deassert_reset()
LOG_WARNING("%s: ran after reset and before halt ...",
adapter.c:139adapter_init()
LOG_WARNING("An adapter speed is not selected in the init scripts."
adapter.c:142adapter_init()
LOG_WARNING("To remove this warnings and achieve reasonable communication speed with the target,"
adapter.c:344adapter_usb_location_equal()
LOG_WARNING("no '-' in usb path\n");
adapter.c:431handle_adapter_driver_command()
LOG_WARNING("Interface already configured, ignoring");
adi_v5_dapdirect.c:51dapdirect_jtag_reset_command()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
adi_v5_dapdirect.c:202dapdirect_init()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
adi_v5_swd.c:427swd_connect()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
adi_v5_swd.c:445swd_connect()
LOG_WARNING("Connecting DP: stalled AP operation, issuing ABORT");
aduc702x.c:180aduc702x_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
aduc702x.c:199aduc702x_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
aduc702x.c:314aduc702x_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
aducm360.c:219aducm360_write_block_sync()
LOG_WARNING("no working area available, can't do block memory writes");
aducm360.c:234aducm360_write_block_sync()
LOG_WARNING("couldn't allocate a buffer space of 0x%08" PRIx32 "bytes in the target's SRAM.",
aducm360.c:238aducm360_write_block_sync()
LOG_WARNING("no large enough working area available, can't do block memory writes");
aducm360.c:342aducm360_write_block_async()
LOG_WARNING("no working area available, can't do block memory writes");
aducm360.c:357aducm360_write_block_async()
LOG_WARNING("couldn't allocate a buffer space of 0x%08" PRIx32 "bytes in the target's SRAM.",
aducm360.c:361aducm360_write_block_async()
LOG_WARNING("no large enough working area available, can't do block memory writes");
aducm360.c:481aducm360_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
arc.c:794arc_halt()
LOG_WARNING("target was in unknown state when halt was requested");
arc.c:1012arc_examine_debug_reason()
LOG_WARNING("Target halted by an unused actionpoint.");
arc.c:1019arc_examine_debug_reason()
LOG_WARNING("Unknown type of actionpoint.");
arc.c:1049arc_poll()
LOG_WARNING("target is still running!");
arc.c:1550arc_set_breakpoint()
LOG_WARNING("breakpoint already set");
arc.c:1635arc_unset_breakpoint()
LOG_WARNING("breakpoint not set");
arc.c:1654arc_unset_breakpoint()
LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR
arc.c:1670arc_unset_breakpoint()
LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR
arc.c:1875arc_set_watchpoint()
LOG_WARNING("watchpoint already set");
arc.c:1935arc_unset_watchpoint()
LOG_WARNING("watchpoint not set");
arc.c:2012arc_hit_watchpoint()
LOG_WARNING("Target halted by unused actionpoint.");
arc.c:2016arc_hit_watchpoint()
LOG_WARNING("Target halted by breakpoint, but is treated as a watchpoint.");
arc_mem.c:250arc_mem_read()
LOG_WARNING("target not halted");
arm-jtag-ew.c:455armjtagew_get_version_info()
LOG_WARNING(
arm11.c:386arm11_halt()
LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
arm11.c:530arm11_resume()
LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
arm11.c:675arm11_step()
LOG_WARNING(
arm11.c:709arm11_assert_reset()
LOG_WARNING("Reset is not asserted because the target is not examined.");
arm11.c:710arm11_assert_reset()
LOG_WARNING("Use a reset button or power cycle the target.");
arm11.c:769arm11_deassert_reset()
LOG_WARNING("%s: ran after reset and before halt ...",
arm11_dbgtap.c:406arm11_run_instr_no_data()
LOG_WARNING(
arm11_dbgtap.c:489arm11_run_instr_data_to_core()
LOG_WARNING(
arm11_dbgtap.c:521arm11_run_instr_data_to_core()
LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
arm11_dbgtap.c:766arm11_run_instr_data_from_core()
LOG_WARNING(
arm11_dbgtap.c:901arm11_sc7_run()
LOG_WARNING(
arm11_dbgtap.c:915arm11_sc7_run()
LOG_WARNING("Scan chain 7 shifted out unexpected address");
arm11_dbgtap.c:921arm11_sc7_run()
LOG_WARNING("Scan chain 7 shifted out unexpected data");
arm7_9_common.c:113arm7_9_set_software_breakpoints()
LOG_WARNING("can't enable sw breakpoints with no watchpoint unit available");
arm7_9_common.c:298arm7_9_unset_breakpoint()
LOG_WARNING("breakpoint not set");
arm7_9_common.c:533arm7_9_unset_watchpoint()
LOG_WARNING("breakpoint not set");
arm7_9_common.c:840arm7_9_poll()
LOG_WARNING(
arm7_9_common.c:870arm7_9_assert_reset()
LOG_WARNING("Reset is not asserted because the target is not examined.");
arm7_9_common.c:871arm7_9_assert_reset()
LOG_WARNING("Use a reset button or power cycle the target.");
arm7_9_common.c:992arm7_9_deassert_reset()
LOG_WARNING(
arm7_9_common.c:1187arm7_9_halt()
LOG_WARNING("target was in unknown state when halt was requested");
arm7_9_common.c:2255arm7_9_read_memory()
LOG_WARNING(
arm7_9_common.c:2469arm7_9_write_memory()
LOG_WARNING(
arm7_9_common.c:2705arm7_9_check_reset()
LOG_WARNING(
arm7_9_common.c:2709arm7_9_check_reset()
LOG_WARNING("NOTE! Severe performance degradation without working memory enabled.");
arm7_9_common.c:2712arm7_9_check_reset()
LOG_WARNING(
arm926ejs.c:293arm926ejs_examine_debug_reason()
LOG_WARNING("WARNING: mystery debug reason MOE = 0xc. Try issuing a resume + halt.");
arm926ejs.c:297arm926ejs_examine_debug_reason()
LOG_WARNING("WARNING: unknown debug reason: 0x%x", debug_reason);
arm946e.c:682arm946e_handle_idcache()
LOG_WARNING("arm946e: MPU must be enabled for cache to operate");
arm_adi_v5.c:2414adiv5_jim_spot_configure()
LOG_WARNING("DEPRECATED! use \'-baseaddr' not \'-ctibase\'");
arm_dpm.c:241arm_dpm_read_reg()
LOG_WARNING("Jazelle PC adjustment unknown");
arm_dpm.c:244arm_dpm_read_reg()
LOG_WARNING("unknown core state");
arm_dpm.c:675dpm_mapmode()
LOG_WARNING("invalid register #%u", num);
arm_dpm.c:1177arm_dpm_initialize()
LOG_WARNING("%s: can't disable breakpoints and watchpoints",
arm_simulator.c:388arm_simulate_step_core()
LOG_WARNING("unhandled instruction type");
arm_simulator.c:407arm_simulate_step_core()
LOG_WARNING("no updating of flags yet");
arm_simulator.c:416arm_simulate_step_core()
LOG_WARNING("no updating of flags yet");
armv4_5.c:472arm_set_cpsr()
LOG_WARNING("ThumbEE -- incomplete support");
armv4_5.c:1380armv4_5_run_algorithm_completion()
LOG_WARNING(
armv7m.c:542armv7m_start_algorithm()
LOG_TARGET_WARNING(target, "Storing invalid register %s", reg->name);
armv8.c:945armv8_set_cpsr()
LOG_WARNING("ThumbEE -- incomplete support");
armv8.c:1233armv8_handle_exception_catch_command()
LOG_WARNING("Exception Catch: unknown exception catch configuration: EDECCR = %02" PRIx32, edeccr & 0xff);
armv8_dpm.c:1499armv8_dpm_initialize()
LOG_WARNING("%s: can't disable breakpoints and watchpoints",
at91sam7.c:382at91sam7_read_part_info()
LOG_WARNING("Cannot identify target as an AT91SAM");
at91sam7.c:918at91sam7_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required alignment 0x%" PRIx32 "",
at91samd.c:471samd_probe()
LOG_WARNING("SAMD: bank size doesn't match NVM parameters. "
at91samd.c:788samd_protect()
LOG_WARNING("SAMD: protect settings were not made persistent!");
ath79.c:647ath79_write()
LOG_WARNING("Write pasts end of flash. Extra data discarded.");
ath79.c:716ath79_read()
LOG_WARNING("Reads past end of flash. Extra data discarded.");
ath79.c:807ath79_probe()
LOG_WARNING("device needs 2-byte addresses - not implemented");
ath79.c:809ath79_probe()
LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
atsame5.c:300same5_probe()
LOG_WARNING("SAM: bank size doesn't match NVM parameters. "
atsame5.c:609same5_protect()
LOG_WARNING("SAM: protect settings were not made persistent!");
avr32_ap7k.c:269avr32_ap7k_halt()
LOG_WARNING("target was in unknown state when halt was requested");
avrf.c:250avrf_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
bluenrg-x.c:272bluenrgx_write()
LOG_WARNING("no working area available, can't do block memory writes");
bluenrg-x.c:284bluenrgx_write()
LOG_WARNING("no large enough working area available");
cfi.c:483cfi_read_intel_pri_ext()
LOG_WARNING("expected one protection register field, but found %i",
cfi.c:1091cfi_protect()
LOG_WARNING("protect: cfi primary command set %i unsupported", cfi_info->pri_id);
cfi.c:1237cfi_intel_write_block()
LOG_WARNING("Internal error - target code buffer to small. "
cfi.c:1249cfi_intel_write_block()
LOG_WARNING("No working area available, can't do block memory writes");
cfi.c:1267cfi_intel_write_block()
LOG_WARNING(
cfi.c:1508cfi_spansion_write_block_mips()
LOG_WARNING(
cfi.c:1887cfi_spansion_write_block()
LOG_WARNING(
cfi.c:2817cfi_probe()
LOG_WARNING("configuration specifies 0x%" PRIx32 " size, but a 0x%" PRIx32
cfi.c:2852cfi_probe()
LOG_WARNING(
chibios.c:170chibios_update_memory_signature()
LOG_WARNING("ChibiOS/RT memory signature claims to be bigger than"
chibios.c:525chibios_create()
LOG_WARNING("Could not find target \"%s\" in ChibiOS compatibility "
cmsis_dap.c:2176cmsis_dap_handle_vid_pid_command()
LOG_WARNING("ignoring extra IDs in cmsis-dap vid_pid "
cmsis_dap.c:2181cmsis_dap_handle_vid_pid_command()
LOG_WARNING("incomplete cmsis-dap vid_pid configuration directive");
cmsis_dap_usb_bulk.c:142cmsis_dap_usb_open()
LOG_WARNING(msg, dev_desc.idVendor, dev_desc.idProduct,
cmsis_dap_usb_bulk.c:166cmsis_dap_usb_open()
LOG_WARNING("could not read product string for device 0x%04x:0x%04x: %s",
cmsis_dap_usb_bulk.c:288cmsis_dap_usb_open()
LOG_WARNING("Using CMSIS-DAPv2 interface %d with wrong class %" PRId8
cmsis_dap_usb_bulk.c:363cmsis_dap_usb_open()
LOG_WARNING("could not claim interface: %s", libusb_strerror(err));
core.c:238nand_build_bbt()
LOG_WARNING("bad block: %i", i);
core.c:224flash_free_all_banks()
LOG_WARNING("Flash driver of %s does not support free_driver_priv()", bank->name);
core.c:524flash_iterate_address_range_inner()
LOG_WARNING("Adding extra %s range, "
core.c:545flash_iterate_address_range_inner()
LOG_WARNING("Adding extra %s range, "
core.c:790flash_write_unlock_verify()
LOG_WARNING("empty section %d", section);
core.c:801flash_write_unlock_verify()
LOG_WARNING("no flash bank found for address " TARGET_ADDR_FMT, run_address);
core.c:868flash_write_unlock_verify()
LOG_WARNING("Section start address " TARGET_ADDR_FMT
core.c:871flash_write_unlock_verify()
LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT,
core.c:259jtag_tap_by_string()
LOG_WARNING("Specify TAP '%s' by name, not number %u",
core.c:897jtag_check_value_inner()
LOG_WARNING("Bad value '%s' captured during DR or IR scan:",
core.c:899jtag_check_value_inner()
LOG_WARNING(" check_value: 0x%s", in_check_value_str);
core.c:908jtag_check_value_inner()
LOG_WARNING(" check_mask: 0x%s", in_check_mask_str);
core.c:1171jtag_examine_chain_end()
LOG_WARNING("Unexpected idcode after end of chain: %d 0x%08x",
core.c:1201jtag_examine_chain_match_tap()
jtag_examine_chain_display(LOG_LVL_WARNING, "UNEXPECTED",
core.c:1400jtag_validate_ircapture()
LOG_WARNING("AUTO %s - use \"jtag newtap %s %s -irlen %u "
core.c:1525jtag_init_inner()
LOG_WARNING("There are no enabled taps. "
core.c:1578jtag_init_inner()
LOG_WARNING("Bypassing JTAG setup events due to errors");
core.c:1646jtag_init_reset()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
core.c:1679jtag_init()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
cortex_a.c:1292cortex_a_set_breakpoint()
LOG_WARNING("breakpoint already set");
cortex_a.c:1384cortex_a_set_context_breakpoint()
LOG_WARNING("breakpoint already set");
cortex_a.c:1436cortex_a_set_hybrid_breakpoint()
LOG_WARNING("breakpoint already set");
cortex_a.c:1510cortex_a_unset_breakpoint()
LOG_WARNING("breakpoint not set");
cortex_a.c:1711cortex_a_set_watchpoint()
LOG_WARNING("watchpoint already set");
cortex_a.c:1726cortex_a_set_watchpoint()
LOG_WARNING("watchpoint length must be a power of 2");
cortex_a.c:1731cortex_a_set_watchpoint()
LOG_WARNING("watchpoint address must be aligned at length");
cortex_a.c:1807cortex_a_unset_watchpoint()
LOG_WARNING("watchpoint not set");
cortex_a.c:1943cortex_a_deassert_reset()
LOG_WARNING("%s: ran after reset and before halt ...",
cortex_a.c:2944cortex_a_examine_first()
LOG_WARNING("Debug base address for target %s has bit 31 set to 0. Access to debug registers will likely fail!\n"
cortex_m.c:1079cortex_m_poll_one()
LOG_TARGET_WARNING(target, "external resume detected");
cortex_m.c:1204cortex_m_halt_one()
LOG_TARGET_WARNING(target, "target was in unknown state when halt was requested");
cortex_m.c:1461cortex_m_resume()
LOG_WARNING("resume of a SMP target failed, trying to resume current one");
cortex_m.c:1808cortex_m_reset_lpc55sx()
LOG_WARNING("LPC55Sx: could not locate the entry point in FLASH memory. Performing a reset using DM-AP.");
cortex_m.c:1824cortex_m_reset_lpc55sx()
LOG_WARNING("LPC55Sx: timed out waiting for post-reset breakpoint. Performing a reset using DM-AP.");
cortex_m.c:1953cortex_m_assert_reset()
LOG_TARGET_WARNING(target, "VECTRESET is not supported on this Cortex-M core, using SYSRESETREQ instead.");
cortex_m.c:1954cortex_m_assert_reset()
LOG_TARGET_WARNING(target, "Set 'cortex_m reset_config sysresetreq'.");
cortex_m.c:1961cortex_m_assert_reset()
LOG_TARGET_WARNING(target, "Only resetting the Cortex-M core, use a reset-init event "
cortex_m.c:2031cortex_m_set_breakpoint()
LOG_TARGET_WARNING(target, "breakpoint (BPID: %" PRIu32 ") already set", breakpoint->unique_id);
cortex_m.c:2115cortex_m_unset_breakpoint()
LOG_TARGET_WARNING(target, "breakpoint not set");
cortex_m.c:2262cortex_m_unset_watchpoint()
LOG_TARGET_WARNING(target, "watchpoint (wpid: %d) not set",
cortex_m.c:2710cortex_m_has_tz()
LOG_WARNING("Error reading DAUTHSTATUS register");
cortex_m.c:2809cortex_m_examine()
LOG_TARGET_WARNING(target, "Erratum 702596: single stepping may enter pending exception handler!");
cortex_m.c:2813cortex_m_examine()
LOG_TARGET_WARNING(target, "Erratum 3092511: Cortex-M7 can halt in an incorrect address when breakpoint and exception occurs simultaneously");
cortex_m.c:2816cortex_m_examine()
LOG_WARNING("No erratum 3092511 workaround on hla adapter");
cortex_m.c:3251handle_cortex_m_reset_config_command()
LOG_TARGET_WARNING(target, "VECTRESET is not supported on your Cortex-M core!");
dsp563xx.c:1106dsp563xx_halt()
LOG_WARNING("target was in unknown state when halt was requested");
dsp563xx.c:1527dsp563xx_read_memory_core()
LOG_WARNING("target not halted");
dsp5680xx.c:589switch_tap()
LOG_WARNING
dsp5680xx.c:943dsp5680xx_poll()
LOG_WARNING(msg, __func__);
dsp5680xx.c:960dsp5680xx_poll()
LOG_WARNING(msg, __func__);
dsp5680xx.c:973dsp5680xx_poll()
LOG_WARNING
dsp5680xx.c:2124dsp5680xx_f_unlock()
LOG_WARNING("Memory was not locked.");
eCos.c:568ecos_check_app_info()
LOG_WARNING("eCos: Unexpected unique_id width %" PRIu8, param->uid_width);
efm32.c:449efm32x_wait_status()
LOG_WARNING("page erase was aborted");
efm32.c:816efm32x_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
efm32.c:834efm32x_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
efm32.c:1010efm32x_priv_write()
LOG_WARNING("couldn't use block writes, falling back to single "
em357.c:401em357_protect()
LOG_WARNING("aligned start protect sector to a %d sector boundary",
em357.c:406em357_protect()
LOG_WARNING("aligned end protect sector to a %d sector boundary",
em357.c:426em357_protect()
LOG_WARNING("reg, bit: %d, %d", reg, bit);
em357.c:488em357_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
em357.c:505em357_write_block()
LOG_WARNING(
em357.c:587em357_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
em357.c:609em357_write()
LOG_WARNING(
em357.c:699em357_probe()
LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
embKernel.c:116embkernel_create()
LOG_WARNING("Could not find target \"%s\" in embKernel compatibility "
eneispif.c:228eneispif_write()
LOG_WARNING("Write past end of flash. Extra data discarded.");
eneispif.c:362eneispif_probe()
LOG_WARNING("device needs 2-byte addresses - not implemented");
esp.c:84esp_dbgstubs_table_read()
LOG_WARNING("Not full dbg stub table %d of %d", dbg_stubs->entries_count, table_size - table_start_id);
esp32_apptrace.c:244esp32_apptrace_tcp_dest_init()
LOG_WARNING("apptrace: Connection failed (%s)", strerror(errno));
esp32_apptrace.c:983esp32_apptrace_check_connection()
LOG_TARGET_WARNING(ctx->cpus[i], "apptrace connection is lost. Re-connect.");
esp32_apptrace.c:990esp32_apptrace_check_connection()
LOG_TARGET_WARNING(ctx->cpus[i], "in critical state. Retry in next poll");
esp32_apptrace.c:992esp32_apptrace_check_connection()
LOG_WARNING("No available core");
esp32_apptrace.c:1449esp32_cmd_apptrace_generic()
LOG_WARNING("Current target '%s' was not examined!", target_name(target));
esp32_apptrace.c:1454esp32_cmd_apptrace_generic()
LOG_WARNING("Run command on target '%s'", target_name(target));
esp32_sysview.c:378esp32_sysview_process_packet()
LOG_WARNING("sysview: invalid core ID in packet %d, must be less then %d! Event id %d",
etb.c:494etb_status()
LOG_WARNING("ETB: trace complete without triggering?");
etm.c:313etm_build_reg_cache()
LOG_WARNING("ETMv2+ support is incomplete");
etm.c:346etm_build_reg_cache()
LOG_WARNING("Bad ETMv1 protocol %d", config >> 28);
etm.c:917etmv1_analyze_trace()
LOG_WARNING(
feroceon.c:56feroceon_assert_reset()
LOG_WARNING("Reset is not asserted because the target is not examined.");
feroceon.c:57feroceon_assert_reset()
LOG_WARNING("Use a reset button or power cycle the target.");
fespi.c:498fespi_write()
LOG_WARNING("Write past end of flash. Extra data discarded.");
fespi.c:547fespi_write()
LOG_WARNING("Couldn't allocate data working area.");
fespi.c:556fespi_write()
LOG_WARNING("Couldn't allocate %zd-byte working area.", bin_size);
fespi.c:794fespi_probe()
LOG_WARNING("device needs 2-byte addresses - not implemented");
fm3.c:281fm3_erase()
LOG_WARNING("no working area available, can't do block memory writes");
fm3.c:522fm3_write_block()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
fm3.c:529fm3_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
fm3.c:559fm3_write_block()
LOG_WARNING("No large enough working area available, can't do block memory writes");
fm3.c:889fm3_chip_erase()
LOG_WARNING("no working area available, can't do block memory writes");
fm4.c:117fm4_flash_erase()
LOG_WARNING("Cannot communicate... target not halted.");
fm4.c:225fm4_flash_write()
LOG_WARNING("length %" PRIu32 " is not 2-byte aligned, rounding up",
fm4.c:230fm4_flash_write()
LOG_WARNING("Cannot communicate... target not halted.");
fm4.c:419s6e2cc_probe()
LOG_WARNING("Dual Flash mode is not implemented.");
fm4.c:501fm4_probe()
LOG_WARNING("Cannot communicate... target not halted.");
fm4.c:548fm4_get_info_command()
LOG_WARNING("Cannot communicate... target not halted.");
fm4.c:630mb9bf_bank_setup()
LOG_WARNING("MB9BF variant %s not recognized.", variant);
fm4.c:648s6e2cc_bank_setup()
LOG_WARNING("S6E2CC variant %s not recognized.", variant);
fm4.c:683fm4_flash_bank_command()
LOG_WARNING("Family %s not recognized.", variant);
ftdi.c:870ftdi_handle_vid_pid_command()
LOG_WARNING("ignoring extra IDs in ftdi vid_pid "
ftdi.c:875ftdi_handle_vid_pid_command()
LOG_WARNING("incomplete ftdi vid_pid configuration directive");
gdb_server.c:349gdb_write()
LOG_WARNING("Error writing to GDB socket. Dropping the connection.");
gdb_server.c:484gdb_put_packet_inner()
LOG_WARNING("negative reply, retrying");
gdb_server.c:498gdb_put_packet_inner()
LOG_WARNING("negative reply, retrying");
gdb_server.c:685gdb_get_packet_inner()
LOG_WARNING("acknowledgment received, but no packet pending");
gdb_server.c:693gdb_get_packet_inner()
LOG_WARNING("negative acknowledgment, but no packet pending");
gdb_server.c:701gdb_get_packet_inner()
LOG_WARNING("ignoring character 0x%x", character);
gdb_server.c:1077gdb_new_connection()
LOG_TARGET_WARNING(target, "GDB connection %d not halted",
gdb_server.c:1327gdb_set_registers_packet()
LOG_WARNING("GDB set_registers packet with uneven characters received, dropping connection");
gdb_server.c:1524gdb_read_memory_packet()
LOG_WARNING("invalid read memory packet received (len == 0)");
gdb_server.c:2029gdb_memory_map()
LOG_WARNING("The flash sector at offset 0x%08" PRIx32
gdb_server.c:2032gdb_memory_map()
LOG_WARNING("The rest of bank will not show in gdb memory map.");
gdb_server.c:2447smp_reg_list_noread()
LOG_TARGET_WARNING(head->target, "Register %s does not exist, which is part of an SMP group where "
gdb_server.c:2933gdb_query_packet()
LOG_WARNING("Target Descriptions Supported, but disabled");
gdb_server.c:3641gdb_input_inner()
LOG_WARNING("Prefer GDB command \"target extended-remote :%s\" instead of \"target remote :%s\"",
gdb_server.c:3662gdb_input_inner()
LOG_WARNING("WARNING! The target is already running. "
gdb_server.c:3667gdb_input_inner()
LOG_WARNING("The target is not in the halted nor running stated, "
gdb_server.c:3970gdb_target_add_all()
LOG_WARNING("gdb services need one or more targets defined");
hla_interface.c:51hl_interface_open()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
hla_interface.c:94hl_interface_init_target()
LOG_WARNING("UNEXPECTED idcode: 0x%08" PRIx32, t->tap->idcode);
hla_interface.c:258hl_interface_handle_vid_pid_command()
LOG_WARNING("ignoring extra IDs in hla_vid_pid "
hla_interface.c:263hl_interface_handle_vid_pid_command()
LOG_WARNING("incomplete hla_vid_pid configuration directive");
hla_target.c:425adapter_halt()
LOG_WARNING("target was in unknown state when halt was requested");
hwthread.c:122hwthread_update_threads()
LOG_WARNING("SMP node change, disconnect GDB from core/thread %" PRId64,
image.c:317image_ihex_buffer_complete_inner()
LOG_WARNING("continuing after end-of-file record: %.40s", lpsz_line);
image.c:917image_mot_buffer_complete_inner()
LOG_WARNING("continuing after end-of-file record: %.40s", lpsz_line);
jlink.c:497jaylink_log_handler()
tmp = LOG_LVL_WARNING;
jlink.c:511jaylink_log_handler()
tmp = LOG_LVL_WARNING;
jlink.c:532jlink_usb_location_equal()
LOG_WARNING("jaylink_device_get_usb_bus_ports() failed: %s",
jlink.c:574jlink_open_device()
LOG_WARNING("jaylink_device_get_serial_number() failed: %s",
jlink.c:598jlink_open_device()
LOG_WARNING("jaylink_device_get_serial_number() failed: %s",
jlink.c:614jlink_open_device()
LOG_WARNING("jaylink_device_get_usb_address() failed: %s",
jlink.c:724jlink_init()
LOG_WARNING("Device responds empty firmware version string");
jlink.c:1750jlink_handle_emucom_write_command()
LOG_WARNING("Only %" PRIu32 " bytes written to the channel", length);
jtagspi.c:328jtagspi_handle_set()
LOG_WARNING("4-byte addresses needed, might need extra command to enable");
jtagspi.c:481jtagspi_probe()
LOG_WARNING("4-byte addresses needed, might need extra command to enable");
jtagspi.c:657jtagspi_erase()
LOG_WARNING("Bulk flash erase failed. Falling back to sector erase.");
kinetis.c:770kinetis_check_flash_security_status()
LOG_WARNING("Cannot check flash security status with a high-level adapter");
kinetis.c:802kinetis_check_flash_security_status()
LOG_WARNING("MDM: unknown ID %08" PRIX32, val);
kinetis.c:855kinetis_check_flash_security_status()
LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
kinetis.c:856kinetis_check_flash_security_status()
LOG_WARNING("**** ****");
kinetis.c:857kinetis_check_flash_security_status()
LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that, ****");
kinetis.c:858kinetis_check_flash_security_status()
LOG_WARNING("**** with exception for very basic communication, JTAG/SWD ****");
kinetis.c:859kinetis_check_flash_security_status()
LOG_WARNING("**** interface will NOT work. In order to restore its ****");
kinetis.c:860kinetis_check_flash_security_status()
LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase' ****");
kinetis.c:861kinetis_check_flash_security_status()
LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD. ****");
kinetis.c:862kinetis_check_flash_security_status()
LOG_WARNING("**** ****");
kinetis.c:863kinetis_check_flash_security_status()
LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
kinetis.c:867kinetis_check_flash_security_status()
LOG_WARNING("**** Your Kinetis MCU is probably locked-up in RESET/WDOG loop. ****");
kinetis.c:868kinetis_check_flash_security_status()
LOG_WARNING("**** Common reason is a blank flash (at least a reset vector). ****");
kinetis.c:869kinetis_check_flash_security_status()
LOG_WARNING("**** Issue 'kinetis mdm halt' command or if SRST is connected ****");
kinetis.c:870kinetis_check_flash_security_status()
LOG_WARNING("**** and configured, use 'reset halt' ****");
kinetis.c:871kinetis_check_flash_security_status()
LOG_WARNING("**** If MCU cannot be halted, it is likely secured and running ****");
kinetis.c:872kinetis_check_flash_security_status()
LOG_WARNING("**** in RESET/WDOG loop. Issue 'kinetis mdm mass_erase' ****");
kinetis.c:1320kinetis_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
kinetis.c:1332kinetis_write_block()
LOG_WARNING("large enough working area not available, can't do block memory writes");
kinetis.c:1486kinetis_fill_fcf()
LOG_WARNING("Missing bank %u configuration, FCF protection flags may be incomplete", bank_idx);
kinetis.c:1723kinetis_erase()
LOG_WARNING("erase sector %u failed", i);
kinetis.c:1731kinetis_erase()
LOG_WARNING("Flash Configuration Field erased, DO NOT reset or power off the device");
kinetis.c:1732kinetis_erase()
LOG_WARNING("until correct FCF is programmed or MCU gets security lock.");
kinetis.c:1739kinetis_erase()
LOG_WARNING("Flash Configuration Field write failed");
kinetis.c:1895kinetis_write_inner()
LOG_WARNING("FlexRAM not ready, fallback to slow longword write.");
kinetis.c:1939kinetis_write_inner()
LOG_WARNING("couldn't use block writes, falling back to single "
kinetis.c:2079kinetis_write()
LOG_WARNING("Flash Configuration Field written.");
kinetis.c:2080kinetis_write()
LOG_WARNING("Reset or power off the device to make settings effective.");
kinetis.c:2741kinetis_probe_chip()
LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
kinetis.c:2744kinetis_probe_chip()
LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2");
kinetis.c:2842kinetis_probe_chip()
LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %" PRIu32 " KB", k_chip->pflash_size>>10);
kinetis.c:2994kinetis_probe()
LOG_WARNING("MAXADDR0 0x%02" PRIx8 " check failed,"
kinetis.c:2999kinetis_probe()
LOG_WARNING("MAXADDR1 0x%02" PRIx8 " check failed,"
kinetis.c:3004kinetis_probe()
LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8 " check failed,"
kinetis.c:3131kinetis_blank_check()
LOG_WARNING("kinetis_blank_check not supported yet for FlexRAM");
kinetis.c:3309kinetis_fcf_source_handler()
LOG_WARNING("BEWARE: incorrect flash configuration may permanently lock the device.");
kinetis_ke.c:418kinetis_ke_prepare_flash()
LOG_WARNING("Flash clock was already set and contains an invalid value.");
kinetis_ke.c:419kinetis_ke_prepare_flash()
LOG_WARNING("Please reset the target.");
kinetis_ke.c:431kinetis_ke_prepare_flash()
LOG_WARNING("Flash clock register is locked and contains an invalid value.");
kinetis_ke.c:432kinetis_ke_prepare_flash()
LOG_WARNING("Please reset the target.");
kinetis_ke.c:469kinetis_ke_stop_watchdog()
LOG_WARNING("No working area available for watchdog algorithm");
kinetis_ke.c:588kinetis_ke_check_flash_security_status()
LOG_WARNING("Cannot check flash security status with a high-level adapter");
kinetis_ke.c:614kinetis_ke_check_flash_security_status()
LOG_WARNING("MDM: unknown ID %08" PRIX32, val);
kinetis_ke.c:643kinetis_ke_check_flash_security_status()
LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
kinetis_ke.c:644kinetis_ke_check_flash_security_status()
LOG_WARNING("**** ****");
kinetis_ke.c:645kinetis_ke_check_flash_security_status()
LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that, ****");
kinetis_ke.c:646kinetis_ke_check_flash_security_status()
LOG_WARNING("**** with exception for very basic communication, JTAG/SWD ****");
kinetis_ke.c:647kinetis_ke_check_flash_security_status()
LOG_WARNING("**** interface will NOT work. In order to restore its ****");
kinetis_ke.c:648kinetis_ke_check_flash_security_status()
LOG_WARNING("**** functionality please issue 'kinetis_ke mdm mass_erase' ****");
kinetis_ke.c:649kinetis_ke_check_flash_security_status()
LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD. ****");
kinetis_ke.c:650kinetis_ke_check_flash_security_status()
LOG_WARNING("**** ****");
kinetis_ke.c:651kinetis_ke_check_flash_security_status()
LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
kinetis_ke.c:707kinetis_ke_write_words()
LOG_WARNING("no working area available, can't do block memory writes");
kinetis_ke.c:728kinetis_ke_write_words()
LOG_WARNING("No large enough working area available, can't do block memory writes");
kinetis_ke.c:774kinetis_ke_protect()
LOG_WARNING("kinetis_ke_protect not supported yet");
kinetis_ke.c:815kinetis_ke_protect_check()
LOG_WARNING("No flash protection found.");
kinetis_ke.c:822kinetis_ke_protect_check()
LOG_WARNING("Flash protected. FPOPEN=%i FPLDIS=%i FPHDIS=%i FPLS=%i FPHS=%i",
kinetis_ke.c:970kinetis_ke_erase()
LOG_WARNING("erase sector %u failed", i);
kinetis_ke.c:979kinetis_ke_erase()
LOG_WARNING
kinetis_ke.c:1002kinetis_ke_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks the required alignment", offset);
kitprog.c:183kitprog_init()
LOG_WARNING("KitProg firmware versions below v2.14 do not support sending JTAG to SWD sequences. These sequences will be substituted with SWD line resets.");
kitprog.c:285kitprog_usb_open()
LOG_WARNING("Failed to get KitProg serial number");
lakemont.c:1229lakemont_reset_deassert()
LOG_WARNING("%s: ran after reset and before halt ...",
lattice.c:307lattice_load_command()
LOG_WARNING("Id on device (0x%8.8" PRIx32 ") and id in bit-stream (0x%8.8" PRIx32 ") don't match.",
linux.c:1357linux_thread_packet()
LOG_WARNING("WARNING! current GDB thread do not match "
log.c:401gdb_timeout_warning()
LOG_WARNING("keep_alive() was not invoked in the "
lpc2000.c:1014lpc2000_erase()
LOG_WARNING("lpc2000 prepare sectors returned %i", status_code);
lpc2000.c:1036lpc2000_erase()
LOG_WARNING("lpc2000 erase sectors returned %i", status_code);
lpc2000.c:1065lpc2000_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required alignment 0x%" PRIx32, offset, dst_min_alignment);
lpc2000.c:1095lpc2000_write()
LOG_WARNING("Boot verification checksum in image (0x%8.8" PRIx32 ") to be written to flash is "
lpc2000.c:1097lpc2000_write()
LOG_WARNING("OpenOCD will write the correct checksum. To remove this warning modify build tools on developer PC to inject correct LPC vector "
lpc2000.c:1157lpc2000_write()
LOG_WARNING("lpc2000 prepare sectors returned %i", status_code);
lpc2000.c:1199lpc2000_write()
LOG_WARNING("lpc2000 returned %i", status_code);
lpc288x.c:128lpc288x_read_part_info()
LOG_WARNING("Cannot identify target as an LPC288X (%08" PRIx32 ")", cidr);
lpc2900.c:549lpc2900_handle_read_custom_command()
LOG_WARNING("Could not open file %s", filename);
lpc2900.c:908lpc2900_flash_bank_command()
LOG_WARNING("flash clock must be at least %" PRIu32 " kHz",
lpc2900.c:916lpc2900_flash_bank_command()
LOG_WARNING("flash clock must be a maximum of %" PRIu32 " kHz",
lpc2900.c:1382lpc2900_probe()
LOG_WARNING("Device is not an LPC29xx");
lpc2900.c:1452lpc2900_probe()
LOG_WARNING("Unknown LPC29xx derivative (FEATx="
lpc2900.c:1467lpc2900_probe()
LOG_WARNING("Flashless device cannot be handled");
lpc3180.c:44lpc3180_nand_device_command()
LOG_WARNING(
lpc3180.c:66lpc3180_pll()
LOG_WARNING("PLL is not locked");
lpc3180.c:150lpc3180_init()
LOG_WARNING("LPC3180 only supports 8 bit bus width");
lpc3180.c:900lpc3180_read_page()
LOG_WARNING("%i symbol error detected and corrected",
lpc3180.c:1123lpc3180_read_page()
LOG_WARNING(
lpc3180.c:1128lpc3180_read_page()
LOG_WARNING(
lpc32xx.c:76lpc32xx_nand_device_command()
LOG_WARNING("LPC32xx oscillator frequency should be between "
lpc32xx.c:99lpc32xx_pll()
LOG_WARNING("PLL is not locked");
lpc32xx.c:1394lpc32xx_read_page_mlc()
LOG_WARNING("%i symbol error detected and corrected",
lpc32xx.c:1546lpc32xx_read_page_slc()
LOG_WARNING("error detected and corrected: %" PRIu32 "/%d",
lpcspifi.c:452lpcspifi_erase()
LOG_WARNING("Bulk flash erase failed. Falling back to sector-by-sector erase.");
lpcspifi.c:591lpcspifi_write()
LOG_WARNING("Writes past end of flash. Extra data discarded.");
lpcspifi.c:703lpcspifi_write()
LOG_WARNING("Working area size is limited; flash writes may be"
lpcspifi.c:875lpcspifi_probe()
LOG_WARNING("device needs 2-byte addresses - not implemented");
lpcspifi.c:877lpcspifi_probe()
LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
max32xxx.c:86max32xxx_flash_bank_command()
LOG_WARNING("incomplete flash bank max32xxx configuration: <base> <size> 0 0 <target> <FLC base> <sector size> <clkdiv> [burst_bits]");
max32xxx.c:147max32xxx_flash_op_pre()
LOG_WARNING("FLSH_BL_CTRL indicates BL mode 2 or mode 3.");
max32xxx.c:149max32xxx_flash_op_pre()
LOG_WARNING("Flash page 0 swapped out, attempting to swap back in for programming");
max32xxx.c:258max32xxx_erase()
LOG_WARNING("Flash sector %u is protected", banknr);
max32xxx.c:451max32xxx_write()
LOG_WARNING("offset size must be word aligned");
max32xxx.c:672max32xxx_probe()
LOG_WARNING("Flash protection not supported on this device");
max32xxx.c:699max32xxx_mass_erase()
LOG_WARNING("Flash sector %u is protected", i);
max32xxx.c:789max32xxx_handle_protection_set_command()
LOG_WARNING("Error parsing address");
max32xxx.c:797max32xxx_handle_protection_set_command()
LOG_WARNING("Error parsing length");
max32xxx.c:845max32xxx_handle_protection_clr_command()
LOG_WARNING("Error parsing address");
max32xxx.c:853max32xxx_handle_protection_clr_command()
LOG_WARNING("Error parsing length");
max32xxx.c:901max32xxx_handle_protection_check_command()
LOG_WARNING("Error updating the protection array");
max32xxx.c:905max32xxx_handle_protection_check_command()
LOG_WARNING("s:<sector number> a:<address> p:<protection bit>");
max32xxx.c:907max32xxx_handle_protection_check_command()
LOG_WARNING("s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d",
mdr.c:234mdr_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
mdr.c:252mdr_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
mdr.c:369mdr_write()
LOG_WARNING("Can't use block writes, falling back to single memory accesses");
mips32.c:310mips32_detect_fpr_mode_change()
LOG_WARNING("** FP mode changed to %sbit, you must reconnect GDB **", fpu_in_64bit ? "64" : "32");
mips32.c:316mips32_detect_fpr_mode_change()
LOG_WARNING("** FP is %s, register update %s **", s, s);
mips32.c:829mips32_configure_break_unit()
LOG_WARNING("DCR endianness settings does not match target settings");
mips_m4k.c:268mips_m4k_halt()
LOG_WARNING("target was in unknown state when halt was requested");
mips_m4k.c:299mips_m4k_assert_reset()
LOG_WARNING("Reset is not asserted because the target is not examined.");
mips_m4k.c:300mips_m4k_assert_reset()
LOG_WARNING("Use a reset button or power cycle the target.");
mips_m4k.c:433mips_m4k_internal_restore()
LOG_WARNING("target not halted");
mips_m4k.c:533mips_m4k_step()
LOG_WARNING("target not halted");
mips_m4k.c:604mips_m4k_set_breakpoint()
LOG_WARNING("breakpoint already set");
mips_m4k.c:736mips_m4k_unset_breakpoint()
LOG_WARNING("breakpoint not set");
mips_m4k.c:843mips_m4k_remove_breakpoint()
LOG_WARNING("target not halted");
mips_m4k.c:872mips_m4k_set_watchpoint()
LOG_WARNING("watchpoint already set");
mips_m4k.c:943mips_m4k_unset_watchpoint()
LOG_WARNING("watchpoint not set");
mips_m4k.c:983mips_m4k_remove_watchpoint()
LOG_WARNING("target not halted");
mips_m4k.c:1017mips_m4k_read_memory()
LOG_WARNING("target not halted");
mips_m4k.c:1032mips_m4k_read_memory()
LOG_WARNING("Falling back to non-bulk read");
mips_m4k.c:1082mips_m4k_write_memory()
LOG_WARNING("target not halted");
mips_m4k.c:1090mips_m4k_write_memory()
LOG_WARNING("Falling back to non-bulk write");
mips_mips64.c:130mips_mips64_halt()
LOG_WARNING("target was in unknown state when halt was requested");
mips_mips64.c:246mips_mips64_set_hwbp()
LOG_WARNING("ERROR Can not find free FP Comparator");
mips_mips64.c:344mips_mips64_set_breakpoint()
LOG_WARNING("breakpoint already set");
mips_mips64.c:411mips_mips64_set_watchpoint()
LOG_WARNING("watchpoint already set");
mips_mips64.c:565mips_mips64_unset_breakpoint()
LOG_WARNING("breakpoint not set");
mips_mips64.c:828mips_mips64_unset_watchpoint()
LOG_WARNING("watchpoint not set");
mips_mips64.c:1041mips_mips64_write_memory()
LOG_WARNING("Falling back to non-bulk write");
mpsse.c:236open_matching_device()
LOG_WARNING("libusb_detach_kernel_driver() failed with %s, trying to continue anyway",
mpsse.c:907mpsse_flush()
LOG_WARNING("Haven't made progress in mpsse_flush() for %" PRId64
mqx.c:128mqx_target_read_buffer()
LOG_WARNING("MQX RTOS - target address 0x%" PRIx32 " is not allowed to read", address);
mqx.c:171mqx_get_member()
LOG_WARNING("MQX RTOS - cannot read \"%s\" at address 0x%" PRIx32,
mqx.c:209mqx_is_scheduler_running()
LOG_WARNING("MQX RTOS - value of '_mqx_kernel_data->ADDRESSING_CAPABILITY' contains invalid value");
mqx.c:220mqx_is_scheduler_running()
LOG_WARNING("MQX RTOS - scheduler does not run");
mrvlqspi.c:561mrvlqspi_flash_erase()
LOG_WARNING("Bulk flash erase failed."
mrvlqspi.c:599mrvlqspi_flash_write()
LOG_WARNING("Writes past end of flash. Extra data discarded.");
mrvlqspi.c:701mrvlqspi_flash_write()
LOG_WARNING("Working area size is limited; flash writes may be"
mrvlqspi.c:863mrvlqspi_probe()
LOG_WARNING("device needs 2-byte addresses - not implemented");
mrvlqspi.c:865mrvlqspi_probe()
LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
msp432.c:325msp432_init()
LOG_WARNING(
msp432.c:330msp432_init()
LOG_WARNING(
msp432.c:335msp432_init()
LOG_WARNING(
msp432.c:546msp432_bsl_command()
LOG_WARNING("msp432: MSP432E4 does not have a BSL region");
msp432p4.c:186msp432p4_run_algo()
LOG_WARNING("no working area available, can't do block memory writes");
msp432p4.c:453msp432p4_write()
LOG_WARNING("no working area available, can't do block memory writes");
niietcm4.c:1291niietcm4_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
niietcm4.c:1310niietcm4_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
niietcm4.c:1405niietcm4_write()
LOG_WARNING("Can't use block writes, falling back to single memory accesses");
npcx.c:310npcx_flash_bank_command()
LOG_WARNING("No FIU is selection, using default.");
nrf5.c:546nrf5_protect_check()
LOG_WARNING("Flash protection of this nRF device is not supported");
nrf5.c:950nrf5_probe_chip()
LOG_WARNING("HWID 0x%04" PRIx32 " mismatch: FICR INFO.PART %"
nrf5.c:1006nrf5_setup_bank()
LOG_WARNING("Chip's reported Flash capacity does not match expected one");
nrf5.c:1008nrf5_setup_bank()
LOG_WARNING("Chip's reported Flash capacity does not match FICR INFO.FLASH");
nrf5.c:1149nrf5_ll_flash_write()
LOG_WARNING("no working area available, falling back to slow memory writes");
nrf5.c:1181nrf5_ll_flash_write()
LOG_WARNING("No large enough working area available, can't do block memory writes");
nrf5.c:1377nrf5_flash_bank_command()
LOG_WARNING("Flash driver 'nrf51' is deprecated! Use 'nrf5' instead.");
numicro.c:721numicro_writeblock()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
numicro.c:729numicro_writeblock()
LOG_WARNING("no working area available, can't do block memory writes");
numicro.c:741numicro_writeblock()
LOG_WARNING("no working area available, can't do block memory writes");
numicro.c:760numicro_writeblock()
LOG_WARNING("No large enough working area available, can't do block memory writes");
numicro.c:960numicro_write()
LOG_WARNING("couldn't use block writes, falling back to single "
numicro.c:1036numicro_get_cpu_type()
LOG_WARNING("NuMicro flash driver: Failed to Get PartID\n");
numicro.c:1076numicro_probe()
LOG_WARNING("NuMicro flash driver: Failed to detect a known part\n");
numicro.c:1082numicro_probe()
LOG_WARNING("NuMicro flash driver: Failed to detect flash size\n");
opendous.c:325opendous_init()
LOG_WARNING("No opendous_type specified, using default 'opendous'");
options.c:121find_exe_path()
LOG_WARNING("Could not determine executable path, using configured BINDIR.");
or1k.c:579or1k_halt()
LOG_WARNING("Target was in unknown state when halt was requested");
or1k.c:621or1k_is_cpu_running()
LOG_WARNING("Debug IF CPU control reg read failure.");
or1k.c:624or1k_is_cpu_running()
LOG_WARNING("Resetting JTAG TAP state and reconnecting to debug IF.");
or1k.c:627or1k_is_cpu_running()
LOG_WARNING("...attempt %d of %d", tries, RETRIES_MAX);
or1k_du_adv.c:434adbg_wb_burst_read()
LOG_WARNING("Tried burst read with invalid word size (%d),"
or1k_du_adv.c:443adbg_wb_burst_read()
LOG_WARNING("Tried burst read with invalid word size (%d),"
or1k_du_adv.c:452adbg_wb_burst_read()
LOG_WARNING("Tried burst read with invalid word size (%d),"
or1k_du_adv.c:490adbg_wb_burst_read()
LOG_WARNING("Burst read timed out");
or1k_du_adv.c:509adbg_wb_burst_read()
LOG_WARNING("CRC ERROR! Computed 0x%08" PRIx32 ", read CRC 0x%08" PRIx32, crc_calc, crc_read);
or1k_du_adv.c:541adbg_wb_burst_read()
LOG_WARNING("WB bus error during burst read, address 0x%08" PRIx32 ", retrying!", addr);
or1k_du_adv.c:656adbg_wb_burst_write()
LOG_WARNING("CRC ERROR! match bit after write is %" PRIi8 " (computed CRC 0x%08" PRIx32 ")", value, crc_calc);
or1k_du_adv.c:684adbg_wb_burst_write()
LOG_WARNING("WB bus error during burst write, address 0x%08" PRIx32 ", retrying!", addr);
pic32mm.c:587pic32mm_write_using_loader()
LOG_WARNING("no working area available, can't do block memory writes");
pic32mm.c:610pic32mm_write_using_loader()
LOG_WARNING("no large enough working area available, can't do block memory writes");
pic32mm.c:716pic32mm_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
pic32mm.c:793pic32mm_find_device()
LOG_WARNING("Cannot identify target as a PIC32MM family. Unexpected manufacturing ID: %02x", manufacturingID);
pic32mm.c:804pic32mm_find_device()
LOG_WARNING("Cannot identify target as a PIC32MM family. Unexpected device ID: %02x", devID);
pic32mm.c:855pic32mm_probe()
LOG_WARNING("Cannot compute FLASH memory layout");
pic32mx.c:450pic32mx_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
pic32mx.c:490pic32mx_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
pic32mx.c:614pic32mx_write()
LOG_WARNING("offset 0x%" PRIx32 "breaks required 4-byte alignment", offset);
pic32mx.c:626pic32mx_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
pic32mx.c:700pic32mx_probe()
LOG_WARNING("Cannot identify target as a PIC32MX family.");
pic32mx.c:751pic32mx_probe()
LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash");
pic32mx.c:755pic32mx_probe()
LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
pld.c:38get_pld_device_by_num()
LOG_WARNING("DEPRECATED: use pld name \"%s\" instead of number %d", p->name, num);
psoc4.c:181psoc4_decode_chip_protection()
LOG_WARNING("Unknown protection state 0x%02" PRIx8 "", protection);
psoc4.c:273psoc4_sysreq()
LOG_WARNING("no working area for sysreq parameters");
psoc4.c:793psoc4_probe()
LOG_WARNING("Number of macros does not correspond with flash size!");
psoc5lp.c:652psoc5lp_nvl_erase()
LOG_WARNING("There is no erase operation for NV Latches");
psoc5lp.c:738psoc5lp_nvl_write()
LOG_WARNING("Reset failed after enabling or disabling ECC");
psoc5lp.c:1039psoc5lp_erase()
LOG_WARNING("Skipping erase of ECC region sectors %u to %u",
psoc6.c:250ipc_poll_lock_stat()
LOG_WARNING("SROM API calls via CM4 target are supported on single-core PSoC6 devices only. "
psoc6.c:454psoc6_protect()
LOG_WARNING("Life Cycle transition for PSoC6 is not supported");
qn908x.c:605qn908x_protect()
LOG_WARNING("SWD flash/RAM access disabled in the Flash lock and "
qn908x.c:694qn908x_write()
LOG_WARNING("Image vector table checksum mismatch: expected 0x%08"
qn908x.c:698qn908x_write()
LOG_WARNING("This device will not boot, use calc_checksum in "
qn908x.c:701qn908x_write()
LOG_WARNING("Updating checksum, verification will fail.");
qn908x.c:723qn908x_write()
LOG_WARNING("The Code Read Protection (CRP) in this image "
qn908x.c:1004qn908x_handle_allow_brick_command()
LOG_WARNING("Flashing images that disable SWD in qn908x is now allowed.");
riscv-011.c:1050read_remote_csr()
LOG_WARNING("Got exception 0x%x when reading %s", exception,
riscv-011.c:1259register_read()
LOG_WARNING("Got exception 0x%x when reading %s", exception, gdb_regno_name(regnum));
riscv-011.c:1333register_write()
LOG_WARNING("Got exception 0x%x when writing %s", exception,
riscv-011.c:1449step()
LOG_WARNING("Asked to resume at 32-bit PC on %d-bit target.",
riscv-011.c:1573examine()
LOG_WARNING("Failed to read misa at 0x%x; trying 0x%x.", CSR_MISA,
riscv-013.c:1550discover_vlenb()
LOG_WARNING("Couldn't read vlenb for %s; vector register access won't work.",
riscv-013.c:1670examine()
LOG_WARNING("We won't be able to execute fence instructions on this "
riscv-013.c:2841log_mem_access_result()
LOG_WARNING("%s", msg);
riscv-013.c:2993read_memory_abstract()
LOG_WARNING("Buggy aampostincrement! Address not incremented correctly.");
riscv-013.c:3076write_memory_abstract()
LOG_WARNING("Buggy aampostincrement! Address not incremented correctly.");
riscv-013.c:3280read_memory_progbuf_inner()
LOG_WARNING("Batch memory read encountered DMI error %d. "
riscv-013.c:3289read_memory_progbuf_inner()
LOG_WARNING("Batch memory read encountered DMI error %d. "
riscv.c:1704riscv_read_memory()
LOG_WARNING("0-length read from 0x%" TARGET_PRIxADDR, address);
riscv.c:1732riscv_write_memory()
LOG_WARNING("0-length write to 0x%" TARGET_PRIxADDR, address);
riscv.c:2240riscv_openocd_poll()
LOG_WARNING("%d harts should remain halted, and %d should resume.",
riscv.c:2520parse_ranges()
LOG_WARNING("Duplicate %s register number - "
riscv.c:2523parse_ranges()
LOG_WARNING("Overlapping register ranges - Register range starting from %u overlaps "
rlink.c:1436rlink_khz()
LOG_WARNING("The lowest supported JTAG speed is %d KHz", rlink_speed_table[0].khz);
rlink.c:1537rlink_init()
LOG_WARNING(
rlink.c:1569rlink_init()
LOG_WARNING("target detection problem");
rlink.c:1595rlink_init()
LOG_WARNING("target not plugged in");
rs14100.c:151rs14100_init()
LOG_WARNING("no working area available, can't do block memory writes");
rs14100.c:258rs14100_erase()
LOG_WARNING("no working area available, can't do block memory writes");
rs14100.c:434rs14100_write()
LOG_WARNING("Writes past end of flash. Extra data discarded.");
rs14100.c:495rs14100_write()
LOG_WARNING("no working area available, can't do block memory writes");
rs14100.c:515rs14100_write()
LOG_WARNING("no large enough working area available, can't do block memory writes");
rtos.c:259rtos_qsymbol()
LOG_WARNING("RTOS %s not detected. (GDB could not find symbol \'%s\')", os->type->name, cur_sym);
rtos.c:264rtos_qsymbol()
LOG_WARNING("No RTOS could be auto-detected!");
rtos.c:283rtos_qsymbol()
LOG_WARNING("RTOS: Debugger sent us qSymbol with '%s%s' that we did not ask for", cur_sym, cur_suffix);
rtos.c:300rtos_qsymbol()
LOG_WARNING("No RTOS could be auto-detected!");
rtt.c:292rtt_write_channel()
LOG_WARNING("rtt: Down-channel %u is not available", channel_index);
rtt.c:199target_rtt_write_callback()
LOG_WARNING("rtt: Down-channel %u is not active", channel_index);
rtt.c:204target_rtt_write_callback()
LOG_WARNING("rtt: Down-channel %u is not large enough",
rtt.c:390target_rtt_read_callback()
LOG_WARNING("rtt: Up-channel %zu is not active", i);
rtt.c:395target_rtt_read_callback()
LOG_WARNING("rtt: Up-channel %zu is not large enough", i);
server.c:306add_service()
LOG_WARNING("cannot change stdout mode to binary");
server.c:308add_service()
LOG_WARNING("cannot change stdin mode to binary");
server.c:310add_service()
LOG_WARNING("cannot change stderr mode to binary");
server.c:779handle_poll_period_command()
LOG_WARNING("You need to set a period value");
server.c:875server_pipe_command()
LOG_WARNING("unable to change server port after init");
sh_qspi.c:507sh_qspi_write()
LOG_WARNING("Write pasts end of flash. Extra data discarded.");
sh_qspi.c:540sh_qspi_write()
LOG_WARNING("Reads past end of flash. Extra data discarded.");
sh_qspi.c:611sh_qspi_read()
LOG_WARNING("Reads past end of flash. Extra data discarded.");
sh_qspi.c:718sh_qspi_upload_helper()
LOG_WARNING("no working area available, can't do block memory writes");
sh_qspi.c:741sh_qspi_upload_helper()
LOG_WARNING("no large enough working area available, can't do block memory writes");
sh_qspi.c:809sh_qspi_probe()
LOG_WARNING("device needs 2-byte addresses - not implemented");
sim3x.c:405sim3x_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
sim3x.c:424sim3x_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
sim3x.c:759sim3x_read_info()
LOG_WARNING("Failed to read info from MCU, using info from flash bank parameters");
smp.c:54gdb_read_smp_packet()
LOG_WARNING(DEPRECATED_MSG);
smp.c:81gdb_write_smp_packet()
LOG_WARNING(DEPRECATED_MSG);
smp.c:136handle_smp_gdb_command()
LOG_WARNING(DEPRECATED_MSG);
stellaris.c:667stellaris_read_part_info()
LOG_WARNING("Unknown did0 version, cannot identify target");
stellaris.c:672stellaris_read_part_info()
LOG_WARNING("Cannot identify target as a Stellaris");
stellaris.c:679stellaris_read_part_info()
LOG_WARNING("Unknown did1 version/family.");
stellaris.c:733stellaris_read_part_info()
LOG_WARNING("Unknown did0 class");
stellaris.c:874stellaris_erase()
LOG_WARNING("Error erasing flash page %i, flash_cris 0x%" PRIx32 "",
stellaris.c:970stellaris_protect()
LOG_WARNING("Error setting flash page protection, flash_cris 0x%" PRIx32 "", flash_cris);
stellaris.c:1125stellaris_write()
LOG_WARNING("offset size must be word aligned");
stlink_usb.c:3617stlink_tcp_open()
LOG_WARNING("STLink server cannot handle more than 255 ST-LINK connected");
stlink_usb.c:4207stlink_dap_op_connect()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
stlink_usb.c:4364stlink_dap_op_queue_ap_abort()
LOG_WARNING("stlink_dap_op_queue_ap_abort()");
stlink_usb.c:4993stlink_dap_vid_pid()
LOG_WARNING("ignoring extra IDs in vid_pid "
stlink_usb.c:4998stlink_dap_vid_pid()
LOG_WARNING("incomplete vid_pid configuration directive");
stlink_usb.c:5126stlink_dap_init()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
stm32f1x.c:463stm32x_write_block_async()
LOG_WARNING("no working area available, can't do block memory writes");
stm32f1x.c:488stm32x_write_block_async()
LOG_WARNING("no large enough working area available, can't do block memory writes");
stm32f1x.c:557stm32x_write_block_riscv()
LOG_WARNING("no working area available, can't do block memory writes");
stm32f1x.c:576stm32x_write_block_riscv()
LOG_WARNING("no large enough working area available, can't do block memory writes");
stm32f1x.c:673stm32x_write_block()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
stm32f1x.c:975stm32x_probe()
LOG_WARNING("Cannot identify target as a STM32 family.");
stm32f1x.c:985stm32x_probe()
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
stm32f2x.c:237stm32x_otp_enable()
LOG_WARNING("OTP memory bank #%u is already enabled for write commands.",
stm32f2x.c:718stm32x_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
stm32f2x.c:738stm32x_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
stm32f2x.c:815stm32x_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
stm32f2x.c:831stm32x_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
stm32f2x.c:1118stm32x_probe()
LOG_WARNING("Cannot identify target as a STM32 family.");
stm32f2x.c:1128stm32x_probe()
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %" PRIu16 "k flash",
stm32g0x.c:483stm32x_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
stm32g0x.c:503stm32x_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
stm32g0x.c:609stm32gx_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
stm32g0x.c:739stm32x_probe()
LOG_WARNING("Cannot identify target as a STM32 family.");
stm32g0x.c:749stm32x_probe()
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
stm32g4x.c:674stm32l4_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
stm32g4x.c:695stm32l4_write_block()
LOG_WARNING("large enough working area not available, can't do block memory writes");
stm32g4x.c:761stm32l4_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment",
stm32g4x.c:767stm32l4_write()
LOG_WARNING("Padding %d bytes to keep 8-byte write size",
stm32g4x.c:786stm32l4_write()
LOG_WARNING("block write failed");
stm32g4x.c:790stm32l4_write()
LOG_WARNING("block write succeeded");
stm32g4x.c:830stm32l4_probe()
LOG_WARNING("Cannot identify target as an STM32L4 family device.");
stm32g4x.c:843stm32l4_probe()
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
stm32h7x.c:578stm32x_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
stm32h7x.c:599stm32x_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
stm32h7x.c:693stm32x_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
stm32h7x.c:777stm32x_probe()
LOG_WARNING("Cannot identify target as a STM32H7xx family.");
stm32h7x.c:789stm32x_probe()
LOG_WARNING("Flash register base not defined for bank %u", bank->bank_number);
stm32h7x.c:799stm32x_probe()
LOG_WARNING("%s cannot read the flash size register", target_name(target));
stm32h7x.c:986stm32x_set_rdp()
LOG_WARNING("unlocking the entire flash device");
stm32h7x.c:989stm32x_set_rdp()
LOG_WARNING("locking the entire flash device");
stm32h7x.c:992stm32x_set_rdp()
LOG_WARNING("locking the entire flash device, irreversible");
stm32l4x.c:1454stm32l4_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
stm32l4x.c:1474stm32l4_write_block()
LOG_WARNING("large enough working area not available, can't do block memory writes");
stm32l4x.c:1686stm32l4_write()
LOG_WARNING("RDP = 0x55, the work-area should be in non-secure RAM (check SAU partitioning)");
stm32l4x.c:1694stm32l4_write()
LOG_WARNING("falling back to programming without a flash loader (slower)");
stm32l4x.c:1823stm32l4_probe()
LOG_WARNING("Cannot identify target as an %s family device.", device_families);
stm32l4x.c:1906stm32l4_probe()
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
stm32l4x.c:1914stm32l4_probe()
LOG_WARNING("overriding size register by configured bank size - MAY CAUSE TROUBLE");
stm32l5x.c:543stm32l4_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
stm32l5x.c:562stm32l4_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
stm32l5x.c:589stm32l4_write_block()
LOG_WARNING("large enough working area not available, can't do block memory writes");
stm32l5x.c:656stm32l4_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment",
stm32l5x.c:662stm32l4_write()
LOG_WARNING("Padding %d bytes to keep 8-byte write size",
stm32l5x.c:681stm32l4_write()
LOG_WARNING("block write failed");
stm32l5x.c:685stm32l4_write()
LOG_WARNING("block write succeeded");
stm32l5x.c:727stm32l4_probe()
LOG_WARNING("Cannot identify target as an STM32L4 family device.");
stm32l5x.c:737stm32l4_probe()
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
stm32l5x.c:772stm32l4_probe()
LOG_WARNING("Invalid flash size for STM32L5 family device.");
stm32l5x.c:800stm32l4_probe()
LOG_WARNING("Invalid flash size for STM32L4+ family device.");
stm32lx.c:470stm32lx_write_half_pages()
LOG_WARNING("no large enough working area available, can't do block memory writes");
stm32lx.c:569stm32lx_write_half_pages()
LOG_WARNING("Couldn't use loader, falling back to page memory writes");
stm32lx.c:672stm32lx_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
stm32lx.c:788stm32lx_probe()
LOG_WARNING("STM32L flash size failed, probe inaccurate - assuming %dk flash",
stm32lx.c:792stm32lx_probe()
LOG_WARNING("STM32L probed flash size assumed incorrect since FLASH_SIZE=%dk > %dk, - assuming %dk flash",
stm32lx.c:818stm32lx_probe()
LOG_WARNING("STM32L flash bank base address config is incorrect. "
stm8.c:748stm8_write_memory()
LOG_WARNING("target not halted");
stm8.c:779stm8_read_memory()
LOG_WARNING("target not halted");
stm8.c:882stm8_halt()
LOG_WARNING("target was in unknown state when halt was requested");
stm8.c:1376stm8_set_breakpoint()
LOG_WARNING("breakpoint already set");
stm8.c:1469stm8_unset_breakpoint()
LOG_WARNING("breakpoint not set");
stm8.c:1543stm8_set_watchpoint()
LOG_WARNING("watchpoint already set");
stm8.c:1633stm8_unset_watchpoint()
LOG_WARNING("watchpoint not set");
stm8.c:1689stm8_examine()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
stm8.c:1841stm8_run_algorithm()
LOG_WARNING("target not halted");
stmqspi.c:1057stmqspi_protect()
LOG_WARNING("setting soft protection only, not related to flash's hardware write protection");
stmqspi.c:1590stmqspi_read()
LOG_WARNING("Read beyond end of flash. Extra data to be ignored.");
stmqspi.c:1633stmqspi_write()
LOG_WARNING("Write beyond end of flash. Extra data discarded.");
stmqspi.c:1694stmqspi_verify()
LOG_WARNING("Verify beyond end of flash. Extra data ignored.");
stmqspi.c:2171stmqspi_probe()
LOG_WARNING("DDR mode is untested and suffers from some silicon bugs");
stmqspi.c:2234stmqspi_probe()
LOG_WARNING("Unknown flash1 device id = 0x%06" PRIx32
stmqspi.c:2289stmqspi_probe()
LOG_WARNING("Unknown flash2 device id = 0x%06" PRIx32
stmsmi.c:402stmsmi_write()
LOG_WARNING("Write pasts end of flash. Extra data discarded.");
stmsmi.c:580stmsmi_probe()
LOG_WARNING("device needs 2-byte addresses - not implemented");
stmsmi.c:582stmsmi_probe()
LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
str7x.c:488str7x_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
str7x.c:563str7x_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
str7x.c:595str7x_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
str9x.c:373str9x_write_block()
LOG_WARNING("no working area available, can't do block memory writes");
str9x.c:390str9x_write_block()
LOG_WARNING("no large enough working area available, can't do block memory writes");
str9x.c:462str9x_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
str9x.c:491str9x_write()
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
str9xpec.c:580str9xpec_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
swim.c:131swim_transport_init()
LOG_WARNING("\'srst_nogate\' reset_config option is required");
target.c:729target_examine()
LOG_WARNING("target %s examination failed", target_name(target));
target.c:1520target_init_one()
LOG_WARNING("type '%s' has bad MMU hooks", target_name(target));
target.c:2076target_alloc_working_area()
LOG_WARNING("not enough working area available(requested %"PRIu32")", size);
target.c:2273target_arch_state()
LOG_WARNING("No target has been configured");
tcl.c:581handle_flash_fill_command()
LOG_WARNING("Start address " TARGET_ADDR_FMT
tcl.c:584handle_flash_fill_command()
LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT,
tcl.c:799handle_flash_write_bank_command()
LOG_WARNING("Start offset 0x%08" PRIx32
tcl.c:802handle_flash_write_bank_command()
LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT,
tcl.c:139handle_jtag_command_drscan()
LOG_WARNING("drscan with unsafe endstate \"%s\"", state_name);
tcl.c:455handle_jtag_newtap_args()
LOG_WARNING("%s: huge IR length %u", tap->dotted_name, tap->ir_length);
tcl.c:466handle_jtag_newtap_args()
LOG_WARNING("%s: nonstandard IR mask", tap->dotted_name);
tcl.c:477handle_jtag_newtap_args()
LOG_WARNING("%s: nonstandard IR value", tap->dotted_name);
tcl.c:944handle_irscan_command()
LOG_WARNING("unstable irscan endstate \"%s\"",
ti_icdi_usb.c:330icdi_usb_version()
LOG_WARNING("unable to get ICDI version");
tms470.c:131tms470_read_part_info()
LOG_WARNING("Cannot identify target as a TMS470 family.");
tms470.c:242tms470_read_part_info()
LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.",
tms470.c:482tms470_unlock_flash()
LOG_WARNING("tms470 could not unlock flash memory protection level 2");
tms470.c:631tms470_flash_status()
LOG_WARNING("tms470 flash command: erase still active after busy clear.");
tms470.c:636tms470_flash_status()
LOG_WARNING("tms470 flash command: program still active after busy clear.");
tms470.c:641tms470_flash_status()
LOG_WARNING("tms470 flash command: invalid data command.");
tms470.c:646tms470_flash_status()
LOG_WARNING("tms470 flash command: program, erase or validate sector failed.");
tms470.c:651tms470_flash_status()
LOG_WARNING("tms470 flash command: voltage instability detected.");
tms470.c:656tms470_flash_status()
LOG_WARNING("tms470 flash command: command suspend detected.");
tms470.c:661tms470_flash_status()
LOG_WARNING("tms470 flash command: sector was locked.");
tms470.c:970tms470_probe()
LOG_WARNING("Cannot communicate... target not halted.");
transport.c:280handle_transport_select()
LOG_WARNING("Transport \"%s\" was already selected", session->name);
uCOS-III.c:116ucos_iii_find_or_create_thread()
LOG_WARNING("uCOS-III: too many threads; increase UCOS_III_MAX_THREADS");
usb_blaster.c:899ublast_handle_vid_pid_command()
LOG_WARNING("ignoring extra IDs in ublast_vid_pid "
usb_blaster.c:908ublast_handle_vid_pid_command()
LOG_WARNING("incomplete ublast_vid_pid configuration");
usb_blaster.c:915ublast_handle_vid_pid_command()
LOG_WARNING("incomplete ublast_vid_pid configuration");
w600.c:232w600_write()
LOG_WARNING("offset 0x%" PRIx32 " breaks required %d-byte alignment",
w600.c:238w600_write()
LOG_WARNING("count 0x%" PRIx32 " breaks required %d-byte alignment",
x86_32_common.c:1157unset_breakpoint()
LOG_WARNING("breakpoint not set");
x86_32_common.c:1241unset_watchpoint()
LOG_WARNING("watchpoint not set");
xds110.c:1387xds110_show_info()
LOG_WARNING("XDS110: the firmware is not optimized for OpenOCD");
xds110.c:1388xds110_show_info()
LOG_WARNING(OCD_FIRMWARE_UPGRADE);
xds110.c:1457xds110_init()
LOG_WARNING(
xmc1xxx.c:73xmc1xxx_nvm_check_idle()
LOG_WARNING("NVMPROG.ACTION");
xmc1xxx.c:96xmc1xxx_erase()
LOG_WARNING("Cannot communicate... target not halted.");
xmc1xxx.c:139xmc1xxx_erase()
LOG_WARNING("Couldn't restore NVMPROG.ACTION");
xmc1xxx.c:169xmc1xxx_erase_check()
LOG_WARNING("Cannot communicate... target not halted.");
xmc1xxx.c:214xmc1xxx_erase_check()
LOG_WARNING("Couldn't restore NVMPROG.ACTION");
xmc1xxx.c:263xmc1xxx_write()
LOG_WARNING("length %" PRIu32 " is not block aligned, rounding up",
xmc1xxx.c:268xmc1xxx_write()
LOG_WARNING("Cannot communicate... target not halted.");
xmc1xxx.c:351xmc1xxx_write()
LOG_WARNING("Couldn't restore NVMPROG.ACTION");
xmc1xxx.c:385xmc1xxx_protect_check()
LOG_WARNING("Cannot communicate... target not halted.");
xmc1xxx.c:410xmc1xxx_get_info_command()
LOG_WARNING("Cannot communicate... target not halted.");
xmc1xxx.c:452xmc1xxx_probe()
LOG_WARNING("Cannot communicate... target not halted.");
xmc4xxx.c:331xmc4xxx_probe()
LOG_WARNING("Cannot communicate... target not halted.");
xmc4xxx.c:801xmc4xxx_get_info_command()
LOG_WARNING("Cannot communicate... target not halted.");
xmc4xxx.c:1145xmc4xxx_protect()
LOG_WARNING("Flash protection will be temporarily disabled"
xscale.c:1438xscale_assert_reset()
LOG_WARNING("Reset is not asserted because the target is not examined.");
xscale.c:1439xscale_assert_reset()
LOG_WARNING("Use a reset button or power cycle the target.");
xscale.c:2081xscale_set_breakpoint()
LOG_WARNING("breakpoint already set");
xscale.c:2171xscale_unset_breakpoint()
LOG_WARNING("breakpoint not set");
xscale.c:2300xscale_add_watchpoint()
LOG_WARNING("xscale does not support value, mask arguments; ignoring");
xscale.c:2344xscale_unset_watchpoint()
LOG_WARNING("breakpoint not set");
xscale.c:2665xscale_analyze_trace()
LOG_WARNING("No trace image loaded; use 'xscale trace_image'");
xscale.c:2743xscale_analyze_trace()
LOG_WARNING("trace is suspect: invalid trace message byte");
xscale.c:2800xscale_analyze_trace()
LOG_WARNING("trace is suspect: checkpoint register "
xscale.c:2816xscale_analyze_trace()
LOG_WARNING("trace is suspect: checkpoint register "
xscale.c:2841xscale_analyze_trace()
LOG_WARNING("trace is suspect: excessive gap at end of trace");
xsvf.c:264handle_xsvf_command()
LOG_WARNING("XSVF support in OpenOCD is limited. Consider using SVF instead");
xsvf.c:317handle_xsvf_command()
LOG_WARNING("XSVF: dodgey RESET");
xtensa.c:442xtensa_core_reg_get()
LOG_WARNING("Read unknown register 0x%04x ignored", regnum);
xtensa.c:462xtensa_core_reg_set()
LOG_WARNING("Write unknown register 0x%04x ignored", regnum);
xtensa.c:787xtensa_write_dirty_registers()
LOG_WARNING(
xtensa.c:1787xtensa_do_step()
LOG_TARGET_WARNING(
xtensa.c:1867xtensa_do_step()
LOG_TARGET_WARNING(
xtensa.c:1900xtensa_do_step()
LOG_TARGET_WARNING(target, "Stepping doesn't seem to change PC! dsr=0x%08" PRIx32,
xtensa.c:2069xtensa_read_memory()
LOG_TARGET_WARNING(target, "Failed reading %d bytes at address "TARGET_ADDR_FMT,
xtensa.c:2112xtensa_write_memory()
LOG_WARNING("address " TARGET_ADDR_FMT " not writable", address);
xtensa.c:2239xtensa_write_memory()
LOG_TARGET_WARNING(target, "Failed writing %d bytes at address "TARGET_ADDR_FMT,
xtensa.c:2300xtensa_checksum_memory()
LOG_WARNING("not implemented yet");
xtensa.c:2566xtensa_breakpoint_add()
LOG_TARGET_WARNING(target, "No free slots to add SW breakpoint!");
xtensa.c:2609xtensa_breakpoint_remove()
LOG_TARGET_WARNING(target, "Max SW breakpoints slot reached, slot=%u!", slot);
xtensa.c:2657xtensa_watchpoint_add()
LOG_TARGET_WARNING(target, "No free slots to add HW watchpoint!");
xtensa.c:2666xtensa_watchpoint_add()
LOG_TARGET_WARNING(
xtensa.c:2702xtensa_watchpoint_remove()
LOG_TARGET_WARNING(target, "HW watchpoint " TARGET_ADDR_FMT " not found!", watchpoint->address);
xtensa.c:2728xtensa_start_algorithm()
LOG_WARNING("Target not halted!");
xtensa.c:2941xtensa_build_reg_cache()
LOG_TARGET_WARNING(target, "Register count MISMATCH: %d core regs, %d extended regs; %d expected",
xtensa.c:3049xtensa_build_reg_cache()
LOG_TARGET_WARNING(target, "contiguous register %s not found",
xtensa.c:3288xtensa_gdb_query_custom()
LOG_TARGET_WARNING(target, "%cCache mismatch; check xtensa-core-XXX.cfg file",
xtensa.c:3310xtensa_gdb_query_custom()
LOG_TARGET_WARNING(target, "%s mismatch; check xtensa-core-XXX.cfg file",
xtensa.c:3326xtensa_gdb_query_custom()
LOG_TARGET_WARNING(target, "EXCM_LEVEL mismatch; check xtensa-core-XXX.cfg file");
xtensa.c:3366xtensa_gdb_query_custom()
LOG_TARGET_WARNING(target, "Unknown target-specific query packet: %s", packet);
xtensa.c:3717xtensa_cmd_xtopt_do()
LOG_WARNING("Unknown xtensa command ignored: \"xtopt %s %s\"", CMD_ARGV[0], CMD_ARGV[1]);
xtensa.c:4341xtensa_cmd_tracestart_do()
LOG_WARNING("Silently stop active tracing!");

Data Use

Functions using log_levels::LOG_LVL_WARNING
log_levels::LOG_LVL_WARNING
all items filtered out