Location | Text |
log.h:155 | #define LOG_TARGET_WARNING(target, fmt_str, ...) \ |
armv7m.c:542 | LOG_TARGET_WARNING(target, "Storing invalid register %s", reg->name); |
cortex_m.c:1079 | LOG_TARGET_WARNING(target, "external resume detected"); |
cortex_m.c:1204 | LOG_TARGET_WARNING(target, "target was in unknown state when halt was requested"); |
cortex_m.c:1953 | LOG_TARGET_WARNING(target, "VECTRESET is not supported on this Cortex-M core, using SYSRESETREQ instead."); |
cortex_m.c:1954 | LOG_TARGET_WARNING(target, "Set 'cortex_m reset_config sysresetreq'."); |
cortex_m.c:1961 | LOG_TARGET_WARNING(target, "Only resetting the Cortex-M core, use a reset-init event " |
cortex_m.c:2031 | |
cortex_m.c:2115 | LOG_TARGET_WARNING(target, "breakpoint not set"); |
cortex_m.c:2262 | LOG_TARGET_WARNING(target, "watchpoint (wpid: %d) not set", |
cortex_m.c:2809 | LOG_TARGET_WARNING(target, "Erratum 702596: single stepping may enter pending exception handler!"); |
cortex_m.c:2813 | LOG_TARGET_WARNING(target, "Erratum 3092511: Cortex-M7 can halt in an incorrect address when breakpoint and exception occurs simultaneously"); |
cortex_m.c:3251 | LOG_TARGET_WARNING(target, "VECTRESET is not supported on your Cortex-M core!"); |
esp32_apptrace.c:983 | LOG_TARGET_WARNING(ctx->cpus[i], "apptrace connection is lost. Re-connect."); |
esp32_apptrace.c:990 | LOG_TARGET_WARNING(ctx->cpus[i], "in critical state. Retry in next poll"); |
gdb_server.c:1077 | LOG_TARGET_WARNING(target, "GDB connection %d not halted", |
gdb_server.c:2447 | LOG_TARGET_WARNING(head->target, "Register %s does not exist, which is part of an SMP group where " |
xtensa.c:1787 | |
xtensa.c:1867 | |
xtensa.c:1900 | LOG_TARGET_WARNING(target, "Stepping doesn't seem to change PC! dsr=0x%08" PRIx32, |
xtensa.c:2069 | |
xtensa.c:2239 | |
xtensa.c:2566 | LOG_TARGET_WARNING(target, "No free slots to add SW breakpoint!"); |
xtensa.c:2609 | LOG_TARGET_WARNING(target, "Max SW breakpoints slot reached, slot=%u!", slot); |
xtensa.c:2657 | LOG_TARGET_WARNING(target, "No free slots to add HW watchpoint!"); |
xtensa.c:2666 | |
xtensa.c:2702 | |
xtensa.c:2941 | LOG_TARGET_WARNING(target, "Register count MISMATCH: %d core regs, %d extended regs; %d expected", |
xtensa.c:3049 | LOG_TARGET_WARNING(target, "contiguous register %s not found", |
xtensa.c:3288 | LOG_TARGET_WARNING(target, "%cCache mismatch; check xtensa-core-XXX.cfg file", |
xtensa.c:3310 | LOG_TARGET_WARNING(target, "%s mismatch; check xtensa-core-XXX.cfg file", |
xtensa.c:3326 | LOG_TARGET_WARNING(target, "EXCM_LEVEL mismatch; check xtensa-core-XXX.cfg file"); |
xtensa.c:3366 | LOG_TARGET_WARNING(target, "Unknown target-specific query packet: %s", packet); |