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CodeScopeSTM32 Libraries and SamplesHALSRAM_HandleTypeDef

SRAM_HandleTypeDef struct

Syntax

typedef struct #endif {   FMC_NORSRAM_TypeDef           *Instance;     FMC_NORSRAM_EXTENDED_TypeDef  *Extended;     FMC_NORSRAM_InitTypeDef       Init;          HAL_LockTypeDef               Lock;          __IO HAL_SRAM_StateTypeDef    State;         DMA_HandleTypeDef             *hdma;       #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)   void (* MspInitCallback)(struct __SRAM_HandleTypeDef *hsram);                  void (* MspDeInitCallback)(struct __SRAM_HandleTypeDef *hsram);                void (* DmaXferCpltCallback)(DMA_HandleTypeDef *hdma);                         void (* DmaXferErrorCallback)(DMA_HandleTypeDef *hdma);                      #endif  } SRAM_HandleTypeDef;

Fields

Instance

Register base address. Read more...

Extended

Extended mode register base address. Read more...

Init

SRAM device control configuration parameters. Read more...

Lock

SRAM locking object. Read more...

State

SRAM device access state. Read more...

hdma

Pointer DMA handler. Read more...

Examples

SRAM_HandleTypeDef is referenced by 15 libraries and example projects.

References

LocationReferrerScopeText
stm32f4xx_hal_sram.h:67
typedef struct
stm32f4xx_hal_sram.h:88
} SRAM_HandleTypeDef;
stm32f4xx_hal_sram.c:174HAL_SRAM_Init()::hsramHAL_SRAM_Init()
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing,
stm32f4xx_hal_sram.c:229HAL_SRAM_DeInit()::hsramHAL_SRAM_DeInit()
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
stm32f4xx_hal_sram.c:262HAL_SRAM_MspInit()::hsramHAL_SRAM_MspInit()
__weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
stm32f4xx_hal_sram.c:278HAL_SRAM_MspDeInit()::hsramHAL_SRAM_MspDeInit()
__weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
stm32f4xx_hal_sram.c:347HAL_SRAM_Read_8b()::hsramHAL_SRAM_Read_8b()
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer,
stm32f4xx_hal_sram.c:395HAL_SRAM_Write_8b()::hsramHAL_SRAM_Write_8b()
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer,
stm32f4xx_hal_sram.c:442HAL_SRAM_Read_16b()::hsramHAL_SRAM_Read_16b()
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer,
stm32f4xx_hal_sram.c:502HAL_SRAM_Write_16b()::hsramHAL_SRAM_Write_16b()
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer,
stm32f4xx_hal_sram.c:561HAL_SRAM_Read_32b()::hsramHAL_SRAM_Read_32b()
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer,
stm32f4xx_hal_sram.c:609HAL_SRAM_Write_32b()::hsramHAL_SRAM_Write_32b()
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer,
stm32f4xx_hal_sram.c:656HAL_SRAM_Read_DMA()::hsramHAL_SRAM_Read_DMA()
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer,
stm32f4xx_hal_sram.c:705HAL_SRAM_Write_DMA()::hsramHAL_SRAM_Write_DMA()
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer,
stm32f4xx_hal_sram.c:930HAL_SRAM_WriteOperation_Enable()::hsramHAL_SRAM_WriteOperation_Enable()
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
stm32f4xx_hal_sram.c:964HAL_SRAM_WriteOperation_Disable()::hsramHAL_SRAM_WriteOperation_Disable()
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
stm32f4xx_hal_sram.c:1017HAL_SRAM_GetState()::hsramHAL_SRAM_GetState()
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram)
stm32f4xx_hal_sram.c:1041SRAM_DMACplt()::hsramSRAM_DMACplt()
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
stm32f4xx_hal_sram.c:1063SRAM_DMACpltProt()::hsramSRAM_DMACpltProt()
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
stm32f4xx_hal_sram.c:1085SRAM_DMAError()::hsramSRAM_DMAError()
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
stm32f4xx_hal_sram.h:88SRAM_HandleTypeDef
} SRAM_HandleTypeDef;
stm32f4xx_hal_sram.h:147HAL_SRAM_Init()::hsramHAL_SRAM_Init()
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing,
stm32f4xx_hal_sram.h:149HAL_SRAM_DeInit()::hsramHAL_SRAM_DeInit()
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
stm32f4xx_hal_sram.h:150HAL_SRAM_MspInit()::hsramHAL_SRAM_MspInit()
void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
stm32f4xx_hal_sram.h:151HAL_SRAM_MspDeInit()::hsramHAL_SRAM_MspDeInit()
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
stm32f4xx_hal_sram.h:162HAL_SRAM_Read_8b()::hsramHAL_SRAM_Read_8b()
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer,
stm32f4xx_hal_sram.h:164HAL_SRAM_Write_8b()::hsramHAL_SRAM_Write_8b()
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer,
stm32f4xx_hal_sram.h:166HAL_SRAM_Read_16b()::hsramHAL_SRAM_Read_16b()
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer,
stm32f4xx_hal_sram.h:168HAL_SRAM_Write_16b()::hsramHAL_SRAM_Write_16b()
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer,
stm32f4xx_hal_sram.h:170HAL_SRAM_Read_32b()::hsramHAL_SRAM_Read_32b()
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer,
stm32f4xx_hal_sram.h:172HAL_SRAM_Write_32b()::hsramHAL_SRAM_Write_32b()
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer,
stm32f4xx_hal_sram.h:174HAL_SRAM_Read_DMA()::hsramHAL_SRAM_Read_DMA()
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer,
stm32f4xx_hal_sram.h:176HAL_SRAM_Write_DMA()::hsramHAL_SRAM_Write_DMA()
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer,
stm32f4xx_hal_sram.h:200HAL_SRAM_WriteOperation_Enable()::hsramHAL_SRAM_WriteOperation_Enable()
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
stm32f4xx_hal_sram.h:201HAL_SRAM_WriteOperation_Disable()::hsramHAL_SRAM_WriteOperation_Disable()
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
stm32f4xx_hal_sram.h:212HAL_SRAM_GetState()::hsramHAL_SRAM_GetState()
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram);

Type Use

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SRAM_HandleTypeDef
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