HAL + 0/14 examples
CodeScope will show references to RCC_PLLI2SInitTypeDef::PLLI2SR from the following samples and libraries:
 
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CodeScopeSTM32 Libraries and SamplesHALRCC_PLLI2SInitTypeDef::PLLI2SR

RCC_PLLI2SInitTypeDef::PLLI2SR field

Specifies the division factor for I2S clock. This parameter must be a number between Min_Data = 2 and Max_Data = 7. This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI

Syntax

uint32_t PLLI2SR;

Examples

RCC_PLLI2SInitTypeDef::PLLI2SR is referenced by 14 libraries and example projects.

References

LocationReferrerText
stm32f4xx_hal_rcc_ex.h:94
uint32_t PLLI2SR; /*!< Specifies the division factor for I2S clock.
stm32f4xx_hal_rcc_ex.h:217
uint32_t PLLI2SR; /*!< Specifies the division factor for I2S clock.
stm32f4xx_hal_rcc_ex.h:303
uint32_t PLLI2SR; /*!< Specifies the division factor for I2S clock.
stm32f4xx_hal_rcc_ex.h:394
uint32_t PLLI2SR; /*!< Specifies the division factor for I2S clock.
stm32f4xx_hal_rcc_ex.c:333HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
stm32f4xx_hal_rcc_ex.c:341HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , plli2sp, plli2sq, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:385HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
stm32f4xx_hal_rcc_ex.c:390HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:506HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
stm32f4xx_hal_rcc_ex.c:934HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
stm32f4xx_hal_rcc_ex.c:938HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:966HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
stm32f4xx_hal_rcc_ex.c:969HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:1167HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
stm32f4xx_hal_rcc_ex.c:1520HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:1539HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sq, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:1556HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:1669HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
stm32f4xx_hal_rcc_ex.c:2218HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
stm32f4xx_hal_rcc_ex.c:2222HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2250HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
stm32f4xx_hal_rcc_ex.c:2253HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2423HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
stm32f4xx_hal_rcc_ex.c:2546HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
stm32f4xx_hal_rcc_ex.c:2569HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_I2SCLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2574HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2670HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
stm32f4xx_hal_rcc_ex.c:2833HAL_RCCEx_EnablePLLI2S()
assert_param(IS_RCC_PLLI2SR_VALUE(PLLI2SInit->PLLI2SR));
stm32f4xx_hal_rcc_ex.c:2865HAL_RCCEx_EnablePLLI2S()
PLLI2SInit->PLLI2SP, PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2872HAL_RCCEx_EnablePLLI2S()
PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2878HAL_RCCEx_EnablePLLI2S()
__HAL_RCC_PLLI2S_SAICLK_CONFIG(PLLI2SInit->PLLI2SN, PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2882HAL_RCCEx_EnablePLLI2S()
__HAL_RCC_PLLI2S_I2SCLK_CONFIG(PLLI2SInit->PLLI2SM, PLLI2SInit->PLLI2SN, PLLI2SInit->PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2886HAL_RCCEx_EnablePLLI2S()
__HAL_RCC_PLLI2S_CONFIG(PLLI2SInit->PLLI2SN, PLLI2SInit->PLLI2SR);

Data Use

Functions writing RCC_PLLI2SInitTypeDef::PLLI2SR
Functions reading RCC_PLLI2SInitTypeDef::PLLI2SR
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RCC_PLLI2SInitTypeDef::PLLI2SR
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Type of RCC_PLLI2SInitTypeDef::PLLI2SR
RCC_PLLI2SInitTypeDef::PLLI2SR
uint32_t
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