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CodeScopeSTM32 Libraries and SamplesHALRCC_PLLI2SInitTypeDef::PLLI2SQ

RCC_PLLI2SInitTypeDef::PLLI2SQ field

Specifies the division factor for SAI1 clock. This parameter must be a number between Min_Data = 2 and Max_Data = 15. This parameter will be used only when PLLI2S is selected as Clock Source SAI

Syntax

uint32_t PLLI2SQ;

Examples

RCC_PLLI2SInitTypeDef::PLLI2SQ is referenced by 38 libraries and example projects.

References

LocationReferrerText
stm32f4xx_hal_rcc_ex.h:90
uint32_t PLLI2SQ; /*!< Specifies the division factor for SAI clock.
stm32f4xx_hal_rcc_ex.h:213
uint32_t PLLI2SQ; /*!< Specifies the division factor for SAI clock.
stm32f4xx_hal_rcc_ex.h:307
uint32_t PLLI2SQ; /*!< Specifies the division factor for SAI1 clock.
stm32f4xx_hal_rcc_ex.c:349HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
stm32f4xx_hal_rcc_ex.c:360HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , plli2sp, PeriphClkInit->PLLI2S.PLLI2SQ, plli2sr);
stm32f4xx_hal_rcc_ex.c:386HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
stm32f4xx_hal_rcc_ex.c:390HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:505HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
stm32f4xx_hal_rcc_ex.c:947HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
stm32f4xx_hal_rcc_ex.c:956HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ , tmpreg1);
stm32f4xx_hal_rcc_ex.c:965HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
stm32f4xx_hal_rcc_ex.c:969HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:1168HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
stm32f4xx_hal_rcc_ex.c:1520HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:1556HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:1668HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
stm32f4xx_hal_rcc_ex.c:2231HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
stm32f4xx_hal_rcc_ex.c:2240HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ , tmpreg1);
stm32f4xx_hal_rcc_ex.c:2249HAL_RCCEx_PeriphCLKConfig()
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
stm32f4xx_hal_rcc_ex.c:2253HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2424HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
stm32f4xx_hal_rcc_ex.c:2841HAL_RCCEx_EnablePLLI2S()
assert_param(IS_RCC_PLLI2SQ_VALUE(PLLI2SInit->PLLI2SQ));
stm32f4xx_hal_rcc_ex.c:2865HAL_RCCEx_EnablePLLI2S()
PLLI2SInit->PLLI2SP, PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2872HAL_RCCEx_EnablePLLI2S()
PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);
stm32f4xx_hal_rcc_ex.c:2878HAL_RCCEx_EnablePLLI2S()
__HAL_RCC_PLLI2S_SAICLK_CONFIG(PLLI2SInit->PLLI2SN, PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);

Data Use

Functions writing RCC_PLLI2SInitTypeDef::PLLI2SQ
Functions reading RCC_PLLI2SInitTypeDef::PLLI2SQ
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RCC_PLLI2SInitTypeDef::PLLI2SQ
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Type of RCC_PLLI2SInitTypeDef::PLLI2SQ
RCC_PLLI2SInitTypeDef::PLLI2SQ
uint32_t
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