uint32_t PLLI2SM;
Location | Referrer | Text |
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stm32f4xx_hal_rcc_ex.h:81 | uint32_t PLLI2SM; /*!< Specifies division factor for PLL VCO input clock. | |
stm32f4xx_hal_rcc_ex.h:207 | uint32_t PLLI2SM; /*!< Specifies division factor for PLL VCO input clock. | |
stm32f4xx_hal_rcc_ex.h:385 | uint32_t PLLI2SM; /*!< PLLM: Division factor for PLLI2S VCO input clock. | |
stm32f4xx_hal_rcc_ex.c:325 | HAL_RCCEx_PeriphCLKConfig() | |
stm32f4xx_hal_rcc_ex.c:341 | HAL_RCCEx_PeriphCLKConfig() | __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , plli2sp, plli2sq, PeriphClkInit->PLLI2S.PLLI2SR); |
stm32f4xx_hal_rcc_ex.c:360 | HAL_RCCEx_PeriphCLKConfig() | __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , plli2sp, PeriphClkInit->PLLI2S.PLLI2SQ, plli2sr); |
stm32f4xx_hal_rcc_ex.c:377 | HAL_RCCEx_PeriphCLKConfig() | __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, plli2sq, plli2sr); |
stm32f4xx_hal_rcc_ex.c:390 | HAL_RCCEx_PeriphCLKConfig() | |
stm32f4xx_hal_rcc_ex.c:502 | HAL_RCCEx_GetPeriphCLKConfig() | PeriphClkInit->PLLI2S.PLLI2SM = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM) >> RCC_PLLI2SCFGR_PLLI2SM_Pos); |
stm32f4xx_hal_rcc_ex.c:1520 | HAL_RCCEx_PeriphCLKConfig() | __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); |
stm32f4xx_hal_rcc_ex.c:1539 | HAL_RCCEx_PeriphCLKConfig() | __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sq, PeriphClkInit->PLLI2S.PLLI2SR); |
stm32f4xx_hal_rcc_ex.c:1556 | HAL_RCCEx_PeriphCLKConfig() | __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); |
stm32f4xx_hal_rcc_ex.c:1666 | HAL_RCCEx_GetPeriphCLKConfig() | PeriphClkInit->PLLI2S.PLLI2SM = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM) >> RCC_PLLI2SCFGR_PLLI2SM_Pos); |
stm32f4xx_hal_rcc_ex.c:2569 | HAL_RCCEx_PeriphCLKConfig() | __HAL_RCC_PLLI2S_I2SCLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SR); |
stm32f4xx_hal_rcc_ex.c:2672 | HAL_RCCEx_GetPeriphCLKConfig() | PeriphClkInit->PLLI2S.PLLI2SM = (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM); |
stm32f4xx_hal_rcc_ex.c:2835 | HAL_RCCEx_EnablePLLI2S() | |
stm32f4xx_hal_rcc_ex.c:2864 | HAL_RCCEx_EnablePLLI2S() | |
stm32f4xx_hal_rcc_ex.c:2871 | HAL_RCCEx_EnablePLLI2S() | __HAL_RCC_PLLI2S_CONFIG(PLLI2SInit->PLLI2SM, PLLI2SInit->PLLI2SN, \ |
stm32f4xx_hal_rcc_ex.c:2882 | HAL_RCCEx_EnablePLLI2S() | __HAL_RCC_PLLI2S_I2SCLK_CONFIG(PLLI2SInit->PLLI2SM, PLLI2SInit->PLLI2SN, PLLI2SInit->PLLI2SR); |