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LOWER16
is only used within OpenOCD.
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LOWER16
LOWER16 macro
Syntax
from
mips32_pracc.h:32
#define
LOWER16
(
addr
)
(
(
addr
)
&
0xFFFF
)
Arguments
addr
References
Location
Text
mips32_pracc.h:32
#define
LOWER16
(
addr
)
(
(
addr
)
&
0xFFFF
)
mips64_pracc.h:31
#define
LOWER16
(
v
)
(
(
uint32_t
)
(
v
&
0xFFFF
)
)
mips64_pracc.h:29
#undef
LOWER16
ath79.c:140
MIPS32_ORI
(
0
,
2
,
2
,
LOWER16
(
1
)
)
,
ath79.c:145
MIPS32_ORI
(
0
,
2
,
2
,
LOWER16
(
cs_high
)
)
,
ath79.c:154
MIPS32_ORI
(
0
,
8
,
8
,
LOWER16
(
(
clock_low
+
0
)
)
)
,
ath79.c:157
MIPS32_ORI
(
0
,
9
,
9
,
LOWER16
(
(
clock_low
+
1
)
)
)
,
ath79.c:160
MIPS32_ORI
(
0
,
10
,
10
,
LOWER16
(
(
clock_high
+
0
)
)
)
,
ath79.c:163
MIPS32_ORI
(
0
,
11
,
11
,
LOWER16
(
(
clock_high
+
1
)
)
)
,
ath79.c:213
MIPS32_ORI
(
0
,
2
,
2
,
LOWER16
(
cs_high
)
)
,
mips32.c:1710
pracc_add
(
ctx
,
0
,
MIPS32_ORI
(
isa
,
15
,
15
,
LOWER16
(
MIPS32_DSP_ENABLE
)
)
)
;
mips32.c:1795
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
isa
,
8
,
8
,
LOWER16
(
ejtag_info
->
reg8
)
)
)
;
mips32.c:1802
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
isa
,
9
,
9
,
LOWER16
(
ejtag_info
->
reg9
)
)
)
;
mips32.c:1854
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
isa
,
8
,
8
,
LOWER16
(
val
)
)
)
;
mips32.c:1869
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
isa
,
8
,
8
,
LOWER16
(
ejtag_info
->
reg8
)
)
)
;
mips32.c:1877
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
isa
,
9
,
9
,
LOWER16
(
ejtag_info
->
reg9
)
)
)
;
mips32_pracc.c:329
if
(
LOWER16
(
data
)
==
0
&&
optimize
)
mips32_pracc.c:332
pracc_add
(
ctx
,
0
,
MIPS32_ORI
(
ctx
->
isa
,
reg_num
,
0
,
LOWER16
(
data
)
)
)
;
/* load only lower */
mips32_pracc.c:335
pracc_add
(
ctx
,
0
,
MIPS32_ORI
(
ctx
->
isa
,
reg_num
,
reg_num
,
LOWER16
(
data
)
)
)
;
mips32_pracc.c:455
pracc_add
(
&
ctx
,
0
,
MIPS32_LW
(
ctx
.
isa
,
8
,
LOWER16
(
addr
)
,
8
)
)
;
/* lw $8, LOWER16(addr)($8) */
mips32_pracc.c:508
pracc_add
(
&
ctx
,
0
,
MIPS32_LW
(
ctx
.
isa
,
8
,
LOWER16
(
addr
)
,
9
)
)
;
mips32_pracc.c:510
pracc_add
(
&
ctx
,
0
,
MIPS32_LHU
(
ctx
.
isa
,
8
,
LOWER16
(
addr
)
,
9
)
)
;
mips32_pracc.c:512
pracc_add
(
&
ctx
,
0
,
MIPS32_LBU
(
ctx
.
isa
,
8
,
LOWER16
(
addr
)
,
9
)
)
;
mips32_pracc.c:566
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
ctx
.
isa
,
8
,
8
,
LOWER16
(
ejtag_info
->
reg8
)
)
)
;
/* restore lower 16 bits of $8 */
mips32_pracc.c:604
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
ctx
.
isa
,
8
,
8
,
LOWER16
(
ejtag_info
->
reg8
)
)
)
;
/* restore lower 16 bits of $8 */
mips32_pracc.c:706
pracc_add
(
&
ctx
,
0
,
MIPS32_SYNCI
(
ctx
.
isa
,
LOWER16
(
start_addr
)
,
15
)
)
;
mips32_pracc.c:711
LOWER16
(
start_addr
)
,
15
)
)
;
mips32_pracc.c:714
LOWER16
(
start_addr
)
,
15
)
)
;
mips32_pracc.c:769
pracc_add
(
&
ctx
,
0
,
MIPS32_SW
(
ctx
.
isa
,
8
,
LOWER16
(
addr
)
,
15
)
)
;
/* store word to mem */
mips32_pracc.c:774
pracc_add
(
&
ctx
,
0
,
MIPS32_SH
(
ctx
.
isa
,
8
,
LOWER16
(
addr
)
,
15
)
)
;
/* store half word */
mips32_pracc.c:779
pracc_add
(
&
ctx
,
0
,
MIPS32_SB
(
ctx
.
isa
,
8
,
LOWER16
(
addr
)
,
15
)
)
;
/* store byte */
mips32_pracc.c:957
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
ctx
.
isa
,
1
,
1
,
LOWER16
(
(
gprs
[
1
]
)
)
)
)
;
mips32_pracc.c:1238
MIPS32_ORI
(
isa
,
8
,
8
,
LOWER16
(
MIPS32_PRACC_FASTDATA_AREA
)
)
,
mips32_pracc.c:1258
MIPS32_ORI
(
isa
,
15
,
15
,
LOWER16
(
MIPS32_PRACC_TEXT
)
|
isa
)
,
/* isa bit for JR instr */
mips32_pracc.c:1280
MIPS32_ORI
(
isa
,
15
,
15
,
LOWER16
(
source
->
address
)
|
isa
)
,
/* isa bit for JR instr */
mips32_pracc.h:34
#define
SWAP16
(
v
)
(
(
LOWER16
(
v
)
<
<
16
)
|
(
UPPER16
(
v
)
)
)
mips64_pracc.c:322
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:377
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:437
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:497
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:573
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:635
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:697
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:757
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:834
MIPS64_ORI
(
2
,
2
,
LOWER16
(
MIPS64_PRACC_PARAM_IN
)
)
,
mips64_pracc.c:843
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:847
MIPS64_ORI
(
1
,
1
,
LOWER16
(
MIPS64_PRACC_PARAM_IN
)
)
,
mips64_pracc.c:1044
MIPS64_ORI
(
2
,
2
,
LOWER16
(
MIPS64_PRACC_PARAM_OUT
)
)
,
mips64_pracc.c:1057
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,
mips64_pracc.c:1064
MIPS64_ORI
(
1
,
1
,
LOWER16
(
MIPS64_PRACC_PARAM_OUT
)
)
,
mips64_pracc.c:1284
MIPS64_ORI
(
8
,
8
,
LOWER16
(
MIPS64_PRACC_FASTDATA_AREA
)
)
,
mips64_pracc.c:1306
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_TEXT
)
)
,
mips64_pracc.c:1356
jmp_code
[
1
]
|=
LOWER16
(
source
->
address
)
;
mips_ejtag.c:199
pracc_add
(
&
ctx
,
0
,
MIPS32_ORI
(
ctx
.
isa
,
8
,
8
,
LOWER16
(
ejtag_info
->
reg8
)
)
)
;
/* restore lower 16 bits of $8 */
mips_ejtag.c:473
MIPS64_ORI
(
15
,
15
,
LOWER16
(
MIPS64_PRACC_STACK
)
)
,