MIPS32_ORI is only used within OpenOCD.
 
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MIPS32_ORI macro

Syntax

#define MIPS32_ORI(isa, tar, src, val) (isa ? MMIPS32_ORI(tar, src, val) : MIPS32_ISA_ORI(tar, src, val))

Arguments

isa

tar

src

val

References

LocationText
mips32.h:749
#define MIPS32_ORI(isa, tar, src, val) (isa ? MMIPS32_ORI(tar, src, val) : MIPS32_ISA_ORI(tar, src, val))
ath79.c:140
MIPS32_ORI(0, 2, 2, LOWER16(1)),
ath79.c:145
MIPS32_ORI(0, 2, 2, LOWER16(cs_high)),
ath79.c:154
MIPS32_ORI(0, 8, 8, LOWER16((clock_low + 0))),
ath79.c:157
MIPS32_ORI(0, 9, 9, LOWER16((clock_low + 1))),
ath79.c:160
MIPS32_ORI(0, 10, 10, LOWER16((clock_high + 0))),
ath79.c:163
MIPS32_ORI(0, 11, 11, LOWER16((clock_high + 1))),
ath79.c:213
MIPS32_ORI(0, 2, 2, LOWER16(cs_high)),
cfi.c:1432
MIPS32_ORI(0, 9, 9, 0x80), /* ori $t1, $t1, 0x80 ; out = 0x80 */
mips32.c:1226
MIPS32_ORI(isa, 7, 2, 0x1db7), /* ori $a3, $v0, 0x1db7 */
mips32.c:1710
pracc_add(ctx, 0, MIPS32_ORI(isa, 15, 15, LOWER16(MIPS32_DSP_ENABLE)));
mips32.c:1795
pracc_add(&ctx, 0, MIPS32_ORI(isa, 8, 8, LOWER16(ejtag_info->reg8)));
mips32.c:1802
pracc_add(&ctx, 0, MIPS32_ORI(isa, 9, 9, LOWER16(ejtag_info->reg9)));
mips32.c:1854
pracc_add(&ctx, 0, MIPS32_ORI(isa, 8, 8, LOWER16(val)));
mips32.c:1869
pracc_add(&ctx, 0, MIPS32_ORI(isa, 8, 8, LOWER16(ejtag_info->reg8)));
mips32.c:1877
pracc_add(&ctx, 0, MIPS32_ORI(isa, 9, 9, LOWER16(ejtag_info->reg9)));
mips32_pracc.c:332
pracc_add(ctx, 0, MIPS32_ORI(ctx->isa, reg_num, 0, LOWER16(data))); /* load only lower */
mips32_pracc.c:335
pracc_add(ctx, 0, MIPS32_ORI(ctx->isa, reg_num, reg_num, LOWER16(data)));
mips32_pracc.c:566
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */
mips32_pracc.c:604
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */
mips32_pracc.c:773
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 0, *buf16)); /* load lower value */
mips32_pracc.c:778
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 0, *buf8)); /* load lower value */
mips32_pracc.c:957
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 1, 1, LOWER16((gprs[1]))));
mips32_pracc.c:1238
MIPS32_ORI(isa, 8, 8, LOWER16(MIPS32_PRACC_FASTDATA_AREA)),
mips32_pracc.c:1258
MIPS32_ORI(isa, 15, 15, LOWER16(MIPS32_PRACC_TEXT) | isa), /* isa bit for JR instr */
mips32_pracc.c:1280
MIPS32_ORI(isa, 15, 15, LOWER16(source->address) | isa), /* isa bit for JR instr */
mips_ejtag.c:192
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, 0x0100)); /* set SSt bit in debug reg */
mips_ejtag.c:199
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */