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RCC_PLLSAIInitTypeDef::PLLSAIM
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CodeScope
STM32 Libraries and Samples
HAL
RCC_PLLSAIInitTypeDef::PLLSAIM
RCC_PLLSAIInitTypeDef::PLLSAIM field
Specifies division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 2 and Max_Data = 63
Syntax
from
stm32f4xx_hal_rcc_ex.h:104
uint32_t
PLLSAIM
;
Examples
RCC_PLLSAIInitTypeDef::PLLSAIM
is referenced by
27 libraries and example projects
.
References
Location
Referrer
Text
stm32f4xx_hal_rcc_ex.h:104
uint32_t
PLLSAIM
;
/*!< Specifies division factor for PLL VCO input clock.
stm32f4xx_hal_rcc_ex.c:428
HAL_RCCEx_PeriphCLKConfig()
assert_param
(
IS_RCC_PLLSAIM_VALUE
(
PeriphClkInit
->
PLLSAI
.
PLLSAIM
)
)
;
stm32f4xx_hal_rcc_ex.c:445
HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLSAI_CONFIG
(
PeriphClkInit
->
PLLSAI
.
PLLSAIM
,
PeriphClkInit
->
PLLSAI
.
PLLSAIN
,
pllsaip
,
PeriphClkInit
->
PLLSAI
.
PLLSAIQ
,
0U
)
;
stm32f4xx_hal_rcc_ex.c:462
HAL_RCCEx_PeriphCLKConfig()
__HAL_RCC_PLLSAI_CONFIG
(
PeriphClkInit
->
PLLSAI
.
PLLSAIM
,
PeriphClkInit
->
PLLSAI
.
PLLSAIN
,
PeriphClkInit
->
PLLSAI
.
PLLSAIP
,
pllsaiq
,
0U
)
;
stm32f4xx_hal_rcc_ex.c:508
HAL_RCCEx_GetPeriphCLKConfig()
PeriphClkInit
->
PLLSAI
.
PLLSAIM
=
(
uint32_t
)
(
(
RCC
->
PLLSAICFGR
&
RCC_PLLSAICFGR_PLLSAIM
)
>
>
RCC_PLLSAICFGR_PLLSAIM_Pos
)
;
stm32f4xx_hal_rcc_ex.c:2948
HAL_RCCEx_EnablePLLSAI()
assert_param
(
IS_RCC_PLLSAIM_VALUE
(
PLLSAIInit
->
PLLSAIM
)
)
;
stm32f4xx_hal_rcc_ex.c:2977
HAL_RCCEx_EnablePLLSAI()
__HAL_RCC_PLLSAI_CONFIG
(
PLLSAIInit
->
PLLSAIM
,
PLLSAIInit
->
PLLSAIN
,
\
Data Use
Functions writing
RCC_PLLSAIInitTypeDef::PLLSAIM
Functions reading
RCC_PLLSAIInitTypeDef::PLLSAIM
HAL_RCCEx_GetPeriphCLKConfig()
all items filtered out
RCC_PLLSAIInitTypeDef::PLLSAIM
HAL_RCCEx_PeriphCLKConfig()
HAL_RCCEx_EnablePLLSAI()
all items filtered out
Type of
RCC_PLLSAIInitTypeDef::PLLSAIM
RCC_PLLSAIInitTypeDef::PLLSAIM
uint32_t
all items filtered out