CMSIS + 0/1 examples
CodeScope will show references to TIM_TypeDef::DCR from the following samples and libraries:
 
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CodeScopeSTM32 Libraries and SamplesCMSISTIM_TypeDef::DCR

TIM_TypeDef::DCR field

TIM DMA control register, Address offset: 0x48

Syntax

__IO uint32_t DCR;

Examples

TIM_TypeDef::DCR is referenced by 1 libraries and example projects.

References

LocationText
stm32f401xc.h:489
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f401xe.h:489
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f407xx.h:748
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f410rx.h:495
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f410tx.h:492
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f411xe.h:490
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f412zx.h:673
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f413xx.h:734
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f417xx.h:747
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f429xx.h:866
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f439xx.h:867
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f446xx.h:765
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f469xx.h:949
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
stm32f479xx.h:950
__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */

Type Use

Type of TIM_TypeDef::DCR
TIM_TypeDef::DCR
uint32_t
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