CMSIS + 0/1 examples
CodeScope will show references to TIM_TypeDef::BDTR from the following samples and libraries:
 
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TIM_TypeDef::BDTR field

TIM break and dead-time register, Address offset: 0x44

Syntax

__IO uint32_t BDTR;

Examples

TIM_TypeDef::BDTR is referenced by 1 libraries and example projects.

References

LocationText
stm32f401xc.h:488
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f401xe.h:488
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f407xx.h:747
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f410rx.h:494
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f410tx.h:491
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f411xe.h:489
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f412zx.h:672
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f413xx.h:733
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f417xx.h:746
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f429xx.h:865
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f439xx.h:866
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f446xx.h:764
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f469xx.h:948
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
stm32f479xx.h:949
__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */

Type Use

Type of TIM_TypeDef::BDTR
TIM_TypeDef::BDTR
uint32_t
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