CMSIS + 0/1 examples
CodeScope will show references to RTC_TypeDef::ALRMBSSR from the following samples and libraries:
 
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CodeScopeSTM32 Libraries and SamplesCMSISRTC_TypeDef::ALRMBSSR

RTC_TypeDef::ALRMBSSR field

RTC alarm B sub second register, Address offset: 0x48

Syntax

__IO uint32_t ALRMBSSR;

Examples

RTC_TypeDef::ALRMBSSR is referenced by 1 libraries and example projects.

References

LocationText
stm32f401xc.h:395
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f401xe.h:395
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f407xx.h:654
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f410rx.h:429
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f410tx.h:426
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f411xe.h:396
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f412zx.h:559
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f413xx.h:599
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f417xx.h:653
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f429xx.h:751
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f439xx.h:752
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f446xx.h:612
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f469xx.h:814
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
stm32f479xx.h:815
__IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */

Type Use

Type of RTC_TypeDef::ALRMBSSR
RTC_TypeDef::ALRMBSSR
uint32_t
all items filtered out