CMSIS + 0/1 examples
CodeScope will show references to RCC_TypeDef::APB2LPENR from the following samples and libraries:
 
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RCC_TypeDef::APB2LPENR field

RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64

Syntax

__IO uint32_t APB2LPENR;

Examples

RCC_TypeDef::APB2LPENR is referenced by 1 libraries and example projects.

References

LocationText
stm32f401xc.h:360
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f401xe.h:360
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f407xx.h:621
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f410rx.h:393
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f410tx.h:390
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f411xe.h:361
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f412zx.h:522
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f413xx.h:562
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f417xx.h:620
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f429xx.h:716
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f439xx.h:717
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f446xx.h:575
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f469xx.h:779
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
stm32f479xx.h:780
__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */

Type Use

Type of RCC_TypeDef::APB2LPENR
RCC_TypeDef::APB2LPENR
uint32_t
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