CMSIS + 0/1 examples
CodeScope will show references to RCC_TypeDef::APB1LPENR from the following samples and libraries:
 
Symbols
loading...
Files
loading...
CodeScopeSTM32 Libraries and SamplesCMSISRCC_TypeDef::APB1LPENR

RCC_TypeDef::APB1LPENR field

RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60

Syntax

__IO uint32_t APB1LPENR;

Examples

RCC_TypeDef::APB1LPENR is referenced by 1 libraries and example projects.

References

LocationText
stm32f401xc.h:359
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f401xe.h:359
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f407xx.h:620
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f410rx.h:392
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f410tx.h:389
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f411xe.h:360
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f412zx.h:521
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f413xx.h:561
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f417xx.h:619
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f429xx.h:715
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f439xx.h:716
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f446xx.h:574
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f469xx.h:778
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
stm32f479xx.h:779
__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */

Type Use

Type of RCC_TypeDef::APB1LPENR
RCC_TypeDef::APB1LPENR
uint32_t
all items filtered out