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CodeScopeSTM32 Libraries and SamplesCMSISRCC_TypeDef::APB1ENR

RCC_TypeDef::APB1ENR field

RCC APB1 peripheral clock enable register, Address offset: 0x40

Syntax

__IO uint32_t APB1ENR;

Examples

RCC_TypeDef::APB1ENR is referenced by 1148 libraries and example projects.

References

LocationText
stm32f401xc.h:352
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f401xe.h:352
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f407xx.h:613
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f410rx.h:387
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f410tx.h:384
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f411xe.h:353
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f412zx.h:514
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f413xx.h:554
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f417xx.h:612
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f429xx.h:708
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f439xx.h:709
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f446xx.h:567
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f469xx.h:771
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
stm32f479xx.h:772
__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */

Type Use

Type of RCC_TypeDef::APB1ENR
RCC_TypeDef::APB1ENR
uint32_t
all items filtered out