CMSIS + 0/1 examples
CodeScope will show references to QUADSPI_TypeDef::LPTR from the following samples and libraries:
 
Symbols
loading...
Files
loading...
CodeScopeSTM32 Libraries and SamplesCMSISQUADSPI_TypeDef::LPTR

QUADSPI_TypeDef::LPTR field

QUADSPI Low Power Timeout register, Address offset: 0x30

Syntax

__IO uint32_t LPTR;

Examples

QUADSPI_TypeDef::LPTR is referenced by 1 libraries and example projects.

References

LocationText
stm32f412zx.h:646
__IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */
stm32f413xx.h:707
__IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */
stm32f446xx.h:720
__IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */
stm32f469xx.h:922
__IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */
stm32f479xx.h:923
__IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */

Type Use

Type of QUADSPI_TypeDef::LPTR
QUADSPI_TypeDef::LPTR
uint32_t
all items filtered out