CMSIS
+ 0/3 examples
CodeScope will show references to
FMC_Bank1_TypeDef::BTCR
from the following samples and libraries:
HAL
Examples
STM32469I_EVAL
Examples
FMC
FMC_SRAM_DataMemory
STM324x9I_EVAL
Examples
FMC
FMC_SRAM_DataMemory
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STM32 Libraries and Samples
CMSIS
FMC_Bank1_TypeDef::BTCR
FMC_Bank1_TypeDef::BTCR field
NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C
Syntax
from
stm32f446xx.h:415
__IO
uint32_t
BTCR
[
8
]
;
Examples
FMC_Bank1_TypeDef::BTCR
is referenced by
3 libraries and example projects
.
References
Location
Text
stm32f429xx.h:511
__IO
uint32_t
BTCR
[
8
]
;
/*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */
stm32f439xx.h:512
__IO
uint32_t
BTCR
[
8
]
;
/*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */
stm32f446xx.h:415
__IO
uint32_t
BTCR
[
8
]
;
/*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */
stm32f469xx.h:594
__IO
uint32_t
BTCR
[
8
]
;
/*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */
stm32f479xx.h:595
__IO
uint32_t
BTCR
[
8
]
;
/*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */
Type Use
Type of
FMC_Bank1_TypeDef::BTCR
FMC_Bank1_TypeDef::BTCR
uint32_t
all items filtered out