Location | Referrer | Scope | Text |
types.h:335 | | | typedef uint64_t target_addr_t; |
a64_disassembler.c:127 | a64_disassemble() | | |
a64_disassembler.h:16 | a64_disassemble()::address | a64_disassemble() | |
aarch64.c:55 | aarch64_virt2phys()::virt | aarch64_virt2phys() | target_addr_t virt, target_addr_t *phys); |
aarch64.c:256 | aarch64_dap_write_memap_register_u32() | | |
aarch64.c:855 | aarch64_resume() | | |
aarch64.c:1006 | aarch64_debug_entry() | | target_addr_t edwar = tmp; |
aarch64.c:1014 | aarch64_debug_entry() | | edwar |= ((target_addr_t)tmp) << 32; |
aarch64.c:1103 | aarch64_step() | | |
aarch64.c:1875 | aarch64_hit_watchpoint() | | target_addr_t exception_address; |
aarch64.c:2408 | aarch64_read_cpu_memory() | | |
aarch64.c:2428 | aarch64_read_cpu_memory() | | target_addr_t alignedAddr = address & ~3; |
aarch64.c:2514 | aarch64_read_phys_memory() | | |
aarch64.c:2529 | aarch64_read_memory() | | |
aarch64.c:2550 | aarch64_write_phys_memory() | | |
aarch64.c:2566 | aarch64_write_memory() | | |
aarch64.c:2887 | aarch64_virt2phys() | | |
aarch64.c:2888 | aarch64_virt2phys() | | |
aarch64.c:3019 | aarch64_handle_disassemble_command() | | target_addr_t address; |
aarch64.h:35 | aarch64_brp::value | aarch64_brp | |
algorithm.h:21 | mem_param::address | mem_param | |
arc.c:1274 | arc_resume() | | |
arc.c:2087 | arc_step() | | |
arc_mem.c:155 | arc_mem_write() | | |
arc_mem.c:218 | arc_mem_read_block() | | |
arc_mem.c:237 | arc_mem_read() | | |
arc_mem.h:15 | arc_mem_read()::address | arc_mem_read() | |
arc_mem.h:17 | arc_mem_write()::address | arc_mem_write() | |
arm.h:312 | armv4_5_run_algorithm()::entry_point | armv4_5_run_algorithm() | |
arm.h:323 | arm_checksum_memory()::address | arm_checksum_memory() | |
arm11.c:34 | arm11_step()::address | arm11_step() | |
arm11.c:440 | arm11_resume() | | |
arm11.c:548 | arm11_step() | | |
arm11.c:878 | arm11_read_memory() | | |
arm11.c:1034 | arm11_write_memory() | | |
arm720t.c:253 | arm720_virt2phys() | | |
arm720t.c:268 | arm720t_read_memory() | | |
arm720t.c:291 | arm720t_read_phys_memory() | | |
arm720t.c:299 | arm720t_write_phys_memory() | | |
arm7_9_common.c:1701 | arm7_9_resume() | | |
arm7_9_common.c:1903 | arm7_9_step() | | |
arm7_9_common.c:2103 | arm7_9_read_memory() | | |
arm7_9_common.c:2273 | arm7_9_write_memory() | | |
arm7_9_common.c:2487 | arm7_9_write_memory_opt() | | |
arm7_9_common.c:2587 | arm7_9_bulk_write_memory() | | |
arm7_9_common.h:115 | arm7_9_common::write_memory::address | | |
arm7_9_common.h:121 | arm7_9_common::bulk_write_memory::address | | |
arm7_9_common.h:148 | arm7_9_resume()::address | arm7_9_resume() | |
arm7_9_common.h:150 | arm7_9_step()::address | arm7_9_step() | |
arm7_9_common.h:152 | arm7_9_read_memory()::address | arm7_9_read_memory() | |
arm7_9_common.h:154 | arm7_9_write_memory()::address | arm7_9_write_memory() | |
arm7_9_common.h:156 | arm7_9_write_memory_opt()::address | arm7_9_write_memory_opt() | |
arm7_9_common.h:160 | arm7_9_bulk_write_memory()::address | arm7_9_bulk_write_memory() | |
arm920t.c:545 | arm920_virt2phys() | | target_addr_t virt, target_addr_t *phys) |
arm920t.c:560 | arm920t_read_memory() | | |
arm920t.c:572 | arm920t_read_phys_memory() | | |
arm920t.c:582 | arm920t_write_phys_memory() | | |
arm920t.c:592 | arm920t_write_memory() | | |
arm920t.h:48 | arm920t_read_memory()::address | arm920t_read_memory() | |
arm920t.h:50 | arm920t_write_memory()::address | arm920t_write_memory() | |
arm926ejs.c:586 | arm926ejs_write_memory() | | |
arm926ejs.c:615 | arm926ejs_write_memory() | | target_addr_t pa; |
arm926ejs.c:647 | arm926ejs_write_phys_memory() | | |
arm926ejs.c:657 | arm926ejs_read_phys_memory() | | |
arm926ejs.c:738 | arm926ejs_virt2phys() | | |
arm926ejs.h:40 | arm926ejs_write_memory()::address | arm926ejs_write_memory() | |
arm946e.c:501 | arm946e_write_memory() | | |
arm946e.c:549 | arm946e_read_memory() | | |
arm_adi_v5.c:83 | max_tar_block_size() | | |
arm_adi_v5.c:110 | mem_ap_setup_tar() | | |
arm_adi_v5.c:130 | mem_ap_read_tar() | | |
arm_adi_v5.c:150 | mem_ap_read_tar() | | *tar = (((target_addr_t)upper) << 32) | (target_addr_t)lower; |
arm_adi_v5.c:214 | mem_ap_setup_transfer() | | |
arm_adi_v5.c:237 | mem_ap_read_u32() | | |
arm_adi_v5.c:266 | mem_ap_read_atomic_u32() | | |
arm_adi_v5.c:289 | mem_ap_write_u32() | | |
arm_adi_v5.c:318 | mem_ap_write_atomic_u32() | | |
arm_adi_v5.c:346 | mem_ap_setup_transfer_verify_size_packing() | | |
arm_adi_v5.c:446 | mem_ap_setup_transfer_verify_size_packing_fallback() | | |
arm_adi_v5.c:475 | mem_ap_write() | | |
arm_adi_v5.c:493 | mem_ap_write() | | target_addr_t ti_be_addr_xor = 0; |
arm_adi_v5.c:494 | mem_ap_write() | | target_addr_t ti_be_lane_xor = 0; |
arm_adi_v5.c:581 | mem_ap_write() | | target_addr_t tar; |
arm_adi_v5.c:605 | mem_ap_read() | | |
arm_adi_v5.c:609 | mem_ap_read() | | target_addr_t address = adr; |
arm_adi_v5.c:678 | mem_ap_read() | | target_addr_t tar; |
arm_adi_v5.c:690 | mem_ap_read() | | |
arm_adi_v5.c:723 | mem_ap_read_buf() | | |
arm_adi_v5.c:729 | mem_ap_write_buf() | | |
arm_adi_v5.c:735 | mem_ap_read_buf_noincr() | | |
arm_adi_v5.c:741 | mem_ap_write_buf_noincr() | | |
arm_adi_v5.c:1231 | dap_get_debugbase() | | |
arm_adi_v5.c:1261 | dap_get_debugbase() | | *dbgbase = (((target_addr_t)baseptr_upper) << 32) | baseptr_lower; |
arm_adi_v5.c:1306 | cs_component_vals::component_base | cs_component_vals | |
arm_adi_v5.c:1348 | rtp_read_cs_regs() | | |
arm_adi_v5.c:1851 | rtp_cs_component()::dbgbase | rtp_cs_component() | |
arm_adi_v5.c:1854 | rtp_rom_loop() | | |
arm_adi_v5.c:1867 | rtp_rom_loop() | | target_addr_t component_base; |
arm_adi_v5.c:1932 | rtp_cs_component() | | |
arm_adi_v5.c:1993 | rtp_ap() | | target_addr_t dbgbase, invalid_entry; |
arm_adi_v5.c:2061 | dap_info_mem_ap_header() | | |
arm_adi_v5.c:2064 | dap_info_mem_ap_header() | | target_addr_t invalid_entry; |
arm_adi_v5.c:2287 | dap_lookup_cs_component() | | target_addr_t *addr, int32_t core_id) |
arm_adi_v5.c:2557 | dap_baseaddr_command() | | target_addr_t baseaddr; |
arm_adi_v5.c:2606 | dap_baseaddr_command() | | baseaddr = (((target_addr_t)baseaddr_upper) << 32) | baseaddr_lower; |
arm_adi_v5.c:2830 | dap_apreg_command() | | |
arm_adi_v5.h:300 | adiv5_ap::tar_value | adiv5_ap | |
arm_adi_v5.h:705 | mem_ap_read_u32()::address | mem_ap_read_u32() | |
arm_adi_v5.h:707 | mem_ap_write_u32()::address | mem_ap_write_u32() | |
arm_adi_v5.h:711 | mem_ap_read_atomic_u32()::address | mem_ap_read_atomic_u32() | |
arm_adi_v5.h:713 | mem_ap_write_atomic_u32()::address | mem_ap_write_atomic_u32() | |
arm_adi_v5.h:717 | mem_ap_read_buf()::address | mem_ap_read_buf() | |
arm_adi_v5.h:719 | mem_ap_write_buf()::address | mem_ap_write_buf() | |
arm_adi_v5.h:723 | mem_ap_read_buf_noincr()::address | mem_ap_read_buf_noincr() | |
arm_adi_v5.h:725 | mem_ap_write_buf_noincr()::address | mem_ap_write_buf_noincr() | |
arm_adi_v5.h:736 | adiv6_dap_read_baseptr()::baseptr | adiv6_dap_read_baseptr() | |
arm_adi_v5.h:763 | dap_lookup_cs_component()::addr | dap_lookup_cs_component() | |
arm_dpm.h:147 | arm_dpm::wp_addr | arm_dpm | |
arm_tpiu_swo.c:574 | wrap_write_u32() | | |
arm_tpiu_swo.c:583 | wrap_read_u32() | | |
armv4_5.c:1579 | armv4_5_run_algorithm() | | |
armv4_5.c:1580 | armv4_5_run_algorithm() | | |
armv4_5.c:1601 | arm_checksum_memory() | | |
armv4_5_mmu.h:17 | armv4_5_mmu_common::read_memory::address | | int (*read_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer); |
armv4_5_mmu.h:18 | armv4_5_mmu_common::write_memory::address | | |
armv7a.h:81 | armv7a_mmu_common::read_physical_memory::address | | |
armv7a.h:95 | armv7a_common::debug_base | armv7a_common | |
armv7a_cache_l2x.c:61 | armv7a_l2x_cache_flush_virt() | | |
armv7a_cache_l2x.c:76 | armv7a_l2x_cache_flush_virt() | | target_addr_t pa, offs = virt + i; |
armv7a_cache_l2x.c:96 | armv7a_l2x_cache_inval_virt() | | |
armv7a_cache_l2x.c:111 | armv7a_l2x_cache_inval_virt() | | target_addr_t pa, offs = virt + i; |
armv7a_cache_l2x.c:131 | armv7a_l2x_cache_clean_virt() | | |
armv7a_cache_l2x.c:146 | armv7a_l2x_cache_clean_virt() | | target_addr_t pa, offs = virt + i; |
armv7a_cache_l2x.c:240 | arm7a_l2x_cache_flush_virt_cmd() | | target_addr_t virt; |
armv7a_cache_l2x.c:259 | arm7a_l2x_cache_inval_virt_cmd() | | target_addr_t virt; |
armv7a_cache_l2x.c:278 | arm7a_l2x_cache_clean_virt_cmd() | | target_addr_t virt; |
armv7a_cache_l2x.h:143 | armv7a_l2x_cache_flush_virt()::virt | armv7a_l2x_cache_flush_virt() | |
armv7a_mmu.c:28 | armv7a_mmu_translate_va_pa() | | |
armv7a_mmu.c:63 | armv7a_mmu_translate_va_pa() | | *val |= (target_addr_t)(value & 0x00ff0000) << 16; |
armv7a_mmu.c:193 | armv7a_mmu_dump_table() | | target_addr_t ttb; |
armv7a_mmu.c:292 | armv7a_mmu_dump_table() | | target_addr_t second_lvl_ptbl = first_lvl_descriptor & 0xfffffc00; |
armv7a_mmu.h:12 | armv7a_mmu_translate_va_pa()::val | armv7a_mmu_translate_va_pa() | |
armv7m.c:486 | armv7m_run_algorithm() | | |
armv7m.c:511 | armv7m_start_algorithm() | | |
armv7m.c:625 | armv7m_wait_algorithm() | | |
armv7m.c:883 | armv7m_checksum_memory() | | |
armv7m.h:318 | armv7m_run_algorithm()::entry_point | armv7m_run_algorithm() | |
armv7m.h:324 | armv7m_start_algorithm()::entry_point | armv7m_start_algorithm() | |
armv7m.h:330 | armv7m_wait_algorithm()::exit_point | armv7m_wait_algorithm() | |
armv7m.h:343 | armv7m_checksum_memory()::address | armv7m_checksum_memory() | |
armv8.c:1025 | armv8_mmu_translate_va() | | |
armv8.c:1106 | armv8_mmu_translate_va_pa() | | |
armv8.c:1107 | armv8_mmu_translate_va_pa() | | |
armv8.h:178 | armv8_mmu_common::read_physical_memory::address | | |
armv8.h:192 | armv8_common::debug_base | armv8_common | |
armv8.h:297 | armv8_mmu_translate_va_pa()::va | armv8_mmu_translate_va_pa() | |
armv8.h:298 | armv8_mmu_translate_va_pa()::val | armv8_mmu_translate_va_pa() | |
armv8.h:299 | armv8_mmu_translate_va()::va | armv8_mmu_translate_va() | |
armv8_cache.c:104 | armv8_cache_d_inner_flush_virt() | | |
armv8_cache.c:109 | armv8_cache_d_inner_flush_virt() | | target_addr_t va_line, va_end; |
armv8_cache.c:143 | armv8_cache_i_inner_inval_virt() | | |
armv8_cache.c:148 | armv8_cache_i_inner_inval_virt() | | target_addr_t va_line, va_end; |
armv8_cache.h:12 | armv8_cache_d_inner_flush_virt()::va | armv8_cache_d_inner_flush_virt() | |
armv8_cache.h:13 | armv8_cache_i_inner_inval_virt()::va | armv8_cache_i_inner_inval_virt() | |
avr32_ap7k.c:304 | avr32_ap7k_resume() | | |
avr32_ap7k.c:386 | avr32_ap7k_step() | | |
avr32_ap7k.c:423 | avr32_ap7k_read_memory() | | |
avr32_ap7k.c:463 | avr32_ap7k_write_memory() | | |
avrt.c:25 | avr_resume()::address | avr_resume() | |
avrt.c:27 | avr_step()::address | avr_step() | |
avrt.c:108 | avr_resume() | | |
avrt.c:115 | avr_step() | | |
breakpoints.c:40 | breakpoint_add_internal() | | |
breakpoints.c:152 | hybrid_breakpoint_add_internal() | | |
breakpoints.c:209 | breakpoint_add() | | |
breakpoints.c:256 | hybrid_breakpoint_add() | | |
breakpoints.c:308 | breakpoint_remove_internal() | | |
breakpoints.c:344 | breakpoint_remove() | | |
breakpoints.c:489 | breakpoint_find() | | |
breakpoints.c:502 | watchpoint_add_internal() | | |
breakpoints.c:568 | watchpoint_add() | | |
breakpoints.c:588 | watchpoint_remove_internal() | | |
breakpoints.c:605 | watchpoint_remove() | | |
breakpoints.c:663 | watchpoint_hit() | | |
breakpoints.h:27 | breakpoint::address | breakpoint | |
breakpoints.h:42 | watchpoint::address | watchpoint | |
breakpoints.h:55 | breakpoint_add()::address | breakpoint_add() | |
breakpoints.h:59 | hybrid_breakpoint_add()::address | hybrid_breakpoint_add() | |
breakpoints.h:61 | breakpoint_remove()::address | breakpoint_remove() | |
breakpoints.h:64 | breakpoint_find()::address | breakpoint_find() | |
breakpoints.h:74 | watchpoint_add()::address | watchpoint_add() | |
breakpoints.h:76 | watchpoint_remove()::address | watchpoint_remove() | |
breakpoints.h:81 | watchpoint_hit()::address | watchpoint_hit() | |
cfi.c:119 | cfi_target_write_memory() | | |
cfi.c:131 | cfi_target_read_memory() | | |
cfi.h:67 | cfi_flash_bank::write_mem::addr | | |
cfi.h:69 | cfi_flash_bank::read_mem::addr | | |
cfi.h:162 | cfi_target_read_memory()::addr | cfi_target_read_memory() | |
command.c:1326 | parse_target_addr() | | |
command.h:429 | parse_target_addr()::ul | parse_target_addr() | |
core.c:301 | get_flash_bank_by_addr() | | |
core.c:449 | flash_iterate_address_range_inner() | | |
core.c:456 | flash_iterate_address_range_inner() | | |
core.c:502 | flash_iterate_address_range_inner() | | |
core.c:503 | flash_iterate_address_range_inner() | | target_addr_t sector_last_addr = sector_addr + f->size - 1; |
core.c:579 | flash_iterate_address_range() | | |
core.c:614 | flash_erase_address_range() | | |
core.c:626 | flash_unlock_address_range() | | |
core.c:654 | flash_write_align_start() | | |
core.c:678 | flash_write_align_end() | | |
core.c:702 | flash_write_check_gap() | | |
core.c:724 | flash_write_check_gap() | | |
core.c:725 | flash_write_check_gap() | | |
core.c:780 | flash_write_unlock_verify() | | target_addr_t run_address = sections[section]->base_address + section_offset; |
core.c:822 | flash_write_unlock_verify() | | target_addr_t run_next_addr = run_address + run_size; |
core.c:823 | flash_write_unlock_verify() | | target_addr_t next_section_base = sections[section_last + 1]->base_address; |
core.c:865 | flash_write_unlock_verify() | | |
core.c:878 | flash_write_unlock_verify() | | target_addr_t run_end = run_address + run_size - 1; |
core.c:879 | flash_write_unlock_verify() | | |
core.h:84 | flash_bank::base | flash_bank | |
core.h:142 | flash_erase_address_range()::addr | flash_erase_address_range() | |
core.h:144 | flash_unlock_address_range()::addr | flash_unlock_address_range() | |
core.h:153 | flash_write_align_start() | | |
core.h:161 | flash_write_align_end() | | |
core.h:282 | get_flash_bank_by_addr()::addr | get_flash_bank_by_addr() | |
cortex_a.c:74 | cortex_a_virt2phys()::virt | cortex_a_virt2phys() | target_addr_t virt, target_addr_t *phys); |
cortex_a.c:822 | cortex_a_internal_restore() | | |
cortex_a.c:973 | cortex_a_restore_smp() | | target_addr_t address; |
cortex_a.c:988 | cortex_a_resume() | | |
cortex_a.c:1171 | cortex_a_step() | | |
cortex_a.c:2712 | cortex_a_read_phys_memory() | | |
cortex_a.c:2731 | cortex_a_read_memory() | | |
cortex_a.c:2748 | cortex_a_write_phys_memory() | | |
cortex_a.c:2767 | cortex_a_write_memory() | | |
cortex_a.c:2782 | cortex_a_read_buffer() | | |
cortex_a.c:2816 | cortex_a_write_buffer() | | |
cortex_a.c:3222 | cortex_a_virt2phys() | | target_addr_t virt, target_addr_t *phys) |
cortex_m.c:1304 | cortex_m_restore_one() | | |
cortex_m.c:1423 | cortex_m_restore_smp() | | target_addr_t address; |
cortex_m.c:1450 | cortex_m_resume() | | |
cortex_m.c:1478 | cortex_m_step() | | |
cortex_m.c:2392 | cortex_m_read_memory() | | |
cortex_m.c:2406 | cortex_m_write_memory() | | |
dsp563xx.c:1119 | dsp563xx_resume() | | |
dsp563xx.c:1292 | dsp563xx_step() | | |
dsp563xx.c:1376 | dsp563xx_run_algorithm() | | |
dsp563xx.c:1599 | dsp563xx_read_memory() | | |
dsp563xx.c:1667 | dsp563xx_read_memory_default() | | |
dsp563xx.c:1678 | dsp563xx_read_buffer_default() | | |
dsp563xx.c:1689 | dsp563xx_write_memory_core() | | |
dsp563xx.c:1773 | dsp563xx_write_memory() | | |
dsp563xx.c:1841 | dsp563xx_write_memory_default() | | |
dsp563xx.c:1851 | dsp563xx_write_buffer_default() | | |
dsp5680xx.c:997 | dsp5680xx_resume() | | |
dsp5680xx.c:1154 | dsp5680xx_read() | | |
dsp5680xx.c:1409 | dsp5680xx_write() | | |
dsp5680xx.c:1448 | dsp5680xx_write_buffer() | | |
dsp5680xx.c:1465 | dsp5680xx_read_buffer() | | |
dsp5680xx.c:1485 | dsp5680xx_checksum_memory() | | |
dsp5680xx.c:2237 | dsp5680xx_step() | | |
efm32.c:88 | efm32x_get_bank_index() | | |
efm32.c:228 | efm32x_read_reg_u32() | | |
efm32.c:237 | efm32x_write_reg_u32() | | |
eneispif.c:42 | eneispif_flash_bank::ctrl_base | eneispif_flash_bank | |
eneispif.c:74 | eneispif_read_reg() | | |
eneispif.c:90 | eneispif_write_reg() | | |
esirisc.c:355 | esirisc_read_memory() | | |
esirisc.c:404 | esirisc_write_memory() | | |
esirisc.c:451 | esirisc_checksum_memory() | | |
esirisc.c:850 | esirisc_resume_or_step() | | |
esirisc.c:921 | esirisc_resume() | | |
esirisc.c:930 | esirisc_step() | | |
esirisc.c:1169 | esirisc_reset_entry() | | (target_addr_t)epc); |
esirisc_trace.c:319 | esirisc_trace_read_memory() | | |
esirisc_trace.c:561 | esirisc_trace_analyze_memory() | | |
esirisc_trace.c:638 | esirisc_trace_dump_memory() | | |
esirisc_trace.c:789 | handle_esirisc_trace_analyze_command() | | target_addr_t address; |
esirisc_trace.c:827 | handle_esirisc_trace_dump_command() | | target_addr_t address; |
esirisc_trace.h:62 | esirisc_trace::buffer_start | esirisc_trace | |
esirisc_trace.h:63 | esirisc_trace::buffer_end | esirisc_trace | |
esp32.c:269 | esp32_virt2phys() | | |
esp32s2.c:116 | esp32s2_set_peri_reg_mask() | | |
esp32s2.c:373 | esp32s2_step() | | |
esp32s2.c:417 | esp32s2_virt2phys() | | |
esp32s3.c:288 | esp32s3_virt2phys() | | |
esp_algorithm.c:402 | esp_algorithm_load_func_image() | | |
esp_algorithm.c:529 | esp_algorithm_load_onboard_func() | | |
esp_algorithm.h:141 | esp_algorithm_stub::entry | esp_algorithm_stub | |
esp_algorithm.h:151 | esp_algorithm_stub::tramp_addr | esp_algorithm_stub | |
esp_algorithm.h:155 | esp_algorithm_stub::tramp_mapped_addr | esp_algorithm_stub | |
esp_algorithm.h:159 | esp_algorithm_stub::stack_addr | esp_algorithm_stub | |
esp_algorithm.h:161 | esp_algorithm_stub::log_buff_addr | esp_algorithm_stub | |
esp_algorithm.h:276 | esp_algorithm_run_data::::::code_buf_addr | esp_algorithm_run_data:::: | |
esp_algorithm.h:280 | esp_algorithm_run_data::::::min_stack_addr | esp_algorithm_run_data:::: | |
esp_algorithm.h:342 | esp_algorithm_load_onboard_func()::func_addr | esp_algorithm_load_onboard_func() | |
esp_algorithm.h:363 | esp_algorithm_run_onboard_func_va() | | |
esp_algorithm.h:378 | esp_algorithm_run_onboard_func() | | |
esp_xtensa_smp.c:362 | esp_xtensa_smp_resume() | | |
esp_xtensa_smp.c:424 | esp_xtensa_smp_step() | | |
esp_xtensa_smp.h:31 | esp_xtensa_smp_resume()::address | esp_xtensa_smp_resume() | |
esp_xtensa_smp.h:36 | esp_xtensa_smp_step()::address | esp_xtensa_smp_step() | |
feroceon.c:452 | feroceon_bulk_write_memory() | | |
fespi.c:115 | fespi_flash_bank::ctrl_base | fespi_flash_bank | |
fespi.c:160 | fespi_read_reg() | | |
fespi.c:174 | fespi_write_reg() | | |
gdb_server.c:803 | gdb_signal_reply() | | target_addr_t hit_wp_address; |
gdb_server.c:1925 | extend_address_for_gdb() | | |
gdb_server.c:1971 | gdb_memory_map() | | target_addr_t ram_start = 0; |
gdb_server.c:2010 | gdb_memory_map() | | |
gdb_server.c:2035 | gdb_memory_map() | | target_addr_t start; |
gdb_server.c:2884 | gdb_query_packet() | | target_addr_t addr = 0; |
gdb_server.c:3340 | gdb_v_packet() | | target_addr_t addr; |
gdb_server.c:3401 | gdb_v_packet() | | target_addr_t addr; |
hla_target.c:438 | adapter_resume() | | |
hla_target.c:529 | adapter_step() | | |
hla_target.c:592 | adapter_read_memory() | | |
hla_target.c:607 | adapter_write_memory() | | |
hwthread.c:27 | hwthread_read_buffer()::address | hwthread_read_buffer() | |
hwthread.c:29 | hwthread_write_buffer()::address | hwthread_write_buffer() | |
hwthread.c:417 | hwthread_read_buffer() | | |
hwthread.c:432 | hwthread_write_buffer() | | |
image.c:655 | image_elf32_read_section() | | |
image.c:698 | image_elf64_read_section() | | |
image.c:741 | image_elf_read_section() | | |
image.c:1081 | image_read_section() | | |
image.c:1174 | image_add_section() | | |
image.h:42 | imagesection::base_address | imagesection | |
image.h:95 | image_read_section()::offset | image_read_section() | |
image.h:99 | image_add_section()::base | image_add_section() | |
lakemont.c:991 | lakemont_resume() | | |
lakemont.c:1033 | lakemont_step() | | |
lakemont.h:87 | lakemont_resume()::address | lakemont_resume() | |
lakemont.h:90 | lakemont_step()::address | lakemont_step() | |
linux.c:98 | linux_compute_virt2phys() | | |
linux.c:102 | linux_compute_virt2phys() | | target_addr_t pa = 0; |
ls1_sap.c:58 | ls1_sap_resume() | | |
ls1_sap.c:65 | ls1_sap_step() | | |
ls1_sap.c:172 | ls1_sap_read_memory() | | |
ls1_sap.c:193 | ls1_sap_write_memory() | | |
mem_ap.c:106 | mem_ap_resume() | | |
mem_ap.c:115 | mem_ap_step() | | |
mem_ap.c:236 | mem_ap_read_memory() | | |
mem_ap.c:250 | mem_ap_write_memory() | | |
mips32.c:563 | mips32_run_and_wait() | | |
mips32.c:564 | mips32_run_and_wait() | | |
mips32.c:597 | mips32_run_algorithm() | | |
mips32.c:598 | mips32_run_algorithm() | | |
mips32.c:1198 | mips32_checksum_memory() | | |
mips32.h:908 | mips32_run_algorithm()::entry_point | mips32_run_algorithm() | |
mips32.h:926 | mips32_checksum_memory()::address | mips32_checksum_memory() | |
mips64.c:461 | mips64_run_algorithm() | | |
mips64.c:462 | mips64_run_algorithm() | | |
mips64.h:215 | mips64_run_algorithm()::entry_point | mips64_run_algorithm() | |
mips_m4k.c:34 | mips_m4k_internal_restore()::address | mips_m4k_internal_restore() | |
mips_m4k.c:37 | mips_m4k_bulk_write_memory()::address | mips_m4k_bulk_write_memory() | |
mips_m4k.c:39 | mips_m4k_bulk_read_memory()::address | mips_m4k_bulk_read_memory() | |
mips_m4k.c:425 | mips_m4k_internal_restore() | | |
mips_m4k.c:498 | mips_m4k_resume() | | |
mips_m4k.c:525 | mips_m4k_step() | | |
mips_m4k.c:1007 | mips_m4k_read_memory() | | |
mips_m4k.c:1072 | mips_m4k_write_memory() | | |
mips_m4k.c:1196 | mips_m4k_bulk_write_memory() | | |
mips_m4k.c:1262 | mips_m4k_bulk_read_memory() | | |
mips_m4k.h:35 | mips_m4k_isa_filter() | | |
mips_m4k.h:38 | mips_m4k_isa_filter() | | |
mips_mips64.c:944 | mips_mips64_bulk_write_memory() | | |
nuttx.c:51 | tcbinfo::xcpreg_off | tcbinfo | |
nuttx.c:182 | target_buffer_get_addr() | | |
or1k.c:889 | or1k_resume() | | |
or1k.c:899 | or1k_step() | | |
or1k.c:1020 | or1k_read_memory() | | |
or1k.c:1047 | or1k_write_memory() | | |
or1k.c:1197 | or1k_checksum_memory() | | |
qn908x.c:236 | qn908x_update_reg() | | |
renesas_rpchf.c:263 | rpc_hf_xfer() | | |
renesas_rpchf.c:381 | rpchf_target_write_memory() | | |
renesas_rpchf.c:396 | rpchf_target_read_memory() | | |
riscv-011.c:1442 | step() | | |
riscv-011.c:1933 | riscv011_resume() | | |
riscv-011.c:1987 | read_memory() | | |
riscv-011.c:2157 | write_memory() | | |
riscv-013.c:64 | read_memory()::address | read_memory() | |
riscv-013.c:66 | write_memory()::address | write_memory() | |
riscv-013.c:2076 | sb_write_address() | | |
riscv-013.c:2478 | log_memory_access() | | |
riscv-013.c:2507 | read_memory_bus_word() | | |
riscv-013.c:2524 | sb_read_address() | | |
riscv-013.c:2528 | sb_read_address() | | target_addr_t address = 0; |
riscv-013.c:2588 | read_memory_bus_v0() | | |
riscv-013.c:2677 | read_memory_bus_v1() | | |
riscv-013.c:2686 | read_memory_bus_v1() | | target_addr_t next_address = address; |
riscv-013.c:2687 | read_memory_bus_v1() | | |
riscv-013.c:2716 | read_memory_bus_v1() | | target_addr_t next_read = address - 1; |
riscv-013.c:2846 | mem_should_skip_progbuf() | | |
riscv-013.c:2885 | mem_should_skip_sysbus() | | |
riscv-013.c:2914 | mem_should_skip_abstract() | | |
riscv-013.c:2948 | read_memory_abstract() | | |
riscv-013.c:3027 | write_memory_abstract() | | |
riscv-013.c:3105 | read_memory_progbuf_inner() | | |
riscv-013.c:3341 | read_memory_progbuf_one() | | |
riscv-013.c:3416 | read_memory_progbuf() | | |
riscv-013.c:3499 | read_memory_progbuf() | | |
riscv-013.c:3532 | read_memory() | | |
riscv-013.c:3596 | write_memory_bus_v0() | | |
riscv-013.c:3649 | write_memory_bus_v1() | | |
riscv-013.c:3657 | write_memory_bus_v1() | | target_addr_t next_address = address; |
riscv-013.c:3658 | write_memory_bus_v1() | | |
riscv-013.c:3770 | write_memory_bus_v1() | | |
riscv-013.c:3789 | write_memory_progbuf() | | |
riscv-013.c:3981 | write_memory() | | |
riscv.c:751 | write_by_given_size() | | |
riscv.c:778 | read_by_given_size() | | |
riscv.c:805 | riscv_write_by_any_size() | | |
riscv.c:837 | riscv_read_by_any_size() | | |
riscv.c:1108 | old_or_new_riscv_step() | | |
riscv.c:1399 | resume_prep() | | |
riscv.c:1438 | resume_go() | | |
riscv.c:1469 | riscv_resume() | | |
riscv.c:1518 | riscv_target_resume() | | |
riscv.c:1571 | riscv_address_translate() | | |
riscv.c:1577 | riscv_address_translate() | | target_addr_t table_address; |
riscv.c:1611 | riscv_address_translate() | | target_addr_t mask = ((target_addr_t)1 << (xlen - (info->va_bits - 1))) - 1; |
riscv.c:1612 | riscv_address_translate() | | |
riscv.c:1625 | riscv_address_translate() | | target_addr_t pte_address = table_address + |
riscv.c:1661 | riscv_address_translate() | | |
riscv.c:1666 | riscv_address_translate() | | |
riscv.c:1677 | riscv_virt2phys() | | |
riscv.c:1691 | riscv_read_phys_memory() | | |
riscv.c:1700 | riscv_read_memory() | | |
riscv.c:1711 | riscv_read_memory() | | target_addr_t physical_addr; |
riscv.c:1719 | riscv_write_phys_memory() | | |
riscv.c:1728 | riscv_write_memory() | | |
riscv.c:1739 | riscv_write_memory() | | target_addr_t physical_addr; |
riscv.c:1832 | riscv_run_algorithm() | | |
riscv.c:1833 | riscv_run_algorithm() | | |
riscv.c:1992 | riscv_checksum_memory() | | |
riscv.c:2304 | riscv_openocd_step() | | |
riscv.h:79 | riscv_sample_config_t::::address | riscv_sample_config_t:: | |
riscv.h:182 | riscv_info::read_memory::address | | |
riscv.h:298 | riscv_openocd_step()::address | riscv_openocd_step() | |
riscv.h:364 | riscv_read_by_any_size()::address | riscv_read_by_any_size() | |
riscv.h:365 | riscv_write_by_any_size()::address | riscv_write_by_any_size() | |
rp2040.c:104 | rp2040_call_rom_func() | | |
rp2040.c:330 | rp2040_ssel_active() | | const target_addr_t qspi_ctrl_addr = 0x4001800c; |
rp2040.c:352 | rp2040_spi_read_flash_id() | | const target_addr_t ssi_dr0 = 0x18000060; |
rtos.c:638 | rtos_generic_stack_read() | | target_addr_t new_stack_ptr; |
rtos.c:713 | rtos_read_buffer() | | |
rtos.c:721 | rtos_write_buffer() | | |
rtos.h:77 | rtos_type::read_buffer::address | | int (*read_buffer)(struct rtos *rtos, target_addr_t address, uint32_t size, |
rtos.h:79 | rtos_type::write_buffer::address | | |
rtos.h:101 | rtos_register_stacking::calculate_process_stack | rtos_register_stacking | |
rtos.h:104 | rtos_register_stacking::calculate_process_stack::stack_ptr | | target_addr_t stack_ptr); |
rtos.h:135 | rtos_read_buffer()::address | rtos_read_buffer() | |
rtos.h:137 | rtos_write_buffer()::address | rtos_write_buffer() | |
rtos_riot_stackings.c:20 | rtos_riot_cortex_m_stack_align() | | |
rtos_riot_stackings.c:22 | rtos_riot_cortex_m_stack_align() | | |
rtos_standard_stackings.c:106 | rtos_generic_stack_align() | | |
rtos_standard_stackings.c:108 | rtos_generic_stack_align() | | |
rtos_standard_stackings.c:110 | rtos_generic_stack_align() | | target_addr_t new_stack_ptr; |
rtos_standard_stackings.c:111 | rtos_generic_stack_align() | | target_addr_t aligned_stack_ptr; |
rtos_standard_stackings.c:114 | rtos_generic_stack_align() | | aligned_stack_ptr = new_stack_ptr & ~((target_addr_t)align - 1); |
rtos_standard_stackings.c:121 | rtos_generic_stack_align() | | aligned_stack_ptr += (target_addr_t)align; |
rtos_standard_stackings.c:126 | rtos_generic_stack_align8() | | |
rtos_standard_stackings.c:128 | rtos_generic_stack_align8() | | |
rtos_standard_stackings.c:153 | rtos_cortex_m_stack_align() | | |
rtos_standard_stackings.c:155 | rtos_cortex_m_stack_align() | | |
rtos_standard_stackings.c:159 | rtos_cortex_m_stack_align() | | target_addr_t new_stack_ptr; |
rtos_standard_stackings.c:172 | rtos_standard_cortex_m3_stack_align() | | |
rtos_standard_stackings.c:174 | rtos_standard_cortex_m3_stack_align() | | |
rtos_standard_stackings.c:181 | rtos_standard_cortex_m4f_stack_align() | | |
rtos_standard_stackings.c:183 | rtos_standard_cortex_m4f_stack_align() | | |
rtos_standard_stackings.c:190 | rtos_standard_cortex_m4f_fpu_stack_align() | | |
rtos_standard_stackings.c:192 | rtos_standard_cortex_m4f_fpu_stack_align() | | |
rtos_standard_stackings.h:17 | rtos_generic_stack_align8() | | |
rtos_standard_stackings.h:19 | rtos_generic_stack_align8()::stack_ptr | rtos_generic_stack_align8() | |
rtos_standard_stackings.h:20 | rtos_cortex_m_stack_align() | | |
rtos_standard_stackings.h:22 | rtos_cortex_m_stack_align()::stack_ptr | rtos_cortex_m_stack_align() | |
rtt.c:28 | ::addr | | |
rtt.c:88 | rtt_setup() | | |
rtt.c:127 | rtt_start() | | |
rtt.c:27 | read_rtt_channel() | | target_addr_t address; |
rtt.c:61 | read_channel_name() | | |
rtt.c:221 | target_rtt_read_control_block() | | |
rtt.c:242 | target_rtt_find_control_block() | | |
rtt.c:245 | target_rtt_find_control_block() | | |
rtt.c:255 | target_rtt_find_control_block() | | for (target_addr_t addr = *address; addr < address_end; addr += sizeof(buf)) { |
rtt.h:33 | rtt_control::address | rtt_control | |
rtt.h:45 | rtt_channel::address | rtt_channel | |
rtt.h:99 | rtt_source_find_ctrl_block::address | | target_addr_t *address, size_t size, const char *id, bool *found, |
rtt.h:102 | rtt_source_read_ctrl_block::address | | |
rtt.h:163 | rtt_setup()::address | rtt_setup() | |
rtt.h:20 | target_rtt_find_control_block()::address | target_rtt_find_control_block() | |
rtt.h:23 | target_rtt_read_control_block()::address | target_rtt_read_control_block() | |
stm8.c:736 | stm8_write_memory() | | |
stm8.c:770 | stm8_read_memory() | | |
stm8.c:986 | stm8_resume() | | |
stm8.c:1296 | stm8_step() | | |
stm8.c:1778 | stm8_checksum_memory() | | |
stm8.c:1821 | stm8_run_algorithm() | | |
stm8.c:1822 | stm8_run_algorithm() | | |
target.c:55 | target_read_buffer_default()::address | target_read_buffer_default() | |
target.c:57 | target_write_buffer_default()::address | target_write_buffer_default() | |
target.c:556 | target_resume() | | |
target.c:637 | identity_virt2phys() | | |
target.c:776 | target_run_algorithm() | | |
target.c:817 | target_start_algorithm() | | |
target.c:861 | target_wait_algorithm() | | |
target.c:1245 | target_read_memory() | | |
target.c:1259 | target_read_phys_memory() | | |
target.c:1273 | target_write_memory() | | |
target.c:1287 | target_write_phys_memory() | | |
target.c:1418 | target_step() | | |
target.c:1454 | target_address_max() | | |
target.c:1457 | target_address_max() | | if (sizeof(target_addr_t) * 8 == bits) |
target.c:1458 | target_address_max() | | return (target_addr_t) -1; |
target.c:1460 | target_address_max() | | return (((target_addr_t) 1) << bits) - 1; |
target.c:2352 | target_write_buffer() | | |
target.c:2377 | target_write_buffer_default() | | |
target.c:2417 | target_read_buffer() | | |
target.c:2441 | target_read_buffer_default() | | |
target.c:2477 | target_checksum_memory() | | |
target.c:2536 | target_read_u64() | | |
target.c:2560 | target_read_u32() | | |
target.c:2584 | target_read_u16() | | |
target.c:2608 | target_read_u8() | | |
target.c:2630 | target_write_u64() | | |
target.c:2651 | target_write_u32() | | |
target.c:2672 | target_write_u16() | | |
target.c:2693 | target_write_u8() | | |
target.c:2711 | target_write_phys_u64() | | |
target.c:2732 | target_write_phys_u32() | | |
target.c:2753 | target_write_phys_u16() | | |
target.c:2774 | target_write_phys_u8() | | |
target.c:3325 | handle_resume_command() | | target_addr_t addr = 0; |
target.c:3344 | handle_step_command() | | target_addr_t addr = 0; |
target.c:3357 | target_handle_md_output() | | |
target.c:3445 | handle_md_command() | | target_addr_t address, uint32_t size_value, uint32_t count, uint8_t *buffer); |
target.c:3455 | handle_md_command() | | target_addr_t address; |
target.c:3483 | target_write_fn::address | | target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer); |
target.c:3486 | target_fill_mem() | | |
target.c:3561 | handle_mw_command() | | target_addr_t address; |
target.c:3687 | parse_load_image_command() | | |
target.c:3695 | parse_load_image_command() | | target_addr_t addr; |
target.c:3723 | handle_load_image_command() | | target_addr_t min_address = 0; |
target.c:3724 | handle_load_image_command() | | target_addr_t max_address = -1; |
target.c:3807 | handle_dump_image_command() | | target_addr_t address, size; |
target.c:3895 | handle_verify_image_command_internal() | | target_addr_t addr; |
target.c:4060 | handle_bp_command_set() | | |
target.c:4096 | handle_bp_command() | | target_addr_t addr; |
target.c:4155 | handle_rbp_command() | | target_addr_t addr; |
target.c:4191 | handle_wp_command() | | target_addr_t addr = 0; |
target.c:4257 | handle_rwp_command() | | target_addr_t addr; |
target.c:4280 | handle_virt2phys_command() | | target_addr_t va; |
target.c:4282 | handle_virt2phys_command() | | target_addr_t pa; |
target.c:4523 | handle_target_read_memory() | | target_addr_t addr; |
target.c:4656 | target_jim_write_memory() | | target_addr_t addr = (target_addr_t)wide_addr; |
target.c:6222 | fast_load::address | fast_load | |
target.c:6246 | handle_fast_load_image_command() | | target_addr_t min_address = 0; |
target.c:6247 | handle_fast_load_image_command() | | target_addr_t max_address = -1; |
target.h:86 | working_area::address | working_area | |
target.h:145 | target::working_area | target | |
target.h:148 | target::working_area_virt | target | |
target.h:150 | target::working_area_phys | target | |
target.h:347 | target_memory_check_block::address | target_memory_check_block | |
target.h:395 | target_resume()::address | target_resume() | |
target.h:545 | target_step()::address | target_step() | |
target.h:554 | target_run_algorithm()::entry_point | target_run_algorithm() | |
target.h:565 | target_start_algorithm()::entry_point | target_start_algorithm() | |
target.h:576 | target_wait_algorithm()::exit_point | target_wait_algorithm() | |
target.h:610 | target_read_memory()::address | target_read_memory() | |
target.h:612 | target_read_phys_memory()::address | target_read_phys_memory() | |
target.h:631 | target_write_memory()::address | target_write_memory() | |
target.h:633 | target_write_phys_memory()::address | target_write_phys_memory() | |
target.h:660 | target_write_buffer()::address | target_write_buffer() | |
target.h:662 | target_read_buffer()::address | target_read_buffer() | |
target.h:664 | target_checksum_memory()::address | target_checksum_memory() | |
target.h:687 | target_address_max() | | |
target.h:767 | target_read_u64()::address | target_read_u64() | |
target.h:768 | target_read_u32()::address | target_read_u32() | |
target.h:769 | target_read_u16()::address | target_read_u16() | |
target.h:770 | target_read_u8()::address | target_read_u8() | |
target.h:771 | target_write_u64()::address | target_write_u64() | |
target.h:772 | target_write_u32()::address | target_write_u32() | |
target.h:773 | target_write_u16()::address | target_write_u16() | |
target.h:774 | target_write_u8()::address | target_write_u8() | |
target.h:776 | target_write_phys_u64()::address | target_write_phys_u64() | |
target.h:777 | target_write_phys_u32()::address | target_write_phys_u32() | |
target.h:778 | target_write_phys_u16()::address | target_write_phys_u16() | |
target.h:779 | target_write_phys_u8()::address | target_write_phys_u8() | |
target.h:787 | target_handle_md_output()::address | target_handle_md_output() | |
target_type.h:45 | target_type::resume::address | | int (*resume)(struct target *target, int current, target_addr_t address, |
target_type.h:47 | target_type::step::address | | int (*step)(struct target *target, int current, target_addr_t address, |
target_type.h:118 | target_type::read_memory::address | | |
target_type.h:124 | target_type::write_memory::address | | |
target_type.h:128 | target_type::read_buffer::address | | |
target_type.h:132 | target_type::write_buffer::address | | |
target_type.h:135 | target_type::checksum_memory::address | | |
target_type.h:183 | target_type::run_algorithm::entry_point | | struct reg_param *reg_param, target_addr_t entry_point, |
target_type.h:184 | target_type::run_algorithm::exit_point | | target_addr_t exit_point, unsigned int timeout_ms, void *arch_info); |
target_type.h:187 | target_type::start_algorithm::entry_point | | struct reg_param *reg_param, target_addr_t entry_point, |
target_type.h:188 | target_type::start_algorithm::exit_point | | target_addr_t exit_point, void *arch_info); |
target_type.h:191 | target_type::wait_algorithm::exit_point | | struct reg_param *reg_param, target_addr_t exit_point, |
target_type.h:252 | target_type::virt2phys::address | | int (*virt2phys)(struct target *target, target_addr_t address, target_addr_t *physical); |
target_type.h:262 | target_type::read_phys_memory::phys_address | | |
target_type.h:268 | target_type::write_phys_memory::phys_address | | |
tcl.c:230 | handle_flash_erase_address_command() | | target_addr_t address; |
tcl.c:517 | handle_flash_fill_command() | | target_addr_t address; |
tcl.c:568 | handle_flash_fill_command() | | |
tcl.c:569 | handle_flash_fill_command() | | target_addr_t end_addr = address + size_bytes - 1; |
tcl.c:570 | handle_flash_fill_command() | | |
tcl.c:677 | handle_flash_md_command() | | target_addr_t address; |
tcl.c:782 | handle_flash_write_bank_command() | | target_addr_t start_addr = bank->base + offset; |
tcl.c:783 | handle_flash_write_bank_command() | | |
tcl.c:784 | handle_flash_write_bank_command() | | target_addr_t end_addr = start_addr + length - 1; |
tcl.c:785 | handle_flash_write_bank_command() | | |
tcl.c:39 | handle_rtt_setup_command() | | target_addr_t address; |
x86_32_common.c:40 | calcaddr_physfromlin()::addr | calcaddr_physfromlin() | |
x86_32_common.c:41 | calcaddr_physfromlin()::physaddr | calcaddr_physfromlin() | |
x86_32_common.c:105 | x86_32_common_virt2phys() | | |
x86_32_common.c:135 | x86_32_common_read_phys_mem() | | |
x86_32_common.c:219 | x86_32_common_write_phys_mem() | | |
x86_32_common.c:444 | calcaddr_physfromlin() | | |
x86_32_common.c:568 | x86_32_common_read_memory() | | |
x86_32_common.c:591 | x86_32_common_read_memory() | | target_addr_t physaddr = 0; |
x86_32_common.c:625 | x86_32_common_write_memory() | | |
x86_32_common.c:647 | x86_32_common_write_memory() | | target_addr_t physaddr = 0; |
x86_32_common.c:1021 | set_swbp() | | target_addr_t physaddr; |
x86_32_common.c:1077 | unset_swbp() | | target_addr_t physaddr; |
x86_32_common.h:303 | x86_32_common_virt2phys()::address | x86_32_common_virt2phys() | |
x86_32_common.h:304 | x86_32_common_read_phys_mem()::phys_address | x86_32_common_read_phys_mem() | |
x86_32_common.h:306 | x86_32_common_write_phys_mem()::phys_address | x86_32_common_write_phys_mem() | |
x86_32_common.h:308 | x86_32_common_read_memory()::addr | x86_32_common_read_memory() | |
x86_32_common.h:310 | x86_32_common_write_memory()::addr | x86_32_common_write_memory() | |
xscale.c:51 | xscale_resume()::address | xscale_resume() | |
xscale.c:1110 | xscale_resume() | | |
xscale.c:1376 | xscale_step() | | |
xscale.c:1770 | xscale_read_memory() | | |
xscale.c:1856 | xscale_read_phys_memory() | | |
xscale.c:1871 | xscale_write_memory() | | |
xscale.c:1955 | xscale_write_phys_memory() | | |
xscale.c:3110 | xscale_virt2phys() | | |
xtensa.c:376 | xtensa_memory_region_find() | | |
xtensa.c:393 | xtensa_target_memory_region_find() | | |
xtensa.c:408 | xtensa_is_cacheable() | | |
xtensa.c:415 | xtensa_is_icacheable() | | |
xtensa.c:423 | xtensa_is_dcacheable() | | |
xtensa.c:552 | xtensa_region_ar_exec() | | |
xtensa.c:563 | xtensa_region_ar_exec() | | |
xtensa.c:1595 | xtensa_prepare_resume() | | |
xtensa.c:1675 | xtensa_resume() | | |
xtensa.c:1702 | xtensa_pc_in_winexc() | | |
xtensa.c:1722 | xtensa_do_step() | | |
xtensa.c:1934 | xtensa_step() | | |
xtensa.c:1947 | xtensa_memory_regions_overlap() | | |
xtensa.c:1948 | xtensa_memory_regions_overlap() | | |
xtensa.c:1949 | xtensa_memory_regions_overlap() | | |
xtensa.c:1950 | xtensa_memory_regions_overlap() | | |
xtensa.c:1962 | xtensa_get_overlap_size() | | |
xtensa.c:1963 | xtensa_get_overlap_size() | | |
xtensa.c:1964 | xtensa_get_overlap_size() | | |
xtensa.c:1965 | xtensa_get_overlap_size() | | |
xtensa.c:1968 | xtensa_get_overlap_size() | | |
xtensa.c:1969 | xtensa_get_overlap_size() | | |
xtensa.c:1978 | xtensa_memory_op_validate_range() | | |
xtensa.c:1980 | xtensa_memory_op_validate_range() | | |
xtensa.c:1981 | xtensa_memory_op_validate_range() | | |
xtensa.c:1982 | xtensa_memory_op_validate_range() | | target_addr_t overlap_size; |
xtensa.c:1998 | xtensa_read_memory() | | |
xtensa.c:2003 | xtensa_read_memory() | | |
xtensa.c:2004 | xtensa_read_memory() | | |
xtensa.c:2005 | xtensa_read_memory() | | target_addr_t adr = addrstart_al; |
xtensa.c:2022 | xtensa_read_memory()::_mask | xtensa_read_memory() | unsigned int alloc_bytes = ALIGN_UP(addrend_al - addrstart_al, sizeof(uint32_t)); |
xtensa.c:2081 | xtensa_read_buffer() | | |
xtensa.c:2088 | xtensa_write_memory() | | |
xtensa.c:2098 | xtensa_write_memory() | | |
xtensa.c:2099 | xtensa_write_memory() | | |
xtensa.c:2100 | xtensa_write_memory() | | target_addr_t adr = addrstart_al; |
xtensa.c:2292 | xtensa_write_buffer() | | |
xtensa.c:2298 | xtensa_checksum_memory() | | |
xtensa.c:2438 | xtensa_update_instruction() | | |
xtensa.c:2715 | xtensa_start_algorithm() | | |
xtensa.c:2806 | xtensa_wait_algorithm() | | |
xtensa.c:2914 | xtensa_run_algorithm() | | |
xtensa.h:119 | xtensa_local_mem_region_config::base | xtensa_local_mem_region_config | |
xtensa.h:381 | xtensa_resume()::address | xtensa_resume() | |
xtensa.h:386 | xtensa_prepare_resume()::address | xtensa_prepare_resume() | |
xtensa.h:390 | xtensa_step()::address | xtensa_step() | |
xtensa.h:391 | xtensa_do_step()::address | xtensa_do_step() | |
xtensa.h:393 | xtensa_read_memory()::address | xtensa_read_memory() | |
xtensa.h:394 | xtensa_read_buffer()::address | xtensa_read_buffer() | |
xtensa.h:396 | xtensa_write_memory()::address | xtensa_write_memory() | |
xtensa.h:400 | xtensa_write_buffer()::address | xtensa_write_buffer() | |
xtensa.h:401 | xtensa_checksum_memory()::address | xtensa_checksum_memory() | |
xtensa.h:412 | xtensa_start_algorithm()::entry_point | xtensa_start_algorithm() | |
xtensa.h:417 | xtensa_wait_algorithm()::exit_point | xtensa_wait_algorithm() | |
xtensa.h:422 | xtensa_run_algorithm()::entry_point | xtensa_run_algorithm() | |
xtensa_chip.c:64 | xtensa_chip_virt2phys() | | |
zephyr.c:72 | zephyr_params::get_cpu_state::addr | | |
zephyr.c:192 | zephyr_cortex_m_stack_align() | | |
zephyr.c:194 | zephyr_cortex_m_stack_align() | | |
zephyr.c:226 | zephyr_get_arc_state() | | |
zephyr.c:297 | zephyr_get_arm_state() | | |
zephyr.c:751 | zephyr_get_thread_reg_list() | | target_addr_t addr; |