riscv_semihosting() is only used within OpenOCD.
 
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riscv_semihosting() function

Check for and process a semihosting request using the ARM protocol). This is meant to be called when the target is stopped due to a debug mode entry.

Syntax

enum semihosting_result riscv_semihosting(struct target *target,     int *retval);
Implemented in riscv_semihosting.c:56

Arguments

target

Pointer to the target to process.

retval

Pointer to a location where the return code will be stored

Return value

non-zero value if a request was processed or an error encountered

References

LocationReferrerText
riscv_semihosting.c:56
enum semihosting_result riscv_semihosting(struct target *target, int *retval)
riscv.h:359
enum semihosting_result riscv_semihosting(struct target *target, int *retval);
riscv-011.c:1875handle_halt()
if (riscv_semihosting(target, &retval) != 0)
riscv.c:2213riscv_openocd_poll()
switch (riscv_semihosting(t, &retval)) {
riscv.c:2284riscv_openocd_poll()
switch (riscv_semihosting(target, &retval)) {

Call Tree

Functions calling riscv_semihosting()
Functions called by riscv_semihosting()
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riscv_semihosting()
Data read by riscv_semihosting()
Data written by riscv_semihosting()
riscv_semihosting()::semihosting
riscv_semihosting()::pc
riscv_semihosting()::result
riscv_semihosting()::tmp_buf
riscv_semihosting()::i
riscv_semihosting()::pre
riscv_semihosting()::ebreak
riscv_semihosting()::post
riscv_semihosting()::r0
riscv_semihosting()::r1
all items filtered out
riscv_semihosting()
riscv_semihosting()::result
riscv_semihosting()::i
all items filtered out
Type of riscv_semihosting()
riscv_semihosting()
uint8_t
uint32_t
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