armv4_5_mmu_common::mmu_enabled - syntax, references, description

References

Location	Referrer	Text
armv4_5_mmu.h:24		int mmu_enabled;
arm720t.c:201	arm720t_post_debug_entry()	arm720t->armv4_5_mmu.mmu_enabled = (arm720t->cp15_control_reg & 0x1U) ? 1 : 0;
arm720t.c:235	arm720t_arch_state()	state[arm720t->armv4_5_mmu.mmu_enabled],
arm720t.c:248	arm720_mmu()	*enabled = target_to_arm720(target)->armv4_5_mmu.mmu_enabled;
arm720t.c:357	arm720t_soft_reset_halt()	arm720t->armv4_5_mmu.mmu_enabled = 0;
arm720t.c:410	arm720t_init_arch_info()	arm720t->armv4_5_mmu.mmu_enabled = 0;
arm920t.c:428	arm920t_post_debug_entry()	arm920t->armv4_5_mmu.mmu_enabled =
arm920t.c:526	arm920t_arch_state()	state[arm920t->armv4_5_mmu.mmu_enabled],
arm920t.c:540	arm920_mmu()	*enabled = target_to_arm920(target)->armv4_5_mmu.mmu_enabled;
arm920t.c:606	arm920t_write_memory()	if (arm920t->armv4_5_mmu.mmu_enabled && (count == 1) &&
arm920t.c:781	arm920t_soft_reset_halt()	arm920t->armv4_5_mmu.mmu_enabled = 0;
arm920t.c:822	arm920t_init_arch_info()	arm920t->armv4_5_mmu.mmu_enabled = 0;
arm926ejs.c:443	arm926ejs_post_debug_entry()	arm926ejs->armv4_5_mmu.mmu_enabled = (arm926ejs->cp15_control_reg & 0x1U) ? 1 : 0;
arm926ejs.c:519	arm926ejs_arch_state()	state[arm926ejs->armv4_5_mmu.mmu_enabled],
arm926ejs.c:578	arm926ejs_soft_reset_halt()	arm926ejs->armv4_5_mmu.mmu_enabled = 0;
arm926ejs.c:600	arm926ejs_write_memory()	if (arm926ejs->armv4_5_mmu.mmu_enabled && (count == 1) && ((size == 2) \|\| (size == 4))) {
arm926ejs.c:692	arm926ejs_init_arch_info()	arm926ejs->armv4_5_mmu.mmu_enabled = 0;
arm926ejs.c:760	arm926ejs_mmu()	*enabled = arm926ejs->armv4_5_mmu.mmu_enabled;
armv4_5_mmu.c:125	armv4_5_mmu_read_physical()	retval = armv4_5_mmu->enable_mmu_caches(target, armv4_5_mmu->mmu_enabled,
armv4_5_mmu.c:155	armv4_5_mmu_write_physical()	retval = armv4_5_mmu->enable_mmu_caches(target, armv4_5_mmu->mmu_enabled,
fa526.c:318	fa526_init_arch_info()	arm920t->armv4_5_mmu.mmu_enabled = 0;
xscale.c:792	xscale_arch_state()	state[xscale->armv4_5_mmu.mmu_enabled],
xscale.c:985	xscale_debug_entry()	xscale->armv4_5_mmu.mmu_enabled = (xscale->cp15_control_reg & 0x1U) ? 1 : 0;
xscale.c:1862	xscale_read_phys_memory()	if (!xscale->armv4_5_mmu.mmu_enabled)
xscale.c:1961	xscale_write_phys_memory()	if (!xscale->armv4_5_mmu.mmu_enabled)
xscale.c:3010	xscale_init_arch_info()	xscale->armv4_5_mmu.mmu_enabled = 0;
xscale.c:3137	xscale_mmu()	*enabled = xscale->armv4_5_mmu.mmu_enabled;
xscale.c:3163	xscale_handle_mmu_command()	xscale->armv4_5_mmu.mmu_enabled = enable;
xscale.c:3167	xscale_handle_mmu_command()	(xscale->armv4_5_mmu.mmu_enabled) ? "enabled" : "disabled");