OpenOCD
arm920t_common::armv4_5_mmu is only used within OpenOCD.
 
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CodeScopeDevelopment ToolsOpenOCDarm920t_common::armv4_5_mmu

arm920t_common::armv4_5_mmu field

Syntax

struct armv4_5_mmu_common armv4_5_mmu;

References

LocationReferrerText
arm920t.h:20
struct armv4_5_mmu_common armv4_5_mmu;
arm920t.c:414arm920t_post_debug_entry()
if (arm920t->armv4_5_mmu.armv4_5_cache.ctype == -1) {
arm920t.c:425arm920t_post_debug_entry()
&arm920t->armv4_5_mmu.armv4_5_cache);
arm920t.c:428arm920t_post_debug_entry()
arm920t->armv4_5_mmu.mmu_enabled =
arm920t.c:430arm920t_post_debug_entry()
arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled =
arm920t.c:432arm920t_post_debug_entry()
arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled =
arm920t.c:526arm920t_arch_state()
state[arm920t->armv4_5_mmu.mmu_enabled],
arm920t.c:527arm920t_arch_state()
state[arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
arm920t.c:528arm920t_arch_state()
state[arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
arm920t.c:540arm920_mmu()
*enabled = target_to_arm920(target)->armv4_5_mmu.mmu_enabled;
arm920t.c:552arm920_virt2phys()
&arm920t->armv4_5_mmu, virt, &cb, &ret);
arm920t.c:577arm920t_read_phys_memory()
return armv4_5_mmu_read_physical(target, &arm920t->armv4_5_mmu,
arm920t.c:587arm920t_write_phys_memory()
return armv4_5_mmu_write_physical(target, &arm920t->armv4_5_mmu,
arm920t.c:606arm920t_write_memory()
if (arm920t->armv4_5_mmu.mmu_enabled && (count == 1) &&
arm920t.c:619arm920t_write_memory()
retval = armv4_5_mmu_translate_va(target, &arm920t->armv4_5_mmu,
arm920t.c:624arm920t_write_memory()
if (arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled) {
arm920t.c:660arm920t_write_memory()
&arm920t->armv4_5_mmu,
arm920t.c:689arm920t_write_memory()
&arm920t->armv4_5_mmu, pa, size,
arm920t.c:703arm920t_write_memory()
if (arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled) {
arm920t.c:781arm920t_soft_reset_halt()
arm920t->armv4_5_mmu.mmu_enabled = 0;
arm920t.c:782arm920t_soft_reset_halt()
arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled = 0;
arm920t.c:783arm920t_soft_reset_halt()
arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled = 0;
arm920t.c:815arm920t_init_arch_info()
arm920t->armv4_5_mmu.armv4_5_cache.ctype = -1;
arm920t.c:816arm920t_init_arch_info()
arm920t->armv4_5_mmu.get_ttb = arm920t_get_ttb;
arm920t.c:817arm920t_init_arch_info()
arm920t->armv4_5_mmu.read_memory = arm7_9_read_memory;
arm920t.c:818arm920t_init_arch_info()
arm920t->armv4_5_mmu.write_memory = arm7_9_write_memory;
arm920t.c:819arm920t_init_arch_info()
arm920t->armv4_5_mmu.disable_mmu_caches = arm920t_disable_mmu_caches;
arm920t.c:820arm920t_init_arch_info()
arm920t->armv4_5_mmu.enable_mmu_caches = arm920t_enable_mmu_caches;
arm920t.c:821arm920t_init_arch_info()
arm920t->armv4_5_mmu.has_tiny_pages = 1;
arm920t.c:822arm920t_init_arch_info()
arm920t->armv4_5_mmu.mmu_enabled = 0;
arm920t.c:906arm920t_handle_read_cache_command()
segment < arm920t->armv4_5_mmu.armv4_5_cache.d_u_size.nsets;
arm920t.c:1007arm920t_handle_read_cache_command()
segment < arm920t->armv4_5_mmu.armv4_5_cache.d_u_size.nsets;
arm920t.c:1514arm920t_handle_cache_info_command()
&arm920t->armv4_5_mmu.armv4_5_cache);
fa526.c:311fa526_init_arch_info()
arm920t->armv4_5_mmu.armv4_5_cache.ctype = -1;
fa526.c:312fa526_init_arch_info()
arm920t->armv4_5_mmu.get_ttb = arm920t_get_ttb;
fa526.c:313fa526_init_arch_info()
arm920t->armv4_5_mmu.read_memory = arm7_9_read_memory;
fa526.c:314fa526_init_arch_info()
arm920t->armv4_5_mmu.write_memory = arm7_9_write_memory;
fa526.c:315fa526_init_arch_info()
arm920t->armv4_5_mmu.disable_mmu_caches = arm920t_disable_mmu_caches;
fa526.c:316fa526_init_arch_info()
arm920t->armv4_5_mmu.enable_mmu_caches = arm920t_enable_mmu_caches;
fa526.c:317fa526_init_arch_info()
arm920t->armv4_5_mmu.has_tiny_pages = 1;
fa526.c:318fa526_init_arch_info()
arm920t->armv4_5_mmu.mmu_enabled = 0;

Data Use

Type of arm920t_common::armv4_5_mmu
arm920t_common::armv4_5_mmu
all items filtered out