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arm926ejs_common::armv4_5_mmu
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arm926ejs_common::armv4_5_mmu
arm926ejs_common::armv4_5_mmu field
Syntax
from
arm926ejs.h:20
struct
armv4_5_mmu_common
armv4_5_mmu
;
References
Location
Referrer
Text
arm926ejs.h:20
struct
armv4_5_mmu_common
armv4_5_mmu
;
arm926ejs.c:431
arm926ejs_post_debug_entry()
if
(
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
ctype
==
-
1
)
{
arm926ejs.c:440
arm926ejs_post_debug_entry()
armv4_5_identify_cache
(
cache_type_reg
,
&
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
)
;
arm926ejs.c:443
arm926ejs_post_debug_entry()
arm926ejs
->
armv4_5_mmu
.
mmu_enabled
=
(
arm926ejs
->
cp15_control_reg
&
0x1U
)
?
1
:
0
;
arm926ejs.c:444
arm926ejs_post_debug_entry()
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
d_u_cache_enabled
=
(
arm926ejs
->
cp15_control_reg
&
0x4U
)
?
1
:
0
;
arm926ejs.c:445
arm926ejs_post_debug_entry()
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
i_cache_enabled
=
(
arm926ejs
->
cp15_control_reg
&
0x1000U
)
?
1
:
0
;
arm926ejs.c:519
arm926ejs_arch_state()
state
[
arm926ejs
->
armv4_5_mmu
.
mmu_enabled
]
,
arm926ejs.c:520
arm926ejs_arch_state()
state
[
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
d_u_cache_enabled
]
,
arm926ejs.c:521
arm926ejs_arch_state()
state
[
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
i_cache_enabled
]
)
;
arm926ejs.c:578
arm926ejs_soft_reset_halt()
arm926ejs
->
armv4_5_mmu
.
mmu_enabled
=
0
;
arm926ejs.c:579
arm926ejs_soft_reset_halt()
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
d_u_cache_enabled
=
0
;
arm926ejs.c:580
arm926ejs_soft_reset_halt()
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
i_cache_enabled
=
0
;
arm926ejs.c:600
arm926ejs_write_memory()
if
(
arm926ejs
->
armv4_5_mmu
.
mmu_enabled
&&
(
count
==
1
)
&&
(
(
size
==
2
)
||
(
size
==
4
)
)
)
{
arm926ejs.c:604
arm926ejs_write_memory()
if
(
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
d_u_cache_enabled
)
{
arm926ejs.c:621
arm926ejs_write_memory()
retval
=
armv4_5_mmu_write_physical
(
target
,
&
arm926ejs
->
armv4_5_mmu
,
pa
,
size
,
count
,
buffer
)
;
arm926ejs.c:633
arm926ejs_write_memory()
if
(
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
i_cache_enabled
)
{
arm926ejs.c:652
arm926ejs_write_phys_memory()
return
armv4_5_mmu_write_physical
(
target
,
&
arm926ejs
->
armv4_5_mmu
,
arm926ejs.c:662
arm926ejs_read_phys_memory()
return
armv4_5_mmu_read_physical
(
target
,
&
arm926ejs
->
armv4_5_mmu
,
arm926ejs.c:685
arm926ejs_init_arch_info()
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
.
ctype
=
-
1
;
arm926ejs.c:686
arm926ejs_init_arch_info()
arm926ejs
->
armv4_5_mmu
.
get_ttb
=
arm926ejs_get_ttb
;
arm926ejs.c:687
arm926ejs_init_arch_info()
arm926ejs
->
armv4_5_mmu
.
read_memory
=
arm7_9_read_memory
;
arm926ejs.c:688
arm926ejs_init_arch_info()
arm926ejs
->
armv4_5_mmu
.
write_memory
=
arm7_9_write_memory
;
arm926ejs.c:689
arm926ejs_init_arch_info()
arm926ejs
->
armv4_5_mmu
.
disable_mmu_caches
=
arm926ejs_disable_mmu_caches
;
arm926ejs.c:690
arm926ejs_init_arch_info()
arm926ejs
->
armv4_5_mmu
.
enable_mmu_caches
=
arm926ejs_enable_mmu_caches
;
arm926ejs.c:691
arm926ejs_init_arch_info()
arm926ejs
->
armv4_5_mmu
.
has_tiny_pages
=
1
;
arm926ejs.c:692
arm926ejs_init_arch_info()
arm926ejs
->
armv4_5_mmu
.
mmu_enabled
=
0
;
arm926ejs.c:735
arm926ejs_handle_cache_info_command()
return
armv4_5_handle_cache_info_command
(
CMD
,
&
arm926ejs
->
armv4_5_mmu
.
armv4_5_cache
)
;
arm926ejs.c:744
arm926ejs_virt2phys()
int
retval
=
armv4_5_mmu_translate_va
(
target
,
&
arm926ejs
->
armv4_5_mmu
,
arm926ejs.c:760
arm926ejs_mmu()
*
enabled
=
arm926ejs
->
armv4_5_mmu
.
mmu_enabled
;
Data Use
Functions reading
arm926ejs_common::armv4_5_mmu
arm926ejs_common::armv4_5_mmu
arm926ejs_post_debug_entry()
arm926ejs_arch_state()
arm926ejs_soft_reset_halt()
arm926ejs_write_memory()
arm926ejs_init_arch_info()
arm926ejs_handle_cache_info_command()
arm926ejs_mmu()
all items filtered out
Type of
arm926ejs_common::armv4_5_mmu
arm926ejs_common::armv4_5_mmu
armv4_5_mmu_common
all items filtered out