arm_state is only used within OpenOCD.
 
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arm_state enum

The PSR "T" and "J" bits define the mode of "classic ARM" cores.

Syntax

enum arm_state {     ARM_STATE_ARM,     ARM_STATE_THUMB,     ARM_STATE_JAZELLE,     ARM_STATE_THUMB_EE,     ARM_STATE_AARCH64, };

Values

ARM_STATE_ARM

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ARM_STATE_THUMB

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ARM_STATE_JAZELLE

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ARM_STATE_THUMB_EE

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ARM_STATE_AARCH64

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Type Use

Variables of arm_state type
arm_sim_interface::set_state::mode
arm_set_cpsr()::state
armv4_5_run_algorithm_inner()::core_state
armv8_set_cpsr()::state
armv8_dpm_modeswitch()::core_state
armv8_dpm_handle_exception()::core_state
feroceon_bulk_write_memory()::core_state
aarch64_debug_entry()::core_state
all items filtered out
arm_state
Allocators of arm_state
Deletors of arm_state
arm_set_cpsr()::state
armv4_5_run_algorithm_inner()::core_state
armv8_set_cpsr()::state
armv8_dpm_modeswitch()::core_state
armv8_dpm_handle_exception()::core_state
feroceon_bulk_write_memory()::core_state
aarch64_debug_entry()::core_state
all items filtered out
arm_state
arm_set_cpsr()::state
armv4_5_run_algorithm_inner()::core_state
armv8_set_cpsr()::state
armv8_dpm_modeswitch()::core_state
armv8_dpm_handle_exception()::core_state
feroceon_bulk_write_memory()::core_state
aarch64_debug_entry()::core_state
all items filtered out