arm::core_mode is only used within OpenOCD.
 
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arm::core_mode field

Record the current core mode: SVC, USR, or some other mode.

Syntax

enum arm_mode core_mode;

References

LocationReferrerText
arm.h:196
enum arm_mode core_mode;
aarch64.c:72aarch64_restore_system_control_reg()
switch (armv8->arm.core_mode) {
aarch64.c:102aarch64_restore_system_control_reg()
armv8_mode_name(armv8->arm.core_mode), armv8->arm.core_mode);
aarch64.c:155aarch64_mmu_modify()
switch (armv8->arm.core_mode) {
aarch64.c:184aarch64_mmu_modify()
LOG_DEBUG("unknown cpu state 0x%x", armv8->arm.core_mode);
aarch64.c:1036aarch64_post_debug_entry()
switch (armv8->arm.core_mode) {
aarch64.c:1066aarch64_post_debug_entry()
armv8_mode_name(armv8->arm.core_mode), armv8->arm.core_mode);
arm7_9_common.c:1308arm7_9_debug_entry()
if (!is_arm_mode(arm->core_mode)) {
arm7_9_common.c:1315arm7_9_debug_entry()
arm_mode_name(arm->core_mode));
arm7_9_common.c:1398arm7_9_full_context()
if (!is_arm_mode(arm->core_mode)) {
arm7_9_common.c:1502arm7_9_restore_context()
enum arm_mode current_mode = arm->core_mode;
arm7_9_common.c:1517arm7_9_restore_context()
if (!is_arm_mode(arm->core_mode)) {
arm7_9_common.c:1527arm7_9_restore_context()
arm_mode_name(arm->core_mode));
arm7_9_common.c:1543arm7_9_restore_context()
&& (arm->core_mode == ARM_MODE_SYS))
arm7_9_common.c:1545arm7_9_restore_context()
&& (arm->core_mode == ARM_MODE_USR))) {
arm7_9_common.c:1583arm7_9_restore_context()
arm_mode_name(arm->core_mode),
arm7_9_common.c:1605arm7_9_restore_context()
if (!arm->cpsr->dirty && (arm->core_mode != current_mode)) {
arm7_9_common.c:1999arm7_9_read_core_reg()
if (!is_arm_mode(arm->core_mode))
arm7_9_common.c:2004arm7_9_read_core_reg()
if ((mode != ARM_MODE_ANY) && (mode != arm->core_mode)
arm7_9_common.c:2036arm7_9_read_core_reg()
if ((mode != ARM_MODE_ANY) && (mode != arm->core_mode)
arm7_9_common.c:2054arm7_9_write_core_reg()
if (!is_arm_mode(arm->core_mode))
arm7_9_common.c:2059arm7_9_write_core_reg()
if ((mode != ARM_MODE_ANY) && (mode != arm->core_mode)
arm7_9_common.c:2092arm7_9_write_core_reg()
if ((mode != ARM_MODE_ANY) && (mode != arm->core_mode)
arm7_9_common.c:2239arm7_9_read_memory()
if (!is_arm_mode(arm->core_mode))
arm7_9_common.c:2254arm7_9_read_memory()
if (((cpsr & 0x1f) == ARM_MODE_ABT) && (arm->core_mode != ARM_MODE_ABT)) {
arm7_9_common.c:2453arm7_9_write_memory()
if (!is_arm_mode(arm->core_mode))
arm7_9_common.c:2468arm7_9_write_memory()
if (((cpsr & 0x1f) == ARM_MODE_ABT) && (arm->core_mode != ARM_MODE_ABT)) {
arm920t.c:270arm920t_read_cp15_interpreted()
if (!is_arm_mode(arm->core_mode)) {
arm920t.c:314arm920t_write_cp15_interpreted()
if (!is_arm_mode(arm->core_mode)) {
arm920t.c:1110arm920t_handle_read_cache_command()
if (!is_arm_mode(arm->core_mode)) {
arm920t.c:1422arm920t_handle_read_mmu_command()
if (!is_arm_mode(arm->core_mode)) {
arm_dpm.c:572arm_dpm_write_dirty_registers()
if (arm->core_mode == ARM_MODE_FIQ
arm_dpm.c:650dpm_mapmode()
enum arm_mode amode = arm->core_mode;
arm_semihosting.c:102post_result()
arm->core_mode = spsr & 0x1f;
arm_semihosting.c:190arm_semihosting()
if (arm->core_mode != ARM_MODE_SVC)
arm_simulator.c:656armv4_5_get_reg_mode()
arm->core_mode, reg).value, 0, 32);
arm_simulator.c:664armv4_5_set_reg_mode()
arm->core_mode, reg).value, 0, 32, value);
arm_simulator.c:692armv4_5_get_mode()
return arm->core_mode;
armv4_5.c:453arm_set_cpsr()
arm->core_mode = mode;
armv4_5.c:618armv4_5_set_core_reg()
if (armv4_5_target->core_mode !=
armv4_5.c:799arm_arch_state()
arm_mode_name(arm->core_mode),
armv4_5.c:830handle_armv4_5_reg_command()
if (!is_arm_mode(arm->core_mode)) {
armv4_5.c:1279arm_get_gdb_reg_list()
if (!is_arm_mode(arm->core_mode)) {
armv4_5.c:1418armv4_5_run_algorithm_inner()
if (!is_arm_mode(arm->core_mode)) {
armv7a.c:558armv7a_arch_state()
if (arm->core_mode == ARM_MODE_ABT)
armv7m.c:226armv7m_get_core_reg()
retval = arm->read_core_reg(target, reg, reg->number, arm->core_mode);
armv7m.c:516armv7m_start_algorithm()
enum arm_mode core_mode = armv7m->arm.core_mode;
armv7m.c:714armv7m_wait_algorithm()
if (armv7m_algorithm_info->core_mode != armv7m->arm.core_mode) {
armv7m.c:722armv7m_wait_algorithm()
armv7m->arm.core_mode = armv7m_algorithm_info->core_mode;
armv7m.c:745armv7m_arch_state()
arm_mode_name(arm->core_mode),
armv8.c:202armv8_read_ttbcr()
switch (armv8_curel_from_core_mode(arm->core_mode)) {
armv8.c:281armv8_read_reg()
unsigned int curel = armv8_curel_from_core_mode(dpm->arm->core_mode);
armv8.c:439armv8_write_reg()
unsigned int curel = armv8_curel_from_core_mode(dpm->arm->core_mode);
armv8.c:893armv8_read_mpidr()
armv8.c:962armv8_set_cpsr()
arm->core_mode = mode;
armv8.c:965armv8_set_cpsr()
armv8_mode_name(arm->core_mode),
armv8.c:1134armv8_mmu_translate_va_pa()
switch (armv8_curel_from_core_mode(arm->core_mode)) {
armv8.c:1321armv8_aarch64_state()
armv8_mode_name(arm->core_mode),
armv8.c:1353armv8_arch_state()
if (arm->core_mode == ARM_MODE_ABT)
armv8.c:1687armv8_get_core_reg()
return arm->read_core_reg(target, reg, armv8_reg->num, arm->core_mode);
armv8.c:1744armv8_get_core_reg32()
retval = arm->read_core_reg(target, reg64, armv8_reg->num, arm->core_mode);
armv8_cache.c:313armv8_identify_cache()
armv8_dpm.c:803armv8_dpm_read_current_registers()
if (r->number == ARMV8_SPSR_EL1 && arm->core_mode == ARM_MODE_SYS)
cortex_a.c:1133cortex_a_post_debug_entry()
cortex_a->curr_mode = armv7a->arm.core_mode;
cortex_m.c:898cortex_m_debug_entry()
arm->core_mode = ARM_MODE_HANDLER;
cortex_m.c:905cortex_m_debug_entry()
arm->core_mode = control & 1
cortex_m.c:924cortex_m_debug_entry()
arm_mode_name(arm->core_mode),
hla_target.c:258adapter_debug_entry()
arm->core_mode = ARM_MODE_HANDLER;
hla_target.c:265adapter_debug_entry()
arm->core_mode = control & 1
hla_target.c:279adapter_debug_entry()
arm_mode_name(arm->core_mode),
xscale.c:881xscale_debug_entry()
if (!is_arm_mode(arm->core_mode)) {
xscale.c:887xscale_debug_entry()
arm_mode_name(arm->core_mode));