LL_RCC_PLLSAI_ConfigDomain_SAI() function
Configure PLLSAI used for SAI domain clock (*) value not defined in all devices.
Arguments
Source
PLLM
PLLN
Between 49/50(*) and 432
PLLQ
PLLDIVQ
Return value
None
Notes
PLL Source and PLLM Divider can be written only when PLL, PLLI2S and PLLSAI(*) are disabled PLLN/PLLQ can be written only when PLLSAI is disabled This can be selected for SAI PLLCFGR PLLM LL_RCC_PLLSAI_ConfigDomain_SAI\n PLLSAICFGR PLLSAIM LL_RCC_PLLSAI_ConfigDomain_SAI\n PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_ConfigDomain_SAI\n PLLSAICFGR PLLSAIQ LL_RCC_PLLSAI_ConfigDomain_SAI\n DCKCFGR PLLSAIDIVQ LL_RCC_PLLSAI_ConfigDomain_SAI
Location | Text |
stm32f4xx_ll_rcc.h:6105 | __STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ, uint32_t PLLDIVQ) |
Data read by LL_RCC_PLLSAI_ConfigDomain_SAI()
LL_RCC_PLLSAI_ConfigDomain_SAI()