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CodeScopeSTM32 Libraries and SamplesHALDSI_HandleTypeDef::Instance

DSI_HandleTypeDef::Instance field

Register base address

Syntax

DSI_TypeDef *Instance;

Examples

DSI_HandleTypeDef::Instance is referenced by 37 libraries and example projects.

References

LocationReferrerText
stm32f4xx_hal_dsi.h:311
DSI_TypeDef *Instance; /*!< Register base address */
stm32f4xx_hal_dsi.c:260DSI_ShortWrite()
while ((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == 0U)
stm32f4xx_hal_dsi.c:271DSI_ShortWrite()
hdsi->Instance->GHCR = (Mode | (ChannelID << 6U) | (Param1 << 8U) | (Param2 << 16U));
stm32f4xx_hal_dsi.c:357HAL_DSI_Init()
__HAL_DSI_REG_ENABLE(hdsi);
stm32f4xx_hal_dsi.c:363HAL_DSI_Init()
while (__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_RRS) == 0U)
stm32f4xx_hal_dsi.c:373HAL_DSI_Init()
hdsi->Instance->WRPCR &= ~(DSI_WRPCR_PLL_NDIV | DSI_WRPCR_PLL_IDF | DSI_WRPCR_PLL_ODF);
stm32f4xx_hal_dsi.c:374HAL_DSI_Init()
hdsi->Instance->WRPCR |= (((PLLInit->PLLNDIV) << DSI_WRPCR_PLL_NDIV_Pos) | \
stm32f4xx_hal_dsi.c:379HAL_DSI_Init()
__HAL_DSI_PLL_ENABLE(hdsi);
stm32f4xx_hal_dsi.c:389HAL_DSI_Init()
while (__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == 0U)
stm32f4xx_hal_dsi.c:401HAL_DSI_Init()
hdsi->Instance->PCTLR |= (DSI_PCTLR_CKE | DSI_PCTLR_DEN);
stm32f4xx_hal_dsi.c:404HAL_DSI_Init()
hdsi->Instance->CLCR &= ~(DSI_CLCR_DPCC | DSI_CLCR_ACR);
stm32f4xx_hal_dsi.c:405HAL_DSI_Init()
hdsi->Instance->CLCR |= (DSI_CLCR_DPCC | hdsi->Init.AutomaticClockLaneControl);
stm32f4xx_hal_dsi.c:408HAL_DSI_Init()
hdsi->Instance->PCONFR &= ~DSI_PCONFR_NL;
stm32f4xx_hal_dsi.c:409HAL_DSI_Init()
hdsi->Instance->PCONFR |= hdsi->Init.NumberOfLanes;
stm32f4xx_hal_dsi.c:414HAL_DSI_Init()
hdsi->Instance->CCR &= ~DSI_CCR_TXECKDIV;
stm32f4xx_hal_dsi.c:415HAL_DSI_Init()
hdsi->Instance->CCR |= hdsi->Init.TXEscapeCkdiv;
stm32f4xx_hal_dsi.c:424HAL_DSI_Init()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_UIX4;
stm32f4xx_hal_dsi.c:425HAL_DSI_Init()
hdsi->Instance->WPCR[0U] |= unitIntervalx4;
stm32f4xx_hal_dsi.c:430HAL_DSI_Init()
hdsi->Instance->IER[0U] = 0U;
stm32f4xx_hal_dsi.c:431HAL_DSI_Init()
hdsi->Instance->IER[1U] = 0U;
stm32f4xx_hal_dsi.c:462HAL_DSI_DeInit()
__HAL_DSI_WRAPPER_DISABLE(hdsi);
stm32f4xx_hal_dsi.c:465HAL_DSI_DeInit()
__HAL_DSI_DISABLE(hdsi);
stm32f4xx_hal_dsi.c:468HAL_DSI_DeInit()
hdsi->Instance->PCTLR &= ~(DSI_PCTLR_CKE | DSI_PCTLR_DEN);
stm32f4xx_hal_dsi.c:471HAL_DSI_DeInit()
__HAL_DSI_PLL_DISABLE(hdsi);
stm32f4xx_hal_dsi.c:474HAL_DSI_DeInit()
__HAL_DSI_REG_DISABLE(hdsi);
stm32f4xx_hal_dsi.c:513HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[0U] = 0U;
stm32f4xx_hal_dsi.c:514HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] = 0U;
stm32f4xx_hal_dsi.c:522HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[0U] |= DSI_ERROR_ACK_MASK;
stm32f4xx_hal_dsi.c:528HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[0U] |= DSI_ERROR_PHY_MASK;
stm32f4xx_hal_dsi.c:534HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] |= DSI_ERROR_TX_MASK;
stm32f4xx_hal_dsi.c:540HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] |= DSI_ERROR_RX_MASK;
stm32f4xx_hal_dsi.c:546HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] |= DSI_ERROR_ECC_MASK;
stm32f4xx_hal_dsi.c:552HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] |= DSI_ERROR_CRC_MASK;
stm32f4xx_hal_dsi.c:558HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] |= DSI_ERROR_PSE_MASK;
stm32f4xx_hal_dsi.c:564HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] |= DSI_ERROR_EOT_MASK;
stm32f4xx_hal_dsi.c:570HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] |= DSI_ERROR_OVF_MASK;
stm32f4xx_hal_dsi.c:576HAL_DSI_ConfigErrorMonitor()
hdsi->Instance->IER[1U] |= DSI_ERROR_GEN_MASK;
stm32f4xx_hal_dsi.c:827HAL_DSI_IRQHandler()
if (__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_TE) != 0U)
stm32f4xx_hal_dsi.c:829HAL_DSI_IRQHandler()
if (__HAL_DSI_GET_IT_SOURCE(hdsi, DSI_IT_TE) != 0U)
stm32f4xx_hal_dsi.c:832HAL_DSI_IRQHandler()
__HAL_DSI_CLEAR_FLAG(hdsi, DSI_FLAG_TE);
stm32f4xx_hal_dsi.c:846HAL_DSI_IRQHandler()
if (__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_ER) != 0U)
stm32f4xx_hal_dsi.c:848HAL_DSI_IRQHandler()
if (__HAL_DSI_GET_IT_SOURCE(hdsi, DSI_IT_ER) != 0U)
stm32f4xx_hal_dsi.c:851HAL_DSI_IRQHandler()
__HAL_DSI_CLEAR_FLAG(hdsi, DSI_FLAG_ER);
stm32f4xx_hal_dsi.c:867HAL_DSI_IRQHandler()
ErrorStatus0 = hdsi->Instance->ISR[0U];
stm32f4xx_hal_dsi.c:868HAL_DSI_IRQHandler()
ErrorStatus0 &= hdsi->Instance->IER[0U];
stm32f4xx_hal_dsi.c:869HAL_DSI_IRQHandler()
ErrorStatus1 = hdsi->Instance->ISR[1U];
stm32f4xx_hal_dsi.c:870HAL_DSI_IRQHandler()
ErrorStatus1 &= hdsi->Instance->IER[1U];
stm32f4xx_hal_dsi.c:1039HAL_DSI_SetGenericVCID()
hdsi->Instance->GVCIDR &= ~DSI_GVCIDR_VCID;
stm32f4xx_hal_dsi.c:1040HAL_DSI_SetGenericVCID()
hdsi->Instance->GVCIDR |= VirtualChannelID;
stm32f4xx_hal_dsi.c:1082HAL_DSI_ConfigVideoMode()
hdsi->Instance->MCR &= ~DSI_MCR_CMDM;
stm32f4xx_hal_dsi.c:1083HAL_DSI_ConfigVideoMode()
hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM;
stm32f4xx_hal_dsi.c:1086HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_VMT;
stm32f4xx_hal_dsi.c:1087HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->Mode;
stm32f4xx_hal_dsi.c:1090HAL_DSI_ConfigVideoMode()
hdsi->Instance->VPCR &= ~DSI_VPCR_VPSIZE;
stm32f4xx_hal_dsi.c:1091HAL_DSI_ConfigVideoMode()
hdsi->Instance->VPCR |= VidCfg->PacketSize;
stm32f4xx_hal_dsi.c:1094HAL_DSI_ConfigVideoMode()
hdsi->Instance->VCCR &= ~DSI_VCCR_NUMC;
stm32f4xx_hal_dsi.c:1095HAL_DSI_ConfigVideoMode()
hdsi->Instance->VCCR |= VidCfg->NumberOfChunks;
stm32f4xx_hal_dsi.c:1098HAL_DSI_ConfigVideoMode()
hdsi->Instance->VNPCR &= ~DSI_VNPCR_NPSIZE;
stm32f4xx_hal_dsi.c:1099HAL_DSI_ConfigVideoMode()
hdsi->Instance->VNPCR |= VidCfg->NullPacketSize;
stm32f4xx_hal_dsi.c:1102HAL_DSI_ConfigVideoMode()
hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID;
stm32f4xx_hal_dsi.c:1103HAL_DSI_ConfigVideoMode()
hdsi->Instance->LVCIDR |= VidCfg->VirtualChannelID;
stm32f4xx_hal_dsi.c:1106HAL_DSI_ConfigVideoMode()
hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP | DSI_LPCR_VSP | DSI_LPCR_HSP);
stm32f4xx_hal_dsi.c:1107HAL_DSI_ConfigVideoMode()
hdsi->Instance->LPCR |= (VidCfg->DEPolarity | VidCfg->VSPolarity | VidCfg->HSPolarity);
stm32f4xx_hal_dsi.c:1110HAL_DSI_ConfigVideoMode()
hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC;
stm32f4xx_hal_dsi.c:1111HAL_DSI_ConfigVideoMode()
hdsi->Instance->LCOLCR |= VidCfg->ColorCoding;
stm32f4xx_hal_dsi.c:1114HAL_DSI_ConfigVideoMode()
hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX;
stm32f4xx_hal_dsi.c:1115HAL_DSI_ConfigVideoMode()
hdsi->Instance->WCFGR |= ((VidCfg->ColorCoding) << 1U);
stm32f4xx_hal_dsi.c:1120HAL_DSI_ConfigVideoMode()
hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_LPE;
stm32f4xx_hal_dsi.c:1121HAL_DSI_ConfigVideoMode()
hdsi->Instance->LCOLCR |= VidCfg->LooselyPacked;
stm32f4xx_hal_dsi.c:1125HAL_DSI_ConfigVideoMode()
hdsi->Instance->VHSACR &= ~DSI_VHSACR_HSA;
stm32f4xx_hal_dsi.c:1126HAL_DSI_ConfigVideoMode()
hdsi->Instance->VHSACR |= VidCfg->HorizontalSyncActive;
stm32f4xx_hal_dsi.c:1129HAL_DSI_ConfigVideoMode()
hdsi->Instance->VHBPCR &= ~DSI_VHBPCR_HBP;
stm32f4xx_hal_dsi.c:1130HAL_DSI_ConfigVideoMode()
hdsi->Instance->VHBPCR |= VidCfg->HorizontalBackPorch;
stm32f4xx_hal_dsi.c:1133HAL_DSI_ConfigVideoMode()
hdsi->Instance->VLCR &= ~DSI_VLCR_HLINE;
stm32f4xx_hal_dsi.c:1134HAL_DSI_ConfigVideoMode()
hdsi->Instance->VLCR |= VidCfg->HorizontalLine;
stm32f4xx_hal_dsi.c:1137HAL_DSI_ConfigVideoMode()
hdsi->Instance->VVSACR &= ~DSI_VVSACR_VSA;
stm32f4xx_hal_dsi.c:1138HAL_DSI_ConfigVideoMode()
hdsi->Instance->VVSACR |= VidCfg->VerticalSyncActive;
stm32f4xx_hal_dsi.c:1141HAL_DSI_ConfigVideoMode()
hdsi->Instance->VVBPCR &= ~DSI_VVBPCR_VBP;
stm32f4xx_hal_dsi.c:1142HAL_DSI_ConfigVideoMode()
hdsi->Instance->VVBPCR |= VidCfg->VerticalBackPorch;
stm32f4xx_hal_dsi.c:1145HAL_DSI_ConfigVideoMode()
hdsi->Instance->VVFPCR &= ~DSI_VVFPCR_VFP;
stm32f4xx_hal_dsi.c:1146HAL_DSI_ConfigVideoMode()
hdsi->Instance->VVFPCR |= VidCfg->VerticalFrontPorch;
stm32f4xx_hal_dsi.c:1149HAL_DSI_ConfigVideoMode()
hdsi->Instance->VVACR &= ~DSI_VVACR_VA;
stm32f4xx_hal_dsi.c:1150HAL_DSI_ConfigVideoMode()
hdsi->Instance->VVACR |= VidCfg->VerticalActive;
stm32f4xx_hal_dsi.c:1153HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_LPCE;
stm32f4xx_hal_dsi.c:1154HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->LPCommandEnable;
stm32f4xx_hal_dsi.c:1157HAL_DSI_ConfigVideoMode()
hdsi->Instance->LPMCR &= ~DSI_LPMCR_LPSIZE;
stm32f4xx_hal_dsi.c:1158HAL_DSI_ConfigVideoMode()
hdsi->Instance->LPMCR |= ((VidCfg->LPLargestPacketSize) << 16U);
stm32f4xx_hal_dsi.c:1161HAL_DSI_ConfigVideoMode()
hdsi->Instance->LPMCR &= ~DSI_LPMCR_VLPSIZE;
stm32f4xx_hal_dsi.c:1162HAL_DSI_ConfigVideoMode()
hdsi->Instance->LPMCR |= VidCfg->LPVACTLargestPacketSize;
stm32f4xx_hal_dsi.c:1165HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_LPHFPE;
stm32f4xx_hal_dsi.c:1166HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->LPHorizontalFrontPorchEnable;
stm32f4xx_hal_dsi.c:1169HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_LPHBPE;
stm32f4xx_hal_dsi.c:1170HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->LPHorizontalBackPorchEnable;
stm32f4xx_hal_dsi.c:1173HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_LPVAE;
stm32f4xx_hal_dsi.c:1174HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->LPVerticalActiveEnable;
stm32f4xx_hal_dsi.c:1177HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_LPVFPE;
stm32f4xx_hal_dsi.c:1178HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->LPVerticalFrontPorchEnable;
stm32f4xx_hal_dsi.c:1181HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_LPVBPE;
stm32f4xx_hal_dsi.c:1182HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->LPVerticalBackPorchEnable;
stm32f4xx_hal_dsi.c:1185HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_LPVSAE;
stm32f4xx_hal_dsi.c:1186HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->LPVerticalSyncActiveEnable;
stm32f4xx_hal_dsi.c:1189HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR &= ~DSI_VMCR_FBTAAE;
stm32f4xx_hal_dsi.c:1190HAL_DSI_ConfigVideoMode()
hdsi->Instance->VMCR |= VidCfg->FrameBTAAcknowledgeEnable;
stm32f4xx_hal_dsi.c:1223HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->MCR |= DSI_MCR_CMDM;
stm32f4xx_hal_dsi.c:1224HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM;
stm32f4xx_hal_dsi.c:1225HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->WCFGR |= DSI_WCFGR_DSIM;
stm32f4xx_hal_dsi.c:1228HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID;
stm32f4xx_hal_dsi.c:1229HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->LVCIDR |= CmdCfg->VirtualChannelID;
stm32f4xx_hal_dsi.c:1232HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP | DSI_LPCR_VSP | DSI_LPCR_HSP);
stm32f4xx_hal_dsi.c:1233HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->LPCR |= (CmdCfg->DEPolarity | CmdCfg->VSPolarity | CmdCfg->HSPolarity);
stm32f4xx_hal_dsi.c:1236HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC;
stm32f4xx_hal_dsi.c:1237HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->LCOLCR |= CmdCfg->ColorCoding;
stm32f4xx_hal_dsi.c:1240HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX;
stm32f4xx_hal_dsi.c:1241HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->WCFGR |= ((CmdCfg->ColorCoding) << 1U);
stm32f4xx_hal_dsi.c:1244HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->LCCR &= ~DSI_LCCR_CMDSIZE;
stm32f4xx_hal_dsi.c:1245HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->LCCR |= CmdCfg->CommandSize;
stm32f4xx_hal_dsi.c:1248HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->WCFGR &= ~(DSI_WCFGR_TESRC | DSI_WCFGR_TEPOL | DSI_WCFGR_AR | DSI_WCFGR_VSPOL);
stm32f4xx_hal_dsi.c:1249HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->WCFGR |= (CmdCfg->TearingEffectSource | CmdCfg->TearingEffectPolarity | CmdCfg->AutomaticRefresh |
stm32f4xx_hal_dsi.c:1253HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->CMCR &= ~DSI_CMCR_TEARE;
stm32f4xx_hal_dsi.c:1254HAL_DSI_ConfigAdaptedCommandMode()
hdsi->Instance->CMCR |= CmdCfg->TEAcknowledgeRequest;
stm32f4xx_hal_dsi.c:1257HAL_DSI_ConfigAdaptedCommandMode()
__HAL_DSI_ENABLE_IT(hdsi, DSI_IT_TE);
stm32f4xx_hal_dsi.c:1260HAL_DSI_ConfigAdaptedCommandMode()
__HAL_DSI_ENABLE_IT(hdsi, DSI_IT_ER);
stm32f4xx_hal_dsi.c:1297HAL_DSI_ConfigCommand()
hdsi->Instance->CMCR &= ~(DSI_CMCR_GSW0TX | \
stm32f4xx_hal_dsi.c:1309HAL_DSI_ConfigCommand()
hdsi->Instance->CMCR |= (LPCmd->LPGenShortWriteNoP | \
stm32f4xx_hal_dsi.c:1323HAL_DSI_ConfigCommand()
hdsi->Instance->CMCR &= ~DSI_CMCR_ARE;
stm32f4xx_hal_dsi.c:1324HAL_DSI_ConfigCommand()
hdsi->Instance->CMCR |= LPCmd->AcknowledgeRequest;
stm32f4xx_hal_dsi.c:1349HAL_DSI_ConfigFlowControl()
hdsi->Instance->PCR &= ~DSI_FLOW_CONTROL_ALL;
stm32f4xx_hal_dsi.c:1350HAL_DSI_ConfigFlowControl()
hdsi->Instance->PCR |= FlowControl;
stm32f4xx_hal_dsi.c:1387HAL_DSI_ConfigPhyTimer()
hdsi->Instance->CLTCR &= ~(DSI_CLTCR_LP2HS_TIME | DSI_CLTCR_HS2LP_TIME);
stm32f4xx_hal_dsi.c:1388HAL_DSI_ConfigPhyTimer()
hdsi->Instance->CLTCR |= (maxTime | ((maxTime) << 16U));
stm32f4xx_hal_dsi.c:1391HAL_DSI_ConfigPhyTimer()
hdsi->Instance->DLTCR &= ~(DSI_DLTCR_MRD_TIME | DSI_DLTCR_LP2HS_TIME | DSI_DLTCR_HS2LP_TIME);
stm32f4xx_hal_dsi.c:1392HAL_DSI_ConfigPhyTimer()
hdsi->Instance->DLTCR |= (PhyTimers->DataLaneMaxReadTime | ((PhyTimers->DataLaneLP2HSTime) << 16U) | ((
stm32f4xx_hal_dsi.c:1396HAL_DSI_ConfigPhyTimer()
hdsi->Instance->PCONFR &= ~DSI_PCONFR_SW_TIME;
stm32f4xx_hal_dsi.c:1397HAL_DSI_ConfigPhyTimer()
hdsi->Instance->PCONFR |= ((PhyTimers->StopWaitTime) << 8U);
stm32f4xx_hal_dsi.c:1419HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->CCR &= ~DSI_CCR_TOCKDIV;
stm32f4xx_hal_dsi.c:1420HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->CCR |= ((HostTimeouts->TimeoutCkdiv) << 8U);
stm32f4xx_hal_dsi.c:1423HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_HSTX_TOCNT;
stm32f4xx_hal_dsi.c:1424HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[0U] |= ((HostTimeouts->HighSpeedTransmissionTimeout) << 16U);
stm32f4xx_hal_dsi.c:1427HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_LPRX_TOCNT;
stm32f4xx_hal_dsi.c:1428HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[0U] |= HostTimeouts->LowPowerReceptionTimeout;
stm32f4xx_hal_dsi.c:1431HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[1U] &= ~DSI_TCCR1_HSRD_TOCNT;
stm32f4xx_hal_dsi.c:1432HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[1U] |= HostTimeouts->HighSpeedReadTimeout;
stm32f4xx_hal_dsi.c:1435HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[2U] &= ~DSI_TCCR2_LPRD_TOCNT;
stm32f4xx_hal_dsi.c:1436HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[2U] |= HostTimeouts->LowPowerReadTimeout;
stm32f4xx_hal_dsi.c:1439HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_HSWR_TOCNT;
stm32f4xx_hal_dsi.c:1440HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[3U] |= HostTimeouts->HighSpeedWriteTimeout;
stm32f4xx_hal_dsi.c:1443HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_PM;
stm32f4xx_hal_dsi.c:1444HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[3U] |= HostTimeouts->HighSpeedWritePrespMode;
stm32f4xx_hal_dsi.c:1447HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[4U] &= ~DSI_TCCR4_LPWR_TOCNT;
stm32f4xx_hal_dsi.c:1448HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[4U] |= HostTimeouts->LowPowerWriteTimeout;
stm32f4xx_hal_dsi.c:1451HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[5U] &= ~DSI_TCCR5_BTA_TOCNT;
stm32f4xx_hal_dsi.c:1452HAL_DSI_ConfigHostTimeouts()
hdsi->Instance->TCCR[5U] |= HostTimeouts->BTATimeout;
stm32f4xx_hal_dsi.c:1472HAL_DSI_Start()
__HAL_DSI_ENABLE(hdsi);
stm32f4xx_hal_dsi.c:1475HAL_DSI_Start()
__HAL_DSI_WRAPPER_ENABLE(hdsi);
stm32f4xx_hal_dsi.c:1495HAL_DSI_Stop()
__HAL_DSI_DISABLE(hdsi);
stm32f4xx_hal_dsi.c:1498HAL_DSI_Stop()
__HAL_DSI_WRAPPER_DISABLE(hdsi);
stm32f4xx_hal_dsi.c:1518HAL_DSI_Refresh()
hdsi->Instance->WCR |= DSI_WCR_LTDCEN;
stm32f4xx_hal_dsi.c:1543HAL_DSI_ColorMode()
hdsi->Instance->WCR &= ~DSI_WCR_COLM;
stm32f4xx_hal_dsi.c:1544HAL_DSI_ColorMode()
hdsi->Instance->WCR |= ColorMode;
stm32f4xx_hal_dsi.c:1569HAL_DSI_Shutdown()
hdsi->Instance->WCR &= ~DSI_WCR_SHTDN;
stm32f4xx_hal_dsi.c:1570HAL_DSI_Shutdown()
hdsi->Instance->WCR |= Shutdown;
stm32f4xx_hal_dsi.c:1650HAL_DSI_LongWrite()
while ((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == 0U)
stm32f4xx_hal_dsi.c:1670HAL_DSI_LongWrite()
hdsi->Instance->GPDR = fifoword;
stm32f4xx_hal_dsi.c:1683HAL_DSI_LongWrite()
hdsi->Instance->GPDR = fifoword;
stm32f4xx_hal_dsi.c:1690HAL_DSI_LongWrite()
DSI_ConfigPacketHeader(hdsi->Instance,
stm32f4xx_hal_dsi.c:1752HAL_DSI_Read()
DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, DCSCmd, 0U);
stm32f4xx_hal_dsi.c:1756HAL_DSI_Read()
DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, 0U, 0U);
stm32f4xx_hal_dsi.c:1760HAL_DSI_Read()
DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], 0U);
stm32f4xx_hal_dsi.c:1764HAL_DSI_Read()
DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], ParametersTable[1U]);
stm32f4xx_hal_dsi.c:1780HAL_DSI_Read()
if ((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == 0U)
stm32f4xx_hal_dsi.c:1782HAL_DSI_Read()
fifoword = hdsi->Instance->GPDR;
stm32f4xx_hal_dsi.c:1806HAL_DSI_Read()
if ((hdsi->Instance->GPSR & DSI_GPSR_RCB) == 0U)
stm32f4xx_hal_dsi.c:1808HAL_DSI_Read()
if ((hdsi->Instance->ISR[1U] & DSI_ISR1_PSE) == DSI_ISR1_PSE)
stm32f4xx_hal_dsi.c:1841HAL_DSI_EnterULPMData()
if ((hdsi->Instance->PCTLR & (DSI_PCTLR_CKE | DSI_PCTLR_DEN)) != (DSI_PCTLR_CKE | DSI_PCTLR_DEN))
stm32f4xx_hal_dsi.c:1849HAL_DSI_EnterULPMData()
if ((hdsi->Instance->WRPCR & DSI_WRPCR_PLLEN) != DSI_WRPCR_PLLEN)
stm32f4xx_hal_dsi.c:1855HAL_DSI_EnterULPMData()
else if ((hdsi->Instance->WRPCR & DSI_WRPCR_REGEN) != DSI_WRPCR_REGEN)
stm32f4xx_hal_dsi.c:1867HAL_DSI_EnterULPMData()
if ((hdsi->Instance->PUCR & (DSI_PUCR_UEDL | DSI_PUCR_URDL)) != 0U)
stm32f4xx_hal_dsi.c:1875HAL_DSI_EnterULPMData()
if ((hdsi->Instance->PTTCR & DSI_PTTCR_TX_TRIG) != 0U)
stm32f4xx_hal_dsi.c:1889HAL_DSI_EnterULPMData()
while ((__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == 0U))
stm32f4xx_hal_dsi.c:1902HAL_DSI_EnterULPMData()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:1904HAL_DSI_EnterULPMData()
if ((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0)
stm32f4xx_hal_dsi.c:1911HAL_DSI_EnterULPMData()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:1913HAL_DSI_EnterULPMData()
if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1))
stm32f4xx_hal_dsi.c:1928HAL_DSI_EnterULPMData()
hdsi->Instance->PUCR |= DSI_PUCR_URDL;
stm32f4xx_hal_dsi.c:1934HAL_DSI_EnterULPMData()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:1936HAL_DSI_EnterULPMData()
while ((hdsi->Instance->PSR & DSI_PSR_UAN0) != 0U)
stm32f4xx_hal_dsi.c:1948HAL_DSI_EnterULPMData()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:1950HAL_DSI_EnterULPMData()
while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != 0U)
stm32f4xx_hal_dsi.c:1991HAL_DSI_ExitULPMData()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:1993HAL_DSI_ExitULPMData()
if ((hdsi->Instance->PSR & DSI_PSR_UAN0) != 0U)
stm32f4xx_hal_dsi.c:2001HAL_DSI_ExitULPMData()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:2003HAL_DSI_ExitULPMData()
if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != 0U)
stm32f4xx_hal_dsi.c:2020HAL_DSI_ExitULPMData()
__HAL_DSI_PLL_ENABLE(hdsi);
stm32f4xx_hal_dsi.c:2030HAL_DSI_ExitULPMData()
while (__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == 0U)
stm32f4xx_hal_dsi.c:2043HAL_DSI_ExitULPMData()
hdsi->Instance->PUCR |= DSI_PUCR_UEDL;
stm32f4xx_hal_dsi.c:2049HAL_DSI_ExitULPMData()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:2051HAL_DSI_ExitULPMData()
while ((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0)
stm32f4xx_hal_dsi.c:2063HAL_DSI_ExitULPMData()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:2065HAL_DSI_ExitULPMData()
while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1))
stm32f4xx_hal_dsi.c:2089HAL_DSI_ExitULPMData()
hdsi->Instance->PUCR = 0U;
stm32f4xx_hal_dsi.c:2092HAL_DSI_ExitULPMData()
if ((hdsi->Instance->WRPCR & DSI_WRPCR_PLLEN) != DSI_WRPCR_PLLEN)
stm32f4xx_hal_dsi.c:2100HAL_DSI_ExitULPMData()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:2102HAL_DSI_ExitULPMData()
if ((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0)
stm32f4xx_hal_dsi.c:2109HAL_DSI_ExitULPMData()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:2111HAL_DSI_ExitULPMData()
if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1))
stm32f4xx_hal_dsi.c:2134HAL_DSI_ExitULPMData()
while (__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == 0U)
stm32f4xx_hal_dsi.c:2169HAL_DSI_EnterULPM()
if ((hdsi->Instance->PCTLR & (DSI_PCTLR_CKE | DSI_PCTLR_DEN)) != (DSI_PCTLR_CKE | DSI_PCTLR_DEN))
stm32f4xx_hal_dsi.c:2177HAL_DSI_EnterULPM()
if ((hdsi->Instance->WRPCR & DSI_WRPCR_PLLEN) != DSI_WRPCR_PLLEN)
stm32f4xx_hal_dsi.c:2183HAL_DSI_EnterULPM()
else if ((hdsi->Instance->WRPCR & DSI_WRPCR_REGEN) != DSI_WRPCR_REGEN)
stm32f4xx_hal_dsi.c:2195HAL_DSI_EnterULPM()
if ((hdsi->Instance->PUCR & (DSI_PUCR_UEDL | DSI_PUCR_URDL | DSI_PUCR_UECL | DSI_PUCR_URCL)) != 0U)
stm32f4xx_hal_dsi.c:2203HAL_DSI_EnterULPM()
if ((hdsi->Instance->PTTCR & DSI_PTTCR_TX_TRIG) != 0U)
stm32f4xx_hal_dsi.c:2217HAL_DSI_EnterULPM()
while ((__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == 0U))
stm32f4xx_hal_dsi.c:2230HAL_DSI_EnterULPM()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:2232HAL_DSI_EnterULPM()
if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_PSS0)) != (DSI_PSR_UAN0 | DSI_PSR_PSS0))
stm32f4xx_hal_dsi.c:2239HAL_DSI_EnterULPM()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:2241HAL_DSI_EnterULPM()
if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_PSS0 | DSI_PSR_PSS1 | \
stm32f4xx_hal_dsi.c:2257HAL_DSI_EnterULPM()
hdsi->Instance->CLCR &= ~DSI_CLCR_DPCC;
stm32f4xx_hal_dsi.c:2263HAL_DSI_EnterULPM()
hdsi->Instance->PUCR |= (DSI_PUCR_URCL | DSI_PUCR_URDL);
stm32f4xx_hal_dsi.c:2269HAL_DSI_EnterULPM()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:2271HAL_DSI_EnterULPM()
while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UANC)) != 0U)
stm32f4xx_hal_dsi.c:2283HAL_DSI_EnterULPM()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:2285HAL_DSI_EnterULPM()
while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC)) != 0U)
stm32f4xx_hal_dsi.c:2306HAL_DSI_EnterULPM()
__HAL_DSI_PLL_DISABLE(hdsi);
stm32f4xx_hal_dsi.c:2329HAL_DSI_ExitULPM()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:2331HAL_DSI_ExitULPM()
if ((hdsi->Instance->PSR & (DSI_PSR_RUE0 | DSI_PSR_UAN0 | DSI_PSR_PSS0 | \
stm32f4xx_hal_dsi.c:2340HAL_DSI_ExitULPM()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:2342HAL_DSI_ExitULPM()
if ((hdsi->Instance->PSR & (DSI_PSR_RUE0 | DSI_PSR_UAN0 | DSI_PSR_PSS0 | DSI_PSR_UAN1 | \
stm32f4xx_hal_dsi.c:2360HAL_DSI_ExitULPM()
__HAL_DSI_PLL_ENABLE(hdsi);
stm32f4xx_hal_dsi.c:2370HAL_DSI_ExitULPM()
while (__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == 0U)
stm32f4xx_hal_dsi.c:2383HAL_DSI_ExitULPM()
hdsi->Instance->PUCR |= (DSI_PUCR_UECL | DSI_PUCR_UEDL);
stm32f4xx_hal_dsi.c:2389HAL_DSI_ExitULPM()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:2391HAL_DSI_ExitULPM()
while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UANC)) != (DSI_PSR_UAN0 | DSI_PSR_UANC))
stm32f4xx_hal_dsi.c:2403HAL_DSI_ExitULPM()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:2405HAL_DSI_ExitULPM()
while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1 |
stm32f4xx_hal_dsi.c:2430HAL_DSI_ExitULPM()
hdsi->Instance->PUCR = 0U;
stm32f4xx_hal_dsi.c:2436HAL_DSI_ExitULPM()
hdsi->Instance->CLCR |= DSI_CLCR_DPCC;
stm32f4xx_hal_dsi.c:2439HAL_DSI_ExitULPM()
if ((hdsi->Instance->WRPCR & DSI_WRPCR_PLLEN) != DSI_WRPCR_PLLEN)
stm32f4xx_hal_dsi.c:2447HAL_DSI_ExitULPM()
if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
stm32f4xx_hal_dsi.c:2449HAL_DSI_ExitULPM()
if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_PSS0)) != (DSI_PSR_UAN0 | DSI_PSR_PSS0))
stm32f4xx_hal_dsi.c:2456HAL_DSI_ExitULPM()
else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
stm32f4xx_hal_dsi.c:2458HAL_DSI_ExitULPM()
if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_PSS0 | DSI_PSR_PSS1 | \
stm32f4xx_hal_dsi.c:2482HAL_DSI_ExitULPM()
while (__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == 0U)
stm32f4xx_hal_dsi.c:2520HAL_DSI_PatternGeneratorStart()
hdsi->Instance->VMCR &= ~(DSI_VMCR_PGM | DSI_VMCR_PGO);
stm32f4xx_hal_dsi.c:2521HAL_DSI_PatternGeneratorStart()
hdsi->Instance->VMCR |= ((Mode << 20U) | (Orientation << 24U));
stm32f4xx_hal_dsi.c:2524HAL_DSI_PatternGeneratorStart()
hdsi->Instance->VMCR |= DSI_VMCR_PGE;
stm32f4xx_hal_dsi.c:2544HAL_DSI_PatternGeneratorStop()
hdsi->Instance->VMCR &= ~DSI_VMCR_PGE;
stm32f4xx_hal_dsi.c:2579HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXSRCCL;
stm32f4xx_hal_dsi.c:2580HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] |= Value << 16U;
stm32f4xx_hal_dsi.c:2585HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXSRCDL;
stm32f4xx_hal_dsi.c:2586HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] |= Value << 18U;
stm32f4xx_hal_dsi.c:2600HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPSRCCL;
stm32f4xx_hal_dsi.c:2601HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] |= Value << 6U;
stm32f4xx_hal_dsi.c:2606HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPSRCDL;
stm32f4xx_hal_dsi.c:2607HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] |= Value << 8U;
stm32f4xx_hal_dsi.c:2621HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXDCL;
stm32f4xx_hal_dsi.c:2622HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] |= Value;
stm32f4xx_hal_dsi.c:2627HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXDDL;
stm32f4xx_hal_dsi.c:2628HAL_DSI_SetSlewRateAndDelayTuning()
hdsi->Instance->WPCR[1U] |= Value << 2U;
stm32f4xx_hal_dsi.c:2661HAL_DSI_SetLowPowerRXFilter()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPRXFT;
stm32f4xx_hal_dsi.c:2662HAL_DSI_SetLowPowerRXFilter()
hdsi->Instance->WPCR[1U] |= Frequency << 25U;
stm32f4xx_hal_dsi.c:2687HAL_DSI_SetSDD()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_SDDC;
stm32f4xx_hal_dsi.c:2688HAL_DSI_SetSDD()
hdsi->Instance->WPCR[1U] |= ((uint32_t)State << 12U);
stm32f4xx_hal_dsi.c:2724HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWCL;
stm32f4xx_hal_dsi.c:2725HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 6U);
stm32f4xx_hal_dsi.c:2730HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL0;
stm32f4xx_hal_dsi.c:2731HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 7U);
stm32f4xx_hal_dsi.c:2736HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL1;
stm32f4xx_hal_dsi.c:2737HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 8U);
stm32f4xx_hal_dsi.c:2751HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSICL;
stm32f4xx_hal_dsi.c:2752HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 9U);
stm32f4xx_hal_dsi.c:2757HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSIDL0;
stm32f4xx_hal_dsi.c:2758HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 10U);
stm32f4xx_hal_dsi.c:2763HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSIDL1;
stm32f4xx_hal_dsi.c:2764HAL_DSI_SetLanePinsConfiguration()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 11U);
stm32f4xx_hal_dsi.c:2807HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKPOSTEN;
stm32f4xx_hal_dsi.c:2808HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 27U);
stm32f4xx_hal_dsi.c:2813HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[4U] &= ~DSI_WPCR4_TCLKPOST;
stm32f4xx_hal_dsi.c:2814HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[4U] |= Value & DSI_WPCR4_TCLKPOST;
stm32f4xx_hal_dsi.c:2820HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TLPXCEN;
stm32f4xx_hal_dsi.c:2821HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 26U);
stm32f4xx_hal_dsi.c:2826HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_TLPXC;
stm32f4xx_hal_dsi.c:2827HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[3U] |= (Value << 24U) & DSI_WPCR3_TLPXC;
stm32f4xx_hal_dsi.c:2833HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSEXITEN;
stm32f4xx_hal_dsi.c:2834HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 25U);
stm32f4xx_hal_dsi.c:2839HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_THSEXIT;
stm32f4xx_hal_dsi.c:2840HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[3U] |= (Value << 16U) & DSI_WPCR3_THSEXIT;
stm32f4xx_hal_dsi.c:2846HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TLPXDEN;
stm32f4xx_hal_dsi.c:2847HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 24U);
stm32f4xx_hal_dsi.c:2852HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_TLPXD;
stm32f4xx_hal_dsi.c:2853HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[3U] |= (Value << 8U) & DSI_WPCR3_TLPXD;
stm32f4xx_hal_dsi.c:2859HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSZEROEN;
stm32f4xx_hal_dsi.c:2860HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 23U);
stm32f4xx_hal_dsi.c:2865HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_THSZERO;
stm32f4xx_hal_dsi.c:2866HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[3U] |= Value & DSI_WPCR3_THSZERO;
stm32f4xx_hal_dsi.c:2872HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSTRAILEN;
stm32f4xx_hal_dsi.c:2873HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 22U);
stm32f4xx_hal_dsi.c:2878HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_THSTRAIL;
stm32f4xx_hal_dsi.c:2879HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[2U] |= (Value << 24U) & DSI_WPCR2_THSTRAIL;
stm32f4xx_hal_dsi.c:2885HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSPREPEN;
stm32f4xx_hal_dsi.c:2886HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 21U);
stm32f4xx_hal_dsi.c:2891HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_THSPREP;
stm32f4xx_hal_dsi.c:2892HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[2U] |= (Value << 16U) & DSI_WPCR2_THSPREP;
stm32f4xx_hal_dsi.c:2898HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKZEROEN;
stm32f4xx_hal_dsi.c:2899HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 20U);
stm32f4xx_hal_dsi.c:2904HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_TCLKZERO;
stm32f4xx_hal_dsi.c:2905HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[2U] |= (Value << 8U) & DSI_WPCR2_TCLKZERO;
stm32f4xx_hal_dsi.c:2911HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKPREPEN;
stm32f4xx_hal_dsi.c:2912HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 19U);
stm32f4xx_hal_dsi.c:2917HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_TCLKPREP;
stm32f4xx_hal_dsi.c:2918HAL_DSI_SetPHYTimings()
hdsi->Instance->WPCR[2U] |= Value & DSI_WPCR2_TCLKPREP;
stm32f4xx_hal_dsi.c:2953HAL_DSI_ForceTXStopMode()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMCL;
stm32f4xx_hal_dsi.c:2954HAL_DSI_ForceTXStopMode()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 12U);
stm32f4xx_hal_dsi.c:2959HAL_DSI_ForceTXStopMode()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMDL;
stm32f4xx_hal_dsi.c:2960HAL_DSI_ForceTXStopMode()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 13U);
stm32f4xx_hal_dsi.c:2992HAL_DSI_ForceRXLowPower()
hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_FLPRXLPM;
stm32f4xx_hal_dsi.c:2993HAL_DSI_ForceRXLowPower()
hdsi->Instance->WPCR[1U] |= ((uint32_t)State << 22U);
stm32f4xx_hal_dsi.c:3017HAL_DSI_ForceDataLanesInRX()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TDDL;
stm32f4xx_hal_dsi.c:3018HAL_DSI_ForceDataLanesInRX()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 16U);
stm32f4xx_hal_dsi.c:3042HAL_DSI_SetPullDown()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_PDEN;
stm32f4xx_hal_dsi.c:3043HAL_DSI_SetPullDown()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 18U);
stm32f4xx_hal_dsi.c:3067HAL_DSI_SetContentionDetectionOff()
hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_CDOFFDL;
stm32f4xx_hal_dsi.c:3068HAL_DSI_SetContentionDetectionOff()
hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 14U);

Data Use

Type of DSI_HandleTypeDef::Instance
DSI_HandleTypeDef::Instance
all items filtered out