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DSI_WPCR0_HSICL
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STM32 Libraries and Samples
CMSIS
DSI_WPCR0_HSICL
DSI_WPCR0_HSICL macro
Invert the high-speed data signal on clock lane
Syntax
from
stm32f469xx.h:9348
#define
DSI_WPCR0_HSICL
DSI_WPCR0_HSICL_Msk
Examples
DSI_WPCR0_HSICL
is referenced by
1 libraries and example projects
.
References
Location
Text
stm32f469xx.h:9348
#define
DSI_WPCR0_HSICL
DSI_WPCR0_HSICL_Msk
/*!< Invert the high-speed data signal on clock lane */
stm32f479xx.h:9538
#define
DSI_WPCR0_HSICL
DSI_WPCR0_HSICL_Msk
/*!< Invert the high-speed data signal on clock lane */