CMSIS
TIM_CCMR1_OC1M_Pos is only used within CMSIS.
 
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CodeScopeSTM32 Libraries and SamplesCMSISTIM_CCMR1_OC1M_Pos

TIM_CCMR1_OC1M_Pos macro

Syntax

#define TIM_CCMR1_OC1M_Pos (4U)

References

LocationText
stm32f401xc.h:6284
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f401xe.h:6284
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f407xx.h:12151
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f410rx.h:6236
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f410tx.h:6192
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f411xe.h:6315
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f412zx.h:11939
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f413xx.h:12645
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f417xx.h:12431
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f429xx.h:13703
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f439xx.h:13997
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f446xx.h:13380
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f469xx.h:16716
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f479xx.h:17013
#define TIM_CCMR1_OC1M_Pos (4U)
stm32f401xc.h:6285
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f401xc.h:6287
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f401xc.h:6288
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f401xc.h:6289
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f401xe.h:6285
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f401xe.h:6287
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f401xe.h:6288
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f401xe.h:6289
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f407xx.h:12152
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f407xx.h:12154
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f407xx.h:12155
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f407xx.h:12156
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f410rx.h:6237
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f410rx.h:6239
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f410rx.h:6240
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f410rx.h:6241
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f411xe.h:6316
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f411xe.h:6318
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f411xe.h:6319
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f411xe.h:6320
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f412zx.h:11940
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f412zx.h:11942
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f412zx.h:11943
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f412zx.h:11944
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f413xx.h:12646
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f413xx.h:12648
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f413xx.h:12649
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f413xx.h:12650
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f417xx.h:12432
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f417xx.h:12434
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f417xx.h:12435
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f417xx.h:12436
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f429xx.h:13704
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f429xx.h:13706
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f429xx.h:13707
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f429xx.h:13708
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f439xx.h:13998
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f439xx.h:14000
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f439xx.h:14001
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f439xx.h:14002
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f446xx.h:13381
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f446xx.h:13383
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f446xx.h:13384
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f446xx.h:13385
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f469xx.h:16717
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f469xx.h:16719
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f469xx.h:16720
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f469xx.h:16721
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
stm32f479xx.h:17014
#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
stm32f479xx.h:17016
#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
stm32f479xx.h:17017
#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
stm32f479xx.h:17018
#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */