CMSIS
TIM_BDTR_BKE_Msk is only used within CMSIS.
 
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CodeScopeSTM32 Libraries and SamplesCMSISTIM_BDTR_BKE_Msk

TIM_BDTR_BKE_Msk macro

0x00001000

Syntax

#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos)

References

LocationText
stm32f401xc.h:6541
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f401xe.h:6541
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f407xx.h:12408
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f410rx.h:6493
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f410tx.h:6449
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f411xe.h:6572
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f412zx.h:12196
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f413xx.h:12902
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f417xx.h:12688
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f429xx.h:13960
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f439xx.h:14254
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f446xx.h:13637
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f469xx.h:16973
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f479xx.h:17270
#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
stm32f401xc.h:6542
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f401xe.h:6542
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f407xx.h:12409
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f410rx.h:6494
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f411xe.h:6573
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f412zx.h:12197
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f413xx.h:12903
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f417xx.h:12689
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f429xx.h:13961
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f439xx.h:14255
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f446xx.h:13638
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f469xx.h:16974
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
stm32f479xx.h:17271
#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */