CMSIS + 0/1 examples
CodeScope will show references to RCC_PLLCFGR_PLLN_Pos from the following samples and libraries:
 
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CodeScopeSTM32 Libraries and SamplesCMSISRCC_PLLCFGR_PLLN_Pos

RCC_PLLCFGR_PLLN_Pos macro

Syntax

#define RCC_PLLCFGR_PLLN_Pos (6U)

Examples

RCC_PLLCFGR_PLLN_Pos is referenced by 1 libraries and example projects.

References

LocationText
stm32f401xc.h:3940
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f401xe.h:3940
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f407xx.h:9506
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f410rx.h:4278
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f410tx.h:4268
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f411xe.h:3949
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f412zx.h:9293
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f413xx.h:9527
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f417xx.h:9768
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f429xx.h:10569
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f439xx.h:10843
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f446xx.h:10109
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f469xx.h:13567
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f479xx.h:13844
#define RCC_PLLCFGR_PLLN_Pos (6U)
stm32f401xc.h:3941
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f401xc.h:3949
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f401xc.h:3950
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f401xe.h:3941
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f401xe.h:3949
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f401xe.h:3950
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f407xx.h:9507
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f407xx.h:9515
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f407xx.h:9516
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f410rx.h:4279
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f410rx.h:4287
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f410rx.h:4288
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f410tx.h:4269
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f411xe.h:3950
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f411xe.h:3958
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f411xe.h:3959
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f412zx.h:9294
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f412zx.h:9302
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f412zx.h:9303
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f413xx.h:9528
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f413xx.h:9536
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f413xx.h:9537
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f417xx.h:9769
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f417xx.h:9777
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f417xx.h:9778
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f429xx.h:10570
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f429xx.h:10578
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f429xx.h:10579
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f439xx.h:10844
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f439xx.h:10852
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f439xx.h:10853
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f446xx.h:10110
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f446xx.h:10118
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f446xx.h:10119
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f469xx.h:13568
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f469xx.h:13576
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f469xx.h:13577
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
stm32f479xx.h:13845
#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
stm32f479xx.h:13853
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
stm32f479xx.h:13854
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */