CMSIS
DMA_SxCR_PSIZE_Pos is only used within CMSIS.
 
Symbols
loading...
Files
loading...
CodeScopeSTM32 Libraries and SamplesCMSISDMA_SxCR_PSIZE_Pos

DMA_SxCR_PSIZE_Pos macro

Syntax

#define DMA_SxCR_PSIZE_Pos (11U)

References

LocationText
stm32f401xc.h:1454
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f401xe.h:1454
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f407xx.h:5846
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f410rx.h:1513
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f410tx.h:1503
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f411xe.h:1457
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f412zx.h:5667
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f413xx.h:5964
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f417xx.h:6025
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f429xx.h:5996
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f439xx.h:6183
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f446xx.h:6014
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f469xx.h:6098
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f479xx.h:6288
#define DMA_SxCR_PSIZE_Pos (11U)
stm32f401xc.h:1455
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f401xc.h:1457
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f401xc.h:1458
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f401xe.h:1455
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f407xx.h:5847
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f407xx.h:5849
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f407xx.h:5850
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f410rx.h:1514
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f411xe.h:1458
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f411xe.h:1460
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f411xe.h:1461
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f412zx.h:5668
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f412zx.h:5670
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f412zx.h:5671
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f413xx.h:5965
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f413xx.h:5967
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f413xx.h:5968
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f417xx.h:6026
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f417xx.h:6028
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f417xx.h:6029
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f429xx.h:5997
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f429xx.h:5999
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f429xx.h:6000
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f439xx.h:6184
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f439xx.h:6186
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f439xx.h:6187
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f446xx.h:6015
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f446xx.h:6017
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f446xx.h:6018
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f469xx.h:6099
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f469xx.h:6101
#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
stm32f469xx.h:6102
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
stm32f479xx.h:6289
#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
stm32f479xx.h:6292
#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */