CMSIS
DMA_SxCR_PL_Pos is only used within CMSIS.
 
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CodeScopeSTM32 Libraries and SamplesCMSISDMA_SxCR_PL_Pos

DMA_SxCR_PL_Pos macro

Syntax

#define DMA_SxCR_PL_Pos (16U)

References

LocationText
stm32f401xc.h:1441
#define DMA_SxCR_PL_Pos (16U)
stm32f401xe.h:1441
#define DMA_SxCR_PL_Pos (16U)
stm32f407xx.h:5833
#define DMA_SxCR_PL_Pos (16U)
stm32f410rx.h:1500
#define DMA_SxCR_PL_Pos (16U)
stm32f410tx.h:1490
#define DMA_SxCR_PL_Pos (16U)
stm32f411xe.h:1444
#define DMA_SxCR_PL_Pos (16U)
stm32f412zx.h:5654
#define DMA_SxCR_PL_Pos (16U)
stm32f413xx.h:5951
#define DMA_SxCR_PL_Pos (16U)
stm32f417xx.h:6012
#define DMA_SxCR_PL_Pos (16U)
stm32f429xx.h:5983
#define DMA_SxCR_PL_Pos (16U)
stm32f439xx.h:6170
#define DMA_SxCR_PL_Pos (16U)
stm32f446xx.h:6001
#define DMA_SxCR_PL_Pos (16U)
stm32f469xx.h:6085
#define DMA_SxCR_PL_Pos (16U)
stm32f479xx.h:6275
#define DMA_SxCR_PL_Pos (16U)
stm32f401xc.h:1442
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f401xc.h:1445
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f401xe.h:1442
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f407xx.h:5834
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f407xx.h:5836
#define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */
stm32f407xx.h:5837
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f410rx.h:1501
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f410rx.h:1504
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f411xe.h:1445
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f411xe.h:1448
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f412zx.h:5655
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f412zx.h:5658
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f413xx.h:5952
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f413xx.h:5955
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f417xx.h:6013
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f417xx.h:6016
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f429xx.h:5984
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f429xx.h:5986
#define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */
stm32f429xx.h:5987
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f439xx.h:6171
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f439xx.h:6174
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f446xx.h:6002
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f446xx.h:6004
#define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */
stm32f446xx.h:6005
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f469xx.h:6086
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f469xx.h:6088
#define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */
stm32f469xx.h:6089
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
stm32f479xx.h:6276
#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
stm32f479xx.h:6279
#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */