CMSIS
APB1PERIPH_BASE is only used within CMSIS.
 
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CodeScopeSTM32 Libraries and SamplesCMSISAPB1PERIPH_BASE

APB1PERIPH_BASE macro

Syntax

#define APB1PERIPH_BASE PERIPH_BASE

References

LocationText
stm32f401xc.h:650
#define APB1PERIPH_BASE PERIPH_BASE
stm32f401xe.h:650
#define APB1PERIPH_BASE PERIPH_BASE
stm32f407xx.h:927
#define APB1PERIPH_BASE PERIPH_BASE
stm32f410rx.h:575
#define APB1PERIPH_BASE PERIPH_BASE
stm32f410tx.h:572
#define APB1PERIPH_BASE PERIPH_BASE
stm32f411xe.h:651
#define APB1PERIPH_BASE PERIPH_BASE
stm32f412zx.h:853
#define APB1PERIPH_BASE PERIPH_BASE
stm32f413xx.h:932
#define APB1PERIPH_BASE PERIPH_BASE
stm32f417xx.h:995
#define APB1PERIPH_BASE PERIPH_BASE
stm32f429xx.h:1047
#define APB1PERIPH_BASE PERIPH_BASE
stm32f439xx.h:1117
#define APB1PERIPH_BASE PERIPH_BASE
stm32f446xx.h:937
#define APB1PERIPH_BASE PERIPH_BASE
stm32f469xx.h:1137
#define APB1PERIPH_BASE PERIPH_BASE
stm32f479xx.h:1207
#define APB1PERIPH_BASE PERIPH_BASE
stm32f401xc.h:656
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f401xc.h:657
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f401xc.h:658
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f401xc.h:659
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f401xc.h:660
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f401xc.h:663
#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
stm32f401xc.h:664
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f401xc.h:665
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f401xc.h:666
#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
stm32f401xc.h:667
#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
stm32f401xc.h:668
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f401xc.h:671
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f401xe.h:656
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f401xe.h:657
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f401xe.h:658
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f401xe.h:659
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f401xe.h:660
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f401xe.h:667
#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
stm32f401xe.h:671
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f407xx.h:933
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f407xx.h:934
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f407xx.h:935
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f407xx.h:936
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f407xx.h:937
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f407xx.h:939
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f407xx.h:940
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f407xx.h:941
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f407xx.h:942
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f407xx.h:943
#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL)
stm32f407xx.h:944
#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL)
stm32f407xx.h:945
#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
stm32f407xx.h:946
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f407xx.h:947
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f407xx.h:948
#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
stm32f407xx.h:949
#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
stm32f407xx.h:950
#define USART3_BASE (APB1PERIPH_BASE + 0x4800UL)
stm32f407xx.h:951
#define UART4_BASE (APB1PERIPH_BASE + 0x4C00UL)
stm32f407xx.h:952
#define UART5_BASE (APB1PERIPH_BASE + 0x5000UL)
stm32f407xx.h:953
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f407xx.h:954
#define I2C2_BASE (APB1PERIPH_BASE + 0x5800UL)
stm32f407xx.h:955
#define I2C3_BASE (APB1PERIPH_BASE + 0x5C00UL)
stm32f407xx.h:956
#define CAN1_BASE (APB1PERIPH_BASE + 0x6400UL)
stm32f407xx.h:958
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f407xx.h:959
#define DAC_BASE (APB1PERIPH_BASE + 0x7400UL)
stm32f410rx.h:580
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f410rx.h:583
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f410rx.h:588
#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
stm32f410rx.h:589
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f410rx.h:592
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f410tx.h:579
#define LPTIM1_BASE (APB1PERIPH_BASE + 0x2400UL)
stm32f410tx.h:587
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f411xe.h:657
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f411xe.h:658
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f411xe.h:659
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f411xe.h:660
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f411xe.h:661
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f411xe.h:662
#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL)
stm32f411xe.h:663
#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL)
stm32f411xe.h:664
#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
stm32f411xe.h:665
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f411xe.h:666
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f411xe.h:667
#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
stm32f411xe.h:668
#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
stm32f411xe.h:669
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f411xe.h:670
#define I2C2_BASE (APB1PERIPH_BASE + 0x5800UL)
stm32f411xe.h:671
#define I2C3_BASE (APB1PERIPH_BASE + 0x5C00UL)
stm32f411xe.h:672
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f412zx.h:859
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f412zx.h:860
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f412zx.h:861
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f412zx.h:862
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f412zx.h:863
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f412zx.h:865
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f412zx.h:866
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f412zx.h:867
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f412zx.h:868
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f412zx.h:869
#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL)
stm32f412zx.h:870
#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL)
stm32f412zx.h:871
#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
stm32f412zx.h:872
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f412zx.h:873
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f412zx.h:874
#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
stm32f412zx.h:875
#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
stm32f412zx.h:876
#define USART3_BASE (APB1PERIPH_BASE + 0x4800UL)
stm32f412zx.h:877
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f412zx.h:878
#define I2C2_BASE (APB1PERIPH_BASE + 0x5800UL)
stm32f412zx.h:881
#define CAN1_BASE (APB1PERIPH_BASE + 0x6400UL)
stm32f412zx.h:883
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f413xx.h:938
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f413xx.h:939
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f413xx.h:940
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f413xx.h:941
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f413xx.h:942
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f413xx.h:944
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f413xx.h:945
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f413xx.h:946
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f413xx.h:947
#define LPTIM1_BASE (APB1PERIPH_BASE + 0x2400UL)
stm32f413xx.h:948
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f413xx.h:949
#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL)
stm32f413xx.h:950
#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL)
stm32f413xx.h:951
#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
stm32f413xx.h:952
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f413xx.h:953
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f413xx.h:954
#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
stm32f413xx.h:956
#define USART3_BASE (APB1PERIPH_BASE + 0x4800UL)
stm32f413xx.h:959
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f413xx.h:962
#define FMPI2C1_BASE (APB1PERIPH_BASE + 0x6000UL)
stm32f413xx.h:963
#define CAN1_BASE (APB1PERIPH_BASE + 0x6400UL)
stm32f413xx.h:965
#define CAN3_BASE (APB1PERIPH_BASE + 0x6C00UL)
stm32f413xx.h:966
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f413xx.h:967
#define DAC_BASE (APB1PERIPH_BASE + 0x7400UL)
stm32f417xx.h:1001
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f417xx.h:1002
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f417xx.h:1003
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f417xx.h:1004
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f417xx.h:1005
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f417xx.h:1007
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f417xx.h:1008
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f417xx.h:1009
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f417xx.h:1010
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f417xx.h:1018
#define USART3_BASE (APB1PERIPH_BASE + 0x4800UL)
stm32f417xx.h:1021
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f417xx.h:1026
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f429xx.h:1053
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f429xx.h:1054
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f429xx.h:1055
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f429xx.h:1056
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f429xx.h:1057
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f429xx.h:1059
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f429xx.h:1060
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f429xx.h:1061
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f429xx.h:1062
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f429xx.h:1063
#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL)
stm32f429xx.h:1064
#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL)
stm32f429xx.h:1065
#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
stm32f429xx.h:1066
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f429xx.h:1067
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f429xx.h:1068
#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
stm32f429xx.h:1070
#define USART3_BASE (APB1PERIPH_BASE + 0x4800UL)
stm32f429xx.h:1073
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f429xx.h:1075
#define I2C3_BASE (APB1PERIPH_BASE + 0x5C00UL)
stm32f429xx.h:1076
#define CAN1_BASE (APB1PERIPH_BASE + 0x6400UL)
stm32f429xx.h:1078
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f429xx.h:1079
#define DAC_BASE (APB1PERIPH_BASE + 0x7400UL)
stm32f439xx.h:1123
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f439xx.h:1124
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f439xx.h:1125
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f439xx.h:1126
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f439xx.h:1127
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f439xx.h:1129
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f439xx.h:1130
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f439xx.h:1131
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f439xx.h:1135
#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
stm32f439xx.h:1136
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f439xx.h:1137
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f439xx.h:1138
#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
stm32f439xx.h:1143
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f439xx.h:1148
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f446xx.h:943
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f446xx.h:944
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f446xx.h:945
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f446xx.h:946
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f446xx.h:947
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f446xx.h:949
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f446xx.h:950
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f446xx.h:951
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f446xx.h:952
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f446xx.h:953
#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL)
stm32f446xx.h:954
#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL)
stm32f446xx.h:955
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f446xx.h:956
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f446xx.h:958
#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
stm32f446xx.h:959
#define USART3_BASE (APB1PERIPH_BASE + 0x4800UL)
stm32f446xx.h:962
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f446xx.h:965
#define FMPI2C1_BASE (APB1PERIPH_BASE + 0x6000UL)
stm32f446xx.h:966
#define CAN1_BASE (APB1PERIPH_BASE + 0x6400UL)
stm32f446xx.h:968
#define CEC_BASE (APB1PERIPH_BASE + 0x6C00UL)
stm32f446xx.h:969
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f446xx.h:970
#define DAC_BASE (APB1PERIPH_BASE + 0x7400UL)
stm32f469xx.h:1143
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f469xx.h:1144
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f469xx.h:1145
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f469xx.h:1146
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f469xx.h:1147
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f469xx.h:1148
#define TIM7_BASE (APB1PERIPH_BASE + 0x1400UL)
stm32f469xx.h:1149
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f469xx.h:1150
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f469xx.h:1151
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f469xx.h:1152
#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
stm32f469xx.h:1153
#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL)
stm32f469xx.h:1154
#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL)
stm32f469xx.h:1155
#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
stm32f469xx.h:1156
#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
stm32f469xx.h:1157
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
stm32f469xx.h:1158
#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
stm32f469xx.h:1159
#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
stm32f469xx.h:1160
#define USART3_BASE (APB1PERIPH_BASE + 0x4800UL)
stm32f469xx.h:1161
#define UART4_BASE (APB1PERIPH_BASE + 0x4C00UL)
stm32f469xx.h:1162
#define UART5_BASE (APB1PERIPH_BASE + 0x5000UL)
stm32f469xx.h:1163
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f469xx.h:1164
#define I2C2_BASE (APB1PERIPH_BASE + 0x5800UL)
stm32f469xx.h:1165
#define I2C3_BASE (APB1PERIPH_BASE + 0x5C00UL)
stm32f469xx.h:1166
#define CAN1_BASE (APB1PERIPH_BASE + 0x6400UL)
stm32f469xx.h:1168
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
stm32f469xx.h:1169
#define DAC_BASE (APB1PERIPH_BASE + 0x7400UL)
stm32f469xx.h:1170
#define UART7_BASE (APB1PERIPH_BASE + 0x7800UL)
stm32f469xx.h:1171
#define UART8_BASE (APB1PERIPH_BASE + 0x7C00UL)
stm32f479xx.h:1213
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
stm32f479xx.h:1214
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
stm32f479xx.h:1215
#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
stm32f479xx.h:1216
#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
stm32f479xx.h:1217
#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL)
stm32f479xx.h:1219
#define TIM12_BASE (APB1PERIPH_BASE + 0x1800UL)
stm32f479xx.h:1220
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00UL)
stm32f479xx.h:1221
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000UL)
stm32f479xx.h:1233
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
stm32f479xx.h:1238
#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)