OpenOCD
STM32_FLASH_CR is only used within OpenOCD.
 
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CodeScopeDevelopment ToolsOpenOCDSTM32_FLASH_CR

STM32_FLASH_CR macro

Syntax

#define STM32_FLASH_CR 0x10

References

LocationText
stm32f1x.c:34
#define STM32_FLASH_CR 0x10
stm32f2x.c:133
#define STM32_FLASH_CR 0x40023c10
stm32g0x.c:42
#define STM32_FLASH_CR 0x10
stm32g4x.c:68
#define STM32_FLASH_CR 0x14
stm32l5x.c:116
#define STM32_FLASH_CR 5
stm32f1x.c:388
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER);
stm32f1x.c:396
stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER | FLASH_STRT);
stm32f1x.c:407
int retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32f1x.c:719
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
stm32f1x.c:727
retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32f1x.c:1602
(void)target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32f1x.c:1607
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_OBL_LAUNCH);
stm32f1x.c:1632
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER);
stm32f1x.c:1635
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
stm32f1x.c:1644
int retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32f2x.c:320
int retval = target_read_u32(target, STM32_FLASH_CR, &ctrl);
stm32f2x.c:336
retval = target_read_u32(target, STM32_FLASH_CR, &ctrl);
stm32f2x.c:634
stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_SER | FLASH_SNB(snb) | FLASH_STRT);
stm32f2x.c:647
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32f2x.c:860
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
stm32f2x.c:879
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
stm32f2x.c:892
return target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
stm32f2x.c:1532
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), flash_mer);
stm32f2x.c:1535
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
stm32f2x.c:1544
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32g4x.c:423
int retval = stm32l4_read_flash_reg(bank, STM32_FLASH_CR, &ctrl);
stm32g4x.c:439
retval = stm32l4_read_flash_reg(bank, STM32_FLASH_CR, &ctrl);
stm32g4x.c:455
int retval = stm32l4_read_flash_reg(bank, STM32_FLASH_CR, &ctrl);
stm32g4x.c:471
retval = stm32l4_read_flash_reg(bank, STM32_FLASH_CR, &ctrl);
stm32g4x.c:505
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_OPTSTRT);
stm32g4x.c:600
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, erase_flags);
stm32g4x.c:611
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);
stm32g4x.c:791
return stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);
stm32g4x.c:964
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, action);
stm32g4x.c:967
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, action | FLASH_STRT);
stm32g4x.c:975
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);
stm32g4x.c:1086
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_OBLLAUNCH);
stm32l5x.c:284
int retval = target_read_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), &ctrl);
stm32l5x.c:300
retval = target_read_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), &ctrl);
stm32l5x.c:317
int retval = target_read_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), &ctrl);
stm32l5x.c:333
retval = target_read_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), &ctrl);
stm32l5x.c:374
retval = target_write_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_OPTSTRT);
stm32l5x.c:468
stm32l4_get_flash_reg(bank, STM32_FLASH_CR), erase_flags);
stm32l5x.c:480
target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32l5x.c:686
return target_write_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32l5x.c:936
target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), action);
stm32l5x.c:940
target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR),
stm32l5x.c:950
target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
stm32l5x.c:1063
retval = target_write_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_OBLLAUNCH);