Select one of the symbols to view example projects that use it.
 
Outline
Includes
#include "stm32f4xx_hal.h"
#include "lwip/timeouts.h"
#include "netif/ethernet.h"
#include "netif/etharp.h"
#include "lwip/stats.h"
#include "lwip/snmp.h"
#include "lwip/tcpip.h"
#include "ethernetif.h"
#include "../Components/dp83848/dp83848.h"
#include <string.h>
Private define
#define TIME_WAITING_FOR_INPUT
#define INTERFACE_THREAD_STACK_SIZE
#define IFNAME0
#define IFNAME1
#define ETH_DMA_TRANSMIT_TIMEOUT
#define ETH_RX_BUFFER_CNT
#define ETH_TX_BUFFER_MAX
Private variables
RxAllocStatusTypeDef
RxBuff_t
DMARxDscrTab
DMATxDscrTab
memp_memory_RX_POOL_base
memp_tab_RX_POOL
memp_RX_POOL
RxAllocStatus
RxPktSemaphore
EthIfThread
TxPktSemaphore
EthHandle
TxConfig
DP83848
Private function prototypes
DP83848_IOCtx
low_level_init(struct netif *)
low_level_output(struct netif *, struct pbuf *)
low_level_input(struct netif *)
ethernetif_input(const void *)
ethernetif_init(struct netif *)
pbuf_free_custom(struct pbuf *)
sys_now()
HAL_ETH_MspInit(ETH_HandleTypeDef *)
HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *)
HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *)
HAL_ETH_ErrorCallback(ETH_HandleTypeDef *)
ETH_PHY_IO_Init()
ETH_PHY_IO_DeInit()
ETH_PHY_IO_ReadReg(uint32_t, uint32_t, uint32_t *)
ETH_PHY_IO_WriteReg(uint32_t, uint32_t, uint32_t)
ETH_PHY_IO_GetTick()
ethernet_link_thread(const void *)
HAL_ETH_RxAllocateCallback(uint8_t **)
HAL_ETH_RxLinkCallback(void **, void **, uint8_t *, uint16_t)
HAL_ETH_TxFreeCallback(uint32_t *)
Files
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CodeScopeSTM32 Libraries and SamplesLwIP_HTTP_Server_Socket_RTOSSrc/ethernetif.c
 
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/** ****************************************************************************** * @file LwIP/LwIP_HTTP_Server_Socket_RTOS/Src/ethernetif.c * @author MCD Application Team * @brief This file implements Ethernet network interface drivers for lwIP ****************************************************************************** * @attention * * Copyright (c) 2017 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** *//* ... */ /* Includes ------------------------------------------------------------------*/ #include "stm32f4xx_hal.h" #include "lwip/timeouts.h" #include "netif/ethernet.h" #include "netif/etharp.h" #include "lwip/stats.h" #include "lwip/snmp.h" #include "lwip/tcpip.h" #include "ethernetif.h" #include "../Components/dp83848/dp83848.h" #include <string.h> 10 includes Includes/* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ /* The time to block waiting for input. */ #define TIME_WAITING_FOR_INPUT ( osWaitForever ) /* Stack size of the interface thread */ #define INTERFACE_THREAD_STACK_SIZE ( 512 ) /* Define those to better describe your network interface. */ #define IFNAME0 's' #define IFNAME1 't' #define ETH_DMA_TRANSMIT_TIMEOUT (20U) #define ETH_RX_BUFFER_CNT 12U #define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U) 7 defines Private define/* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ /* @Note: This interface is implemented to operate in zero-copy mode only: - Rx Buffers will be allocated from LwIP stack memory heap, then passed to ETH HAL driver. - Tx Buffers will be allocated from LwIP stack memory heap, then passed to ETH HAL driver. @Notes: 1.a. ETH DMA Rx descriptors must be contiguous, the default count is 4, to customize it please redefine ETH_RX_DESC_CNT in ETH GUI (Rx Descriptor Length) so that updated value will be generated in stm32xxxx_hal_conf.h 1.b. ETH DMA Tx descriptors must be contiguous, the default count is 4, to customize it please redefine ETH_TX_DESC_CNT in ETH GUI (Tx Descriptor Length) so that updated value will be generated in stm32xxxx_hal_conf.h 2.a. Rx Buffers number: ETH_RX_BUFFER_CNT must be greater than ETH_RX_DESC_CNT. 2.b. Rx Buffers must have the same size: ETH_RX_BUF_SIZE, this value must passed to ETH DMA in the init field (heth.Init.RxBuffLen) *//* ... */ typedef enum { RX_ALLOC_OK = 0x00, RX_ALLOC_ERROR = 0x01 ...} RxAllocStatusTypeDef; typedef struct { struct pbuf_custom pbuf_custom; uint8_t buff[(ETH_RX_BUF_SIZE + 31) & ~31] __ALIGNED(32); ...} RxBuff_t; ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */ ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */ /* Memory Pool Declaration */ LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool"); static uint8_t RxAllocStatus; osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */ TaskHandle_t EthIfThread; /* Handle of the interface thread */ osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */ /* Global Ethernet handle */ ETH_HandleTypeDef EthHandle; ETH_TxPacketConfig TxConfig; dp83848_Object_t DP83848; Private variables /* Private function prototypes -----------------------------------------------*/ extern void Error_Handler(void); static void ethernetif_input( void const * argument ); int32_t ETH_PHY_IO_Init(void); int32_t ETH_PHY_IO_DeInit (void); int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal); int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal); int32_t ETH_PHY_IO_GetTick(void); void pbuf_free_custom(struct pbuf *p); dp83848_IOCtx_t DP83848_IOCtx = {ETH_PHY_IO_Init, ETH_PHY_IO_DeInit, ETH_PHY_IO_WriteReg, ETH_PHY_IO_ReadReg, ETH_PHY_IO_GetTick...}; Private function prototypes /* Private functions ---------------------------------------------------------*/ /******************************************************************************* LL Driver Interface ( LwIP stack --> ETH) *******************************************************************************//* ... */ /** * @brief In this function, the hardware should be initialized. * Called from ethernetif_init(). * * @param netif the already initialized lwip network interface structure * for this ethernetif *//* ... */ static void low_level_init(struct netif *netif) { uint32_t duplex, speed = 0; int32_t PHYLinkState = 0; ETH_MACConfigTypeDef MACConf = {0}; uint8_t macaddress[6]= {ETH_MAC_ADDR0, ETH_MAC_ADDR1, ETH_MAC_ADDR2, ETH_MAC_ADDR3, ETH_MAC_ADDR4, ETH_MAC_ADDR5}; EthHandle.Instance = ETH; EthHandle.Init.MACAddr = macaddress; EthHandle.Init.MediaInterface = HAL_ETH_MII_MODE; EthHandle.Init.RxDesc = DMARxDscrTab; EthHandle.Init.TxDesc = DMATxDscrTab; EthHandle.Init.RxBuffLen = ETH_RX_BUF_SIZE; /* configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */ HAL_ETH_Init(&EthHandle); /* set MAC hardware address length */ netif->hwaddr_len = ETH_HWADDR_LEN; /* set MAC hardware address */ netif->hwaddr[0] = ETH_MAC_ADDR0; netif->hwaddr[1] = ETH_MAC_ADDR1; netif->hwaddr[2] = ETH_MAC_ADDR2; netif->hwaddr[3] = ETH_MAC_ADDR3; netif->hwaddr[4] = ETH_MAC_ADDR4; netif->hwaddr[5] = ETH_MAC_ADDR5; /* maximum transfer unit */ netif->mtu = ETH_MAX_PAYLOAD; /* device capabilities */ /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; /* Initialize the RX POOL */ LWIP_MEMPOOL_INIT(RX_POOL); /* Set Tx packet config common parameters */ memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig)); TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; /* create a binary semaphore used for informing ethernetif of frame reception */ RxPktSemaphore = xSemaphoreCreateBinary(); /* create a binary semaphore used for informing ethernetif of frame transmission */ TxPktSemaphore = xSemaphoreCreateBinary(); /* create the task that handles the ETH_MAC */ osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE); osThreadCreate (osThread(EthIf), netif); /* Set PHY IO functions */ DP83848_RegisterBusIO(&DP83848, &DP83848_IOCtx); /* Initialize the DP83848 ETH PHY */ DP83848_Init(&DP83848); PHYLinkState = DP83848_GetLinkState(&DP83848); /* Get link state */ if(PHYLinkState <= DP83848_STATUS_LINK_DOWN) { netif_set_link_down(netif); netif_set_down(netif); }if (PHYLinkState <= DP83848_STATUS_LINK_DOWN) { ... } else { switch (PHYLinkState) { case DP83848_STATUS_100MBITS_FULLDUPLEX: duplex = ETH_FULLDUPLEX_MODE; speed = ETH_SPEED_100M; break;case DP83848_STATUS_100MBITS_FULLDUPLEX: case DP83848_STATUS_100MBITS_HALFDUPLEX: duplex = ETH_HALFDUPLEX_MODE; speed = ETH_SPEED_100M; break;case DP83848_STATUS_100MBITS_HALFDUPLEX: case DP83848_STATUS_10MBITS_FULLDUPLEX: duplex = ETH_FULLDUPLEX_MODE; speed = ETH_SPEED_10M; break;case DP83848_STATUS_10MBITS_FULLDUPLEX: case DP83848_STATUS_10MBITS_HALFDUPLEX: duplex = ETH_HALFDUPLEX_MODE; speed = ETH_SPEED_10M; break;case DP83848_STATUS_10MBITS_HALFDUPLEX: default: duplex = ETH_FULLDUPLEX_MODE; speed = ETH_SPEED_100M; break;default }switch (PHYLinkState) { ... } /* Get MAC Config MAC */ HAL_ETH_GetMACConfig(&EthHandle, &MACConf); MACConf.DuplexMode = duplex; MACConf.Speed = speed; HAL_ETH_SetMACConfig(&EthHandle, &MACConf); HAL_ETH_Start_IT(&EthHandle); netif_set_up(netif); netif_set_link_up(netif); }else { ... } }{ ... } /** * This function should do the actual transmission of the packet. The packet is * contained in the pbuf that is passed to the function. This pbuf * might be chained. * * @param netif the lwip network interface structure for this ethernetif * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type) * @return ERR_OK if the packet was sent, or ERR_IF if the packet was unable to be sent * * @note ERR_OK means the packet was sent (but not necessarily transmit complete), * and ERR_IF means the packet has more chained buffers than what the interface supports. *//* ... */ static err_t low_level_output(struct netif *netif, struct pbuf *p) { uint32_t i = 0U; struct pbuf *q = NULL; err_t errval = ERR_OK; ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0}; memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef)); for(q = p; q != NULL; q = q->next) { if(i >= ETH_TX_DESC_CNT) return ERR_IF; Txbuffer[i].buffer = q->payload; Txbuffer[i].len = q->len; if(i>0) { Txbuffer[i-1].next = &Txbuffer[i]; }if (i>0) { ... } if(q->next == NULL) { Txbuffer[i].next = NULL; }if (q->next == NULL) { ... } i++; }for (q = p; q != NULL; q = q->next) { ... } TxConfig.Length = p->tot_len; TxConfig.TxBuffer = Txbuffer; TxConfig.pData = p; pbuf_ref(p); HAL_ETH_Transmit_IT(&EthHandle, &TxConfig); while(osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK) { }while (osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK) { ... } HAL_ETH_ReleaseTxPacket(&EthHandle); return errval; }{ ... } /** * @brief Should allocate a pbuf and transfer the bytes of the incoming * packet from the interface into the pbuf. * * @param netif the lwip network interface structure for this ethernetif * @return a pbuf filled with the received packet (including MAC header) * NULL on memory error *//* ... */ static struct pbuf * low_level_input(struct netif *netif) { struct pbuf *p = NULL; if(RxAllocStatus == RX_ALLOC_OK) { HAL_ETH_ReadData(&EthHandle, (void **)&p); }if (RxAllocStatus == RX_ALLOC_OK) { ... } return p; }{ ... } /** * This task should be signaled when a receive packet is ready to be read * from the interface. * * @param argument the lwip network interface structure for this ethernetif *//* ... */ static void ethernetif_input( void const * argument ) { struct pbuf *p = NULL; struct netif *netif = (struct netif *) argument; for( ;; ) { if (osSemaphoreWait( RxPktSemaphore, TIME_WAITING_FOR_INPUT)==osOK) { do { p = low_level_input( netif ); if (p != NULL) { if (netif->input( p, netif) != ERR_OK ) { pbuf_free(p); }if (netif->input( p, netif) != ERR_OK) { ... } }if (p != NULL) { ... } ...}while(p!=NULL); }if (osSemaphoreWait( RxPktSemaphore, TIME_WAITING_FOR_INPUT)==osOK) { ... } }for (;;) { ... } }{ ... } /** * @brief Should be called at the beginning of the program to set up the * network interface. It calls the function low_level_init() to do the * actual setup of the hardware. * * This function should be passed as a parameter to netif_add(). * * @param netif the lwip network interface structure for this ethernetif * @return ERR_OK if the loopif is initialized * ERR_MEM if private data couldn't be allocated * any other err_t on error *//* ... */ err_t ethernetif_init(struct netif *netif) { LWIP_ASSERT("netif != NULL", (netif != NULL)); #if LWIP_NETIF_HOSTNAME /* Initialize interface hostname */ netif->hostname = "lwip";/* ... */ #endif /* LWIP_NETIF_HOSTNAME */ /* * Initialize the snmp variables and counters inside the struct netif. * The last argument should be replaced with your link speed, in units * of bits per second. *//* ... */ MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS); netif->name[0] = IFNAME0; netif->name[1] = IFNAME1; /* We directly use etharp_output() here to save a function call. * You can instead declare your own function an call etharp_output() * from it if you have to do some checks before sending (e.g. if link * is available...) *//* ... */ netif->output = etharp_output; netif->linkoutput = low_level_output; /* initialize the hardware */ low_level_init(netif); return ERR_OK; }{ ... } /** * @brief Custom Rx pbuf free callback * @param pbuf: pbuf to be freed * @retval None *//* ... */ void pbuf_free_custom(struct pbuf *p) { struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p; LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf); if (RxAllocStatus == RX_ALLOC_ERROR) { RxAllocStatus = RX_ALLOC_OK; osSemaphoreRelease(RxPktSemaphore); }if (RxAllocStatus == RX_ALLOC_ERROR) { ... } }{ ... } /** * @brief Returns the current time in milliseconds * when LWIP_TIMERS == 1 and NO_SYS == 1 * @param None * @retval Current Time value *//* ... */ u32_t sys_now(void) { return HAL_GetTick(); }{ ... } /******************************************************************************* Ethernet MSP Routines *******************************************************************************//* ... */ /** * @brief Initializes the ETH MSP. * @param heth: ETH handle * @retval None *//* ... */ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) { GPIO_InitTypeDef GPIO_InitStructure = {0}; /* Enable GPIOs clocks */ __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOF_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE(); __HAL_RCC_GPIOI_CLK_ENABLE(); /* Ethernet pins configuration ************************************************/ /* ETH_MDIO -------------------------> PA2 ETH_MDC --------------------------> PC1 ETH_PPS_OUT ----------------------> PB5 ETH_MII_RXD2 ---------------------> PH6 ETH_MII_RXD3 ---------------------> PH7 ETH_MII_TX_CLK -------------------> PC3 ETH_MII_TXD2 ---------------------> PC2 ETH_MII_TXD3 ---------------------> PB8 ETH_MII_RX_CLK -------------------> PA1 ETH_MII_RX_DV --------------------> PA7 ETH_MII_RXD0 ---------------------> PC4 ETH_MII_RXD1 ---------------------> PC5 ETH_MII_TX_EN --------------------> PG11 ETH_MII_TXD0 ---------------------> PG13 ETH_MII_TXD1 ---------------------> PG14 ETH_MII_RX_ER --------------------> PI10 (not configured) ETH_MII_CRS ----------------------> PA0 (not configured) ETH_MII_COL ----------------------> PH3 (not configured) *//* ... */ /* Configure PA1, PA2 and PA7 */ GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; GPIO_InitStructure.Pull = GPIO_NOPULL; GPIO_InitStructure.Alternate = GPIO_AF11_ETH; GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7; HAL_GPIO_Init(GPIOA, &GPIO_InitStructure); /* Configure PB5 and PB8 */ GPIO_InitStructure.Pin = GPIO_PIN_5 | GPIO_PIN_8; HAL_GPIO_Init(GPIOB, &GPIO_InitStructure); /* Configure PC1, PC2, PC3, PC4 and PC5 */ GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; HAL_GPIO_Init(GPIOC, &GPIO_InitStructure); /* Configure PG11, PG14 and PG13 */ GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14; HAL_GPIO_Init(GPIOG, &GPIO_InitStructure); /* Configure PH6, PH7 */ GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7; HAL_GPIO_Init(GPIOH, &GPIO_InitStructure); /* Configure PA0 GPIO_InitStructure.Pin = GPIO_PIN_0; HAL_GPIO_Init(GPIOA, &GPIO_InitStructure); Note: Ethernet Full duplex mode works properly in the default setting (which MII_CRS is not connected to PA0 of STM32F4x9NIH6) because PA0 is shared with Wakeup button and MC_ENA. If Half duplex mode is needed, uncomment PA0 configuration code source (above the note) and close the SB7 solder bridge of the STM324x9I-EVAL board . *//* ... */ /* Configure PH3 GPIO_InitStructure.Pin = GPIO_PIN_3; HAL_GPIO_Init(GPIOH, &GPIO_InitStructure); Note: Ethernet Full duplex mode works properly in the default setting (which MII_COL is not connected to PH3 of STM32F4x9NIH6) because PH3 is shared with SDRAM chip select SDNE0. If Half duplex mode is needed, uncomment PH3 configuration code source (above the note) and close SB8 solder bridge of the STM324x9I-EVAL board. *//* ... */ /* Configure PI10 GPIO_InitStructure.Pin = GPIO_PIN_10; HAL_GPIO_Init(GPIOI, &GPIO_InitStructure); Note: Ethernet works properly in the default setting (which RX_ER is not connected to PI10 of STM32F4x9NIH6) because PI10 is shared with data signal of SDRAM. If RX_ER signal is needed, uncomment PI10 configuration code source (above the note) then remove R244 and solder R43 of the STM324x9I-EVAL board. *//* ... */ /* Enable the Ethernet global Interrupt */ HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0); HAL_NVIC_EnableIRQ(ETH_IRQn); /* Enable ETHERNET clock */ __HAL_RCC_ETH_CLK_ENABLE(); }{ ... } /** * @brief Ethernet Rx Transfer completed callback * @param heth: ETH handle * @retval None *//* ... */ void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) { osSemaphoreRelease(RxPktSemaphore); }{ ... } /** * @brief Ethernet Tx Transfer completed callback * @param heth: ETH handle * @retval None *//* ... */ void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth) { osSemaphoreRelease(TxPktSemaphore); }{ ... } /** * @brief Ethernet DMA transfer error callback * @param heth: ETH handle * @retval None *//* ... */ void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) { if((HAL_ETH_GetDMAError(heth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS) { osSemaphoreRelease(RxPktSemaphore); }if ((HAL_ETH_GetDMAError(heth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS) { ... } }{ ... } /******************************************************************************* PHI IO Functions *******************************************************************************//* ... */ /** * @brief Initializes the MDIO interface GPIO and clocks. * @param None * @retval 0 if OK, -1 if ERROR *//* ... */ int32_t ETH_PHY_IO_Init(void) { /* We assume that MDIO GPIO configuration is already done in the ETH_MspInit() else it should be done here *//* ... */ /* Configure the MDIO Clock */ HAL_ETH_SetMDIOClockRange(&EthHandle); return 0; }{ ... } /** * @brief De-Initializes the MDIO interface . * @param None * @retval 0 if OK, -1 if ERROR *//* ... */ int32_t ETH_PHY_IO_DeInit (void) { return 0; }{ ... } /** * @brief Read a PHY register through the MDIO interface. * @param DevAddr: PHY port address * @param RegAddr: PHY register address * @param pRegVal: pointer to hold the register value * @retval 0 if OK -1 if Error *//* ... */ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) { if(HAL_ETH_ReadPHYRegister(&EthHandle, DevAddr, RegAddr, pRegVal) != HAL_OK) { return -1; }if (HAL_ETH_ReadPHYRegister(&EthHandle, DevAddr, RegAddr, pRegVal) != HAL_OK) { ... } return 0; }{ ... } /** * @brief Write a value to a PHY register through the MDIO interface. * @param DevAddr: PHY port address * @param RegAddr: PHY register address * @param RegVal: Value to be written * @retval 0 if OK -1 if Error *//* ... */ int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) { if(HAL_ETH_WritePHYRegister(&EthHandle, DevAddr, RegAddr, RegVal) != HAL_OK) { return -1; }if (HAL_ETH_WritePHYRegister(&EthHandle, DevAddr, RegAddr, RegVal) != HAL_OK) { ... } return 0; }{ ... } /** * @brief Get the time in millisecons used for internal PHY driver process. * @retval Time value *//* ... */ int32_t ETH_PHY_IO_GetTick(void) { return HAL_GetTick(); }{ ... } /** * @brief Check the ETH link state and update netif accordingly. * @param argument: netif * @retval None *//* ... */ void ethernet_link_thread( void const * argument ) { ETH_MACConfigTypeDef MACConf = {0}; int32_t PHYLinkState = 0U; uint32_t linkchanged = 0U, speed = 0U, duplex = 0U; struct netif *netif = (struct netif *) argument; for(;;) { PHYLinkState = DP83848_GetLinkState(&DP83848); if(netif_is_link_up(netif) && (PHYLinkState <= DP83848_STATUS_LINK_DOWN)) { HAL_ETH_Stop_IT(&EthHandle); netif_set_down(netif); netif_set_link_down(netif); }if (netif_is_link_up(netif) && (PHYLinkState <= DP83848_STATUS_LINK_DOWN)) { ... } else if(!netif_is_link_up(netif) && (PHYLinkState > DP83848_STATUS_LINK_DOWN)) { switch (PHYLinkState) { case DP83848_STATUS_100MBITS_FULLDUPLEX: duplex = ETH_FULLDUPLEX_MODE; speed = ETH_SPEED_100M; linkchanged = 1; break;case DP83848_STATUS_100MBITS_FULLDUPLEX: case DP83848_STATUS_100MBITS_HALFDUPLEX: duplex = ETH_HALFDUPLEX_MODE; speed = ETH_SPEED_100M; linkchanged = 1; break;case DP83848_STATUS_100MBITS_HALFDUPLEX: case DP83848_STATUS_10MBITS_FULLDUPLEX: duplex = ETH_FULLDUPLEX_MODE; speed = ETH_SPEED_10M; linkchanged = 1; break;case DP83848_STATUS_10MBITS_FULLDUPLEX: case DP83848_STATUS_10MBITS_HALFDUPLEX: duplex = ETH_HALFDUPLEX_MODE; speed = ETH_SPEED_10M; linkchanged = 1; break;case DP83848_STATUS_10MBITS_HALFDUPLEX: default: break;default }switch (PHYLinkState) { ... } if(linkchanged) { /* Get MAC Config MAC */ HAL_ETH_GetMACConfig(&EthHandle, &MACConf); MACConf.DuplexMode = duplex; MACConf.Speed = speed; HAL_ETH_SetMACConfig(&EthHandle, &MACConf); HAL_ETH_Start_IT(&EthHandle); netif_set_up(netif); netif_set_link_up(netif); }if (linkchanged) { ... } }else if (!netif_is_link_up(netif) && (PHYLinkState > DP83848_STATUS_LINK_DOWN)) { ... } osDelay(100); }for (;;) { ... } }{ ... } void HAL_ETH_RxAllocateCallback(uint8_t **buff) { struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL); if (p) { /* Get the buff from the struct pbuf address. */ *buff = (uint8_t *)p + offsetof(RxBuff_t, buff); p->custom_free_function = pbuf_free_custom; /* Initialize the struct pbuf. * This must be performed whenever a buffer's allocated because it may be * changed by lwIP or the app, e.g., pbuf_free decrements ref. *//* ... */ pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUF_SIZE); }if (p) { ... } else { RxAllocStatus = RX_ALLOC_ERROR; *buff = NULL; }else { ... } }{ ... } void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length) { struct pbuf **ppStart = (struct pbuf **)pStart; struct pbuf **ppEnd = (struct pbuf **)pEnd; struct pbuf *p = NULL; /* Get the struct pbuf from the buff address. */ p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff)); p->next = NULL; p->tot_len = 0; p->len = Length; /* Chain the buffer. */ if (!*ppStart) { /* The first buffer of the packet. */ *ppStart = p; }if (!*ppStart) { ... } else { /* Chain the buffer to the end of the packet. */ (*ppEnd)->next = p; }else { ... } *ppEnd = p; /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len * set to its own length, plus the length of all the following pbufs in the chain. *//* ... */ for (p = *ppStart; p != NULL; p = p->next) { p->tot_len += Length; }for (p = *ppStart; p != NULL; p = p->next) { ... } }{ ... } void HAL_ETH_TxFreeCallback(uint32_t * buff) { pbuf_free((struct pbuf *)buff); }{ ... }